perf, kvm: Support the in_tx/in_tx_cp modifiers in KVM arch perfmon emulation v5
[KVM maintainers: The underlying support for this is in perf/core now. So please merge this patch into the KVM tree.] This is not arch perfmon, but older CPUs will just ignore it. This makes it possible to do at least some TSX measurements from a KVM guest v2: Various fixes to address review feedback v3: Ignore the bits when no CPUID. No #GP. Force raw events with TSX bits. v4: Use reserved bits for #GP v5: Remove obsolete argument Acked-by: Gleb Natapov <gleb@redhat.com> Signed-off-by: Andi Kleen <ak@linux.intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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@ -323,6 +323,7 @@ struct kvm_pmu {
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u64 global_ovf_ctrl;
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u64 counter_bitmask[2];
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u64 global_ctrl_mask;
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u64 reserved_bits;
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u8 version;
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struct kvm_pmc gp_counters[INTEL_PMC_MAX_GENERIC];
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struct kvm_pmc fixed_counters[INTEL_PMC_MAX_FIXED];
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@ -160,7 +160,7 @@ static void stop_counter(struct kvm_pmc *pmc)
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static void reprogram_counter(struct kvm_pmc *pmc, u32 type,
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unsigned config, bool exclude_user, bool exclude_kernel,
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bool intr)
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bool intr, bool in_tx, bool in_tx_cp)
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{
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struct perf_event *event;
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struct perf_event_attr attr = {
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@ -173,6 +173,10 @@ static void reprogram_counter(struct kvm_pmc *pmc, u32 type,
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.exclude_kernel = exclude_kernel,
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.config = config,
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};
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if (in_tx)
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attr.config |= HSW_IN_TX;
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if (in_tx_cp)
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attr.config |= HSW_IN_TX_CHECKPOINTED;
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attr.sample_period = (-pmc->counter) & pmc_bitmask(pmc);
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@ -226,7 +230,9 @@ static void reprogram_gp_counter(struct kvm_pmc *pmc, u64 eventsel)
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if (!(eventsel & (ARCH_PERFMON_EVENTSEL_EDGE |
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ARCH_PERFMON_EVENTSEL_INV |
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ARCH_PERFMON_EVENTSEL_CMASK))) {
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ARCH_PERFMON_EVENTSEL_CMASK |
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HSW_IN_TX |
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HSW_IN_TX_CHECKPOINTED))) {
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config = find_arch_event(&pmc->vcpu->arch.pmu, event_select,
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unit_mask);
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if (config != PERF_COUNT_HW_MAX)
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@ -239,7 +245,9 @@ static void reprogram_gp_counter(struct kvm_pmc *pmc, u64 eventsel)
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reprogram_counter(pmc, type, config,
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!(eventsel & ARCH_PERFMON_EVENTSEL_USR),
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!(eventsel & ARCH_PERFMON_EVENTSEL_OS),
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eventsel & ARCH_PERFMON_EVENTSEL_INT);
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eventsel & ARCH_PERFMON_EVENTSEL_INT,
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(eventsel & HSW_IN_TX),
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(eventsel & HSW_IN_TX_CHECKPOINTED));
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}
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static void reprogram_fixed_counter(struct kvm_pmc *pmc, u8 en_pmi, int idx)
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@ -256,7 +264,7 @@ static void reprogram_fixed_counter(struct kvm_pmc *pmc, u8 en_pmi, int idx)
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arch_events[fixed_pmc_events[idx]].event_type,
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!(en & 0x2), /* exclude user */
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!(en & 0x1), /* exclude kernel */
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pmi);
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pmi, false, false);
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}
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static inline u8 fixed_en_pmi(u64 ctrl, int idx)
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@ -408,7 +416,7 @@ int kvm_pmu_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
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} else if ((pmc = get_gp_pmc(pmu, index, MSR_P6_EVNTSEL0))) {
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if (data == pmc->eventsel)
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return 0;
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if (!(data & 0xffffffff00200000ull)) {
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if (!(data & pmu->reserved_bits)) {
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reprogram_gp_counter(pmc, data);
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return 0;
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}
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@ -450,6 +458,7 @@ void kvm_pmu_cpuid_update(struct kvm_vcpu *vcpu)
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pmu->counter_bitmask[KVM_PMC_GP] = 0;
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pmu->counter_bitmask[KVM_PMC_FIXED] = 0;
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pmu->version = 0;
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pmu->reserved_bits = 0xffffffff00200000ull;
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entry = kvm_find_cpuid_entry(vcpu, 0xa, 0);
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if (!entry)
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@ -478,6 +487,12 @@ void kvm_pmu_cpuid_update(struct kvm_vcpu *vcpu)
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pmu->global_ctrl = ((1 << pmu->nr_arch_gp_counters) - 1) |
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(((1ull << pmu->nr_arch_fixed_counters) - 1) << INTEL_PMC_IDX_FIXED);
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pmu->global_ctrl_mask = ~pmu->global_ctrl;
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entry = kvm_find_cpuid_entry(vcpu, 7, 0);
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if (entry &&
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(boot_cpu_has(X86_FEATURE_HLE) || boot_cpu_has(X86_FEATURE_RTM)) &&
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(entry->ebx & (X86_FEATURE_HLE|X86_FEATURE_RTM)))
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pmu->reserved_bits ^= HSW_IN_TX|HSW_IN_TX_CHECKPOINTED;
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}
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void kvm_pmu_init(struct kvm_vcpu *vcpu)
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