b43: N-PHY: reorder functions: random cleanups
Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Acked-by: Larry Finger <Larry.Finger@lwfinger.net> Signed-off-by: John W. Linville <linville@tuxdriver.com>
This commit is contained in:
Rafał Miłecki
John W. Linville
parent
3ccd095792
commit
104cfa8810
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@ -1929,7 +1929,7 @@ static void b43_nphy_workarounds(struct b43_wldev *dev)
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}
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/**************************************************
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* Others
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* Tx and Rx
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**************************************************/
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void b43_nphy_set_rxantenna(struct b43_wldev *dev, int antenna)
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@ -1946,17 +1946,6 @@ static enum b43_txpwr_result b43_nphy_op_recalc_txpower(struct b43_wldev *dev,
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return B43_TXPWR_RES_DONE;
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}
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static void b43_chantab_phy_upload(struct b43_wldev *dev,
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const struct b43_phy_n_sfo_cfg *e)
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{
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b43_phy_write(dev, B43_NPHY_BW1A, e->phy_bw1a);
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b43_phy_write(dev, B43_NPHY_BW2, e->phy_bw2);
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b43_phy_write(dev, B43_NPHY_BW3, e->phy_bw3);
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b43_phy_write(dev, B43_NPHY_BW4, e->phy_bw4);
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b43_phy_write(dev, B43_NPHY_BW5, e->phy_bw5);
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b43_phy_write(dev, B43_NPHY_BW6, e->phy_bw6);
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}
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/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/TxPwrCtrlEnable */
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static void b43_nphy_tx_power_ctrl(struct b43_wldev *dev, bool enable)
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{
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@ -2249,18 +2238,6 @@ static void b43_nphy_tx_gain_table_upload(struct b43_wldev *dev)
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}
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}
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/*
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* Upload the N-PHY tables.
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* http://bcm-v4.sipsolutions.net/802.11/PHY/N/InitTables
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*/
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static void b43_nphy_tables_init(struct b43_wldev *dev)
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{
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if (dev->phy.rev < 3)
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b43_nphy_rev0_1_2_tables_init(dev);
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else
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b43_nphy_rev3plus_tables_init(dev);
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}
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/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/PA%20override */
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static void b43_nphy_pa_override(struct b43_wldev *dev, bool enable)
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{
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@ -2313,20 +2290,6 @@ static void b43_nphy_tx_lp_fbw(struct b43_wldev *dev)
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}
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}
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/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/MIMOConfig */
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static void b43_nphy_update_mimo_config(struct b43_wldev *dev, s32 preamble)
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{
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u16 mimocfg = b43_phy_read(dev, B43_NPHY_MIMOCFG);
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mimocfg |= B43_NPHY_MIMOCFG_AUTO;
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if (preamble == 1)
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mimocfg |= B43_NPHY_MIMOCFG_GFMIX;
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else
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mimocfg &= ~B43_NPHY_MIMOCFG_GFMIX;
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b43_phy_write(dev, B43_NPHY_MIMOCFG, mimocfg);
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}
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/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/Chains */
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static void b43_nphy_update_txrx_chain(struct b43_wldev *dev)
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{
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@ -2606,54 +2569,6 @@ static void b43_nphy_tx_iq_workaround(struct b43_wldev *dev)
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b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_NPHY_TXIQW3, array[3]);
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}
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/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/SuperSwitchInit */
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static void b43_nphy_superswitch_init(struct b43_wldev *dev, bool init)
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{
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if (dev->phy.rev >= 3) {
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if (!init)
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return;
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if (0 /* FIXME */) {
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b43_ntab_write(dev, B43_NTAB16(9, 2), 0x211);
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b43_ntab_write(dev, B43_NTAB16(9, 3), 0x222);
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b43_ntab_write(dev, B43_NTAB16(9, 8), 0x144);
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b43_ntab_write(dev, B43_NTAB16(9, 12), 0x188);
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}
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} else {
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b43_phy_write(dev, B43_NPHY_GPIO_LOOEN, 0);
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b43_phy_write(dev, B43_NPHY_GPIO_HIOEN, 0);
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switch (dev->dev->bus_type) {
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#ifdef CONFIG_B43_BCMA
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case B43_BUS_BCMA:
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bcma_chipco_gpio_control(&dev->dev->bdev->bus->drv_cc,
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0xFC00, 0xFC00);
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break;
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#endif
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#ifdef CONFIG_B43_SSB
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case B43_BUS_SSB:
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ssb_chipco_gpio_control(&dev->dev->sdev->bus->chipco,
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0xFC00, 0xFC00);
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break;
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#endif
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}
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b43_write32(dev, B43_MMIO_MACCTL,
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b43_read32(dev, B43_MMIO_MACCTL) &
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~B43_MACCTL_GPOUTSMSK);
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b43_write16(dev, B43_MMIO_GPIO_MASK,
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b43_read16(dev, B43_MMIO_GPIO_MASK) | 0xFC00);
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b43_write16(dev, B43_MMIO_GPIO_CONTROL,
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b43_read16(dev, B43_MMIO_GPIO_CONTROL) & ~0xFC00);
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if (init) {
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b43_phy_write(dev, B43_NPHY_RFCTL_LUT_TRSW_LO1, 0x2D8);
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b43_phy_write(dev, B43_NPHY_RFCTL_LUT_TRSW_UP1, 0x301);
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b43_phy_write(dev, B43_NPHY_RFCTL_LUT_TRSW_LO2, 0x2D8);
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b43_phy_write(dev, B43_NPHY_RFCTL_LUT_TRSW_UP2, 0x301);
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}
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}
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}
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/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/stop-playback */
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static void b43_nphy_stop_playback(struct b43_wldev *dev)
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{
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@ -2820,25 +2735,6 @@ static void b43_nphy_tx_pwr_ctrl_coef_setup(struct b43_wldev *dev)
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b43_nphy_stay_in_carrier_search(dev, false);
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}
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/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/BPHYInit */
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static void b43_nphy_bphy_init(struct b43_wldev *dev)
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{
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unsigned int i;
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u16 val;
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val = 0x1E1F;
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for (i = 0; i < 16; i++) {
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b43_phy_write(dev, B43_PHY_N_BMODE(0x88 + i), val);
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val -= 0x202;
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}
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val = 0x3E3F;
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for (i = 0; i < 16; i++) {
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b43_phy_write(dev, B43_PHY_N_BMODE(0x98 + i), val);
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val -= 0x202;
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}
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b43_phy_write(dev, B43_PHY_N_BMODE(0x38), 0x668);
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}
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/*
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* Restore RSSI Calibration
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* http://bcm-v4.sipsolutions.net/802.11/PHY/N/RestoreRssiCal
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@ -3865,10 +3761,104 @@ static void b43_nphy_set_rx_core_state(struct b43_wldev *dev, u8 mask)
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b43_mac_enable(dev);
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}
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/**************************************************
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* N-PHY init
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**************************************************/
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/*
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* Init N-PHY
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* http://bcm-v4.sipsolutions.net/802.11/PHY/Init/N
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* Upload the N-PHY tables.
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* http://bcm-v4.sipsolutions.net/802.11/PHY/N/InitTables
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*/
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static void b43_nphy_tables_init(struct b43_wldev *dev)
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{
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if (dev->phy.rev < 3)
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b43_nphy_rev0_1_2_tables_init(dev);
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else
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b43_nphy_rev3plus_tables_init(dev);
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}
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/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/MIMOConfig */
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static void b43_nphy_update_mimo_config(struct b43_wldev *dev, s32 preamble)
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{
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u16 mimocfg = b43_phy_read(dev, B43_NPHY_MIMOCFG);
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mimocfg |= B43_NPHY_MIMOCFG_AUTO;
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if (preamble == 1)
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mimocfg |= B43_NPHY_MIMOCFG_GFMIX;
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else
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mimocfg &= ~B43_NPHY_MIMOCFG_GFMIX;
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b43_phy_write(dev, B43_NPHY_MIMOCFG, mimocfg);
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}
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/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/BPHYInit */
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static void b43_nphy_bphy_init(struct b43_wldev *dev)
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{
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unsigned int i;
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u16 val;
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val = 0x1E1F;
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for (i = 0; i < 16; i++) {
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b43_phy_write(dev, B43_PHY_N_BMODE(0x88 + i), val);
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val -= 0x202;
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}
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val = 0x3E3F;
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for (i = 0; i < 16; i++) {
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b43_phy_write(dev, B43_PHY_N_BMODE(0x98 + i), val);
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val -= 0x202;
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}
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b43_phy_write(dev, B43_PHY_N_BMODE(0x38), 0x668);
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}
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/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/SuperSwitchInit */
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static void b43_nphy_superswitch_init(struct b43_wldev *dev, bool init)
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{
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if (dev->phy.rev >= 3) {
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if (!init)
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return;
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if (0 /* FIXME */) {
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b43_ntab_write(dev, B43_NTAB16(9, 2), 0x211);
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b43_ntab_write(dev, B43_NTAB16(9, 3), 0x222);
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b43_ntab_write(dev, B43_NTAB16(9, 8), 0x144);
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b43_ntab_write(dev, B43_NTAB16(9, 12), 0x188);
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}
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} else {
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b43_phy_write(dev, B43_NPHY_GPIO_LOOEN, 0);
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b43_phy_write(dev, B43_NPHY_GPIO_HIOEN, 0);
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switch (dev->dev->bus_type) {
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#ifdef CONFIG_B43_BCMA
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case B43_BUS_BCMA:
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bcma_chipco_gpio_control(&dev->dev->bdev->bus->drv_cc,
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0xFC00, 0xFC00);
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break;
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#endif
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#ifdef CONFIG_B43_SSB
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case B43_BUS_SSB:
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ssb_chipco_gpio_control(&dev->dev->sdev->bus->chipco,
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0xFC00, 0xFC00);
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break;
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#endif
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}
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b43_write32(dev, B43_MMIO_MACCTL,
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b43_read32(dev, B43_MMIO_MACCTL) &
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~B43_MACCTL_GPOUTSMSK);
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b43_write16(dev, B43_MMIO_GPIO_MASK,
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b43_read16(dev, B43_MMIO_GPIO_MASK) | 0xFC00);
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b43_write16(dev, B43_MMIO_GPIO_CONTROL,
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b43_read16(dev, B43_MMIO_GPIO_CONTROL) & ~0xFC00);
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if (init) {
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b43_phy_write(dev, B43_NPHY_RFCTL_LUT_TRSW_LO1, 0x2D8);
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b43_phy_write(dev, B43_NPHY_RFCTL_LUT_TRSW_UP1, 0x301);
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b43_phy_write(dev, B43_NPHY_RFCTL_LUT_TRSW_LO2, 0x2D8);
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b43_phy_write(dev, B43_NPHY_RFCTL_LUT_TRSW_UP2, 0x301);
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}
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}
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}
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/* http://bcm-v4.sipsolutions.net/802.11/PHY/Init/N */
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int b43_phy_initn(struct b43_wldev *dev)
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{
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struct ssb_sprom *sprom = dev->dev->bus_sprom;
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@ -4063,6 +4053,21 @@ int b43_phy_initn(struct b43_wldev *dev)
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return 0;
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}
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/**************************************************
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* Channel switching ops.
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**************************************************/
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static void b43_chantab_phy_upload(struct b43_wldev *dev,
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const struct b43_phy_n_sfo_cfg *e)
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{
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b43_phy_write(dev, B43_NPHY_BW1A, e->phy_bw1a);
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b43_phy_write(dev, B43_NPHY_BW2, e->phy_bw2);
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b43_phy_write(dev, B43_NPHY_BW3, e->phy_bw3);
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b43_phy_write(dev, B43_NPHY_BW4, e->phy_bw4);
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b43_phy_write(dev, B43_NPHY_BW5, e->phy_bw5);
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b43_phy_write(dev, B43_NPHY_BW6, e->phy_bw6);
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}
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/* http://bcm-v4.sipsolutions.net/802.11/PmuSpurAvoid */
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static void b43_nphy_pmu_spur_avoid(struct b43_wldev *dev, bool avoid)
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{
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@ -4278,6 +4283,10 @@ static int b43_nphy_set_channel(struct b43_wldev *dev,
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return 0;
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}
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/**************************************************
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* Basic PHY ops.
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**************************************************/
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static int b43_nphy_op_allocate(struct b43_wldev *dev)
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{
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struct b43_phy_n *nphy;
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