ACPI: Avoid array address overflow when _CST MWAIT hint bits are set
The Cx Register address obtained from the _CST object is used as the MWAIT hints if the register type is FFixedHW. And it is used to check whether the Cx type is supported or not. On some boxes the following Cx state package is obtained from _CST object: >{ ResourceTemplate () { Register (FFixedHW, 0x01, // Bit Width 0x02, // Bit Offset 0x0000000000889759, // Address 0x03, // Access Size ) }, 0x03, 0xF5, 0x015E } In such case we should use the bit[7:4] of Cx address to check whether the Cx type is supported or not. mask the MWAIT hint to avoid array address overflow Signed-off-by: Zhao Yakui <yakui.zhao@intel.com> Acked-by:Venki Pallipadi <venkatesh.pallipadi@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
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@ -56,6 +56,7 @@ static struct cstate_entry *cpu_cstate_entry; /* per CPU ptr */
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static short mwait_supported[ACPI_PROCESSOR_MAX_POWER];
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static short mwait_supported[ACPI_PROCESSOR_MAX_POWER];
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#define MWAIT_SUBSTATE_MASK (0xf)
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#define MWAIT_SUBSTATE_MASK (0xf)
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#define MWAIT_CSTATE_MASK (0xf)
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#define MWAIT_SUBSTATE_SIZE (4)
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#define MWAIT_SUBSTATE_SIZE (4)
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#define CPUID_MWAIT_LEAF (5)
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#define CPUID_MWAIT_LEAF (5)
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@ -98,7 +99,8 @@ int acpi_processor_ffh_cstate_probe(unsigned int cpu,
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cpuid(CPUID_MWAIT_LEAF, &eax, &ebx, &ecx, &edx);
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cpuid(CPUID_MWAIT_LEAF, &eax, &ebx, &ecx, &edx);
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/* Check whether this particular cx_type (in CST) is supported or not */
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/* Check whether this particular cx_type (in CST) is supported or not */
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cstate_type = (cx->address >> MWAIT_SUBSTATE_SIZE) + 1;
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cstate_type = ((cx->address >> MWAIT_SUBSTATE_SIZE) &
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MWAIT_CSTATE_MASK) + 1;
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edx_part = edx >> (cstate_type * MWAIT_SUBSTATE_SIZE);
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edx_part = edx >> (cstate_type * MWAIT_SUBSTATE_SIZE);
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num_cstate_subtype = edx_part & MWAIT_SUBSTATE_MASK;
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num_cstate_subtype = edx_part & MWAIT_SUBSTATE_MASK;
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