ARM: 5750/1: ep93xx/micro9: Update platform code
Update Contec Micro9 platform code Cc: Ryan Mallon <ryan@bluewatersys.com> Requires: 5749/1 Signed-off-by: Hubert Feurstein <hubert.feurstein@contec.at> Acked-by: H Hartley Sweeten <hsweeten@visionengravers.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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@ -130,28 +130,28 @@ config MACH_MICRO9
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bool
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config MACH_MICRO9H
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bool "Support Contec Hypercontrol Micro9-H"
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bool "Support Contec Micro9-High"
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depends on EP93XX_SDCE3_SYNC_PHYS_OFFSET
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select MACH_MICRO9
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help
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Say 'Y' here if you want your kernel to support the
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Contec Hypercontrol Micro9-H board.
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Contec Micro9-High board.
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config MACH_MICRO9M
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bool "Support Contec Hypercontrol Micro9-M"
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depends on EP93XX_SDCE3_SYNC_PHYS_OFFSET
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bool "Support Contec Micro9-Mid"
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depends on EP93XX_SDCE3_ASYNC_PHYS_OFFSET
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select MACH_MICRO9
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help
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Say 'Y' here if you want your kernel to support the
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Contec Hypercontrol Micro9-M board.
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Contec Micro9-Mid board.
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config MACH_MICRO9L
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bool "Support Contec Hypercontrol Micro9-L"
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bool "Support Contec Micro9-Lite"
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depends on EP93XX_SDCE3_SYNC_PHYS_OFFSET
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select MACH_MICRO9
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help
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Say 'Y' here if you want your kernel to support the
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Contec Hypercontrol Micro9-L board.
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Contec Micro9-Lite board.
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config MACH_TS72XX
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bool "Support Technologic Systems TS-72xx SBC"
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@ -218,6 +218,17 @@
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#define EP93XX_SYSCON_KEYTCHCLKDIV_ADIV (1<<16)
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#define EP93XX_SYSCON_KEYTCHCLKDIV_KEN (1<<15)
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#define EP93XX_SYSCON_KEYTCHCLKDIV_KDIV (1<<0)
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#define EP93XX_SYSCON_SYSCFG EP93XX_SYSCON_REG(0x9c)
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#define EP93XX_SYSCON_SYSCFG_REV_MASK (0xf0000000)
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#define EP93XX_SYSCON_SYSCFG_REV_SHIFT (28)
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#define EP93XX_SYSCON_SYSCFG_SBOOT (1<<8)
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#define EP93XX_SYSCON_SYSCFG_LCSN7 (1<<7)
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#define EP93XX_SYSCON_SYSCFG_LCSN6 (1<<6)
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#define EP93XX_SYSCON_SYSCFG_LASDO (1<<5)
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#define EP93XX_SYSCON_SYSCFG_LEEDA (1<<4)
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#define EP93XX_SYSCON_SYSCFG_LEECLK (1<<3)
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#define EP93XX_SYSCON_SYSCFG_LCSN2 (1<<1)
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#define EP93XX_SYSCON_SYSCFG_LCSN1 (1<<0)
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#define EP93XX_SYSCON_SWLOCK EP93XX_SYSCON_REG(0xc0)
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#define EP93XX_WATCHDOG_BASE EP93XX_APB_IOMEM(0x00140000)
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@ -22,52 +22,77 @@
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#include <asm/mach/arch.h>
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static struct ep93xx_eth_data micro9_eth_data = {
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.phy_id = 0x1f,
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};
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/*************************************************************************
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* Micro9 NOR Flash
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*
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* Micro9-High has up to 64MB of 32-bit flash on CS1
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* Micro9-Mid has up to 64MB of either 32-bit or 16-bit flash on CS1
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* Micro9-Lite uses a seperate MTD map driver for flash support
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*************************************************************************/
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static struct physmap_flash_data micro9_flash_data;
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static void __init micro9_init(void)
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{
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ep93xx_register_eth(µ9_eth_data, 1);
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}
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/*
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* Micro9-H
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*/
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#ifdef CONFIG_MACH_MICRO9H
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static struct physmap_flash_data micro9h_flash_data = {
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.width = 4,
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};
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static struct resource micro9h_flash_resource = {
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static struct resource micro9_flash_resource = {
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.start = EP93XX_CS1_PHYS_BASE,
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.end = EP93XX_CS1_PHYS_BASE + SZ_64M - 1,
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.flags = IORESOURCE_MEM,
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};
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static struct platform_device micro9h_flash = {
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static struct platform_device micro9_flash = {
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.name = "physmap-flash",
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.id = 0,
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.dev = {
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.platform_data = µ9h_flash_data,
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.platform_data = µ9_flash_data,
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},
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.num_resources = 1,
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.resource = µ9h_flash_resource,
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.resource = µ9_flash_resource,
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};
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static void __init micro9h_init(void)
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static void __init __micro9_register_flash(unsigned int width)
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{
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platform_device_register(µ9h_flash);
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micro9_flash_data.width = width;
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platform_device_register(µ9_flash);
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}
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static void __init micro9h_init_machine(void)
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static unsigned int __init micro9_detect_bootwidth(void)
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{
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u32 v;
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/* Detect the bus width of the external flash memory */
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v = __raw_readl(EP93XX_SYSCON_SYSCFG);
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if (v & EP93XX_SYSCON_SYSCFG_LCSN7)
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return 4; /* 32-bit */
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else
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return 2; /* 16-bit */
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}
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static void __init micro9_register_flash(void)
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{
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if (machine_is_micro9())
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__micro9_register_flash(4);
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else if (machine_is_micro9m())
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__micro9_register_flash(micro9_detect_bootwidth());
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}
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/*************************************************************************
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* Micro9 Ethernet
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*************************************************************************/
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static struct ep93xx_eth_data micro9_eth_data = {
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.phy_id = 0x1f,
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};
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static void __init micro9_init_machine(void)
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{
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ep93xx_init_devices();
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micro9_init();
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micro9h_init();
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ep93xx_register_eth(µ9_eth_data, 1);
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micro9_register_flash();
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}
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MACHINE_START(MICRO9, "Contec Hypercontrol Micro9-H")
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#ifdef CONFIG_MACH_MICRO9H
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MACHINE_START(MICRO9, "Contec Micro9-High")
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/* Maintainer: Hubert Feurstein <hubert.feurstein@contec.at> */
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.phys_io = EP93XX_APB_PHYS_BASE,
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.io_pg_offst = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc,
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@ -75,43 +100,25 @@ MACHINE_START(MICRO9, "Contec Hypercontrol Micro9-H")
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.map_io = ep93xx_map_io,
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.init_irq = ep93xx_init_irq,
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.timer = &ep93xx_timer,
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.init_machine = micro9h_init_machine,
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.init_machine = micro9_init_machine,
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MACHINE_END
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#endif
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/*
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* Micro9-M
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*/
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#ifdef CONFIG_MACH_MICRO9M
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static void __init micro9m_init_machine(void)
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{
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ep93xx_init_devices();
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micro9_init();
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}
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MACHINE_START(MICRO9M, "Contec Hypercontrol Micro9-M")
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MACHINE_START(MICRO9M, "Contec Micro9-Mid")
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/* Maintainer: Hubert Feurstein <hubert.feurstein@contec.at> */
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.phys_io = EP93XX_APB_PHYS_BASE,
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.io_pg_offst = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc,
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.boot_params = EP93XX_SDCE3_PHYS_BASE_SYNC + 0x100,
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.boot_params = EP93XX_SDCE3_PHYS_BASE_ASYNC + 0x100,
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.map_io = ep93xx_map_io,
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.init_irq = ep93xx_init_irq,
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.timer = &ep93xx_timer,
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.init_machine = micro9m_init_machine,
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.init_machine = micro9_init_machine,
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MACHINE_END
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#endif
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/*
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* Micro9-L
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*/
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#ifdef CONFIG_MACH_MICRO9L
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static void __init micro9l_init_machine(void)
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{
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ep93xx_init_devices();
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micro9_init();
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}
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MACHINE_START(MICRO9L, "Contec Hypercontrol Micro9-L")
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MACHINE_START(MICRO9L, "Contec Micro9-Lite")
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/* Maintainer: Hubert Feurstein <hubert.feurstein@contec.at> */
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.phys_io = EP93XX_APB_PHYS_BASE,
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.io_pg_offst = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc,
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.map_io = ep93xx_map_io,
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.init_irq = ep93xx_init_irq,
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.timer = &ep93xx_timer,
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.init_machine = micro9l_init_machine,
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.init_machine = micro9_init_machine,
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MACHINE_END
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#endif
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