fw_cfg: add DMA register
Add an optional <dma_off> kernel module (or command line) parameter using the following syntax: [qemu_fw_cfg.]ioport=<size>@<base>[:<ctrl_off>:<data_off>[:<dma_off>]] or [qemu_fw_cfg.]mmio=<size>@<base>[:<ctrl_off>:<data_off>[:<dma_off>]] and initializes the register address using given or default offset. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Gabriel Somlo <somlo@cmu.edu> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
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@ -10,20 +10,21 @@
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* and select subsets of aarch64), a Device Tree node (on arm), or using
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* a kernel module (or command line) parameter with the following syntax:
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*
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* [qemu_fw_cfg.]ioport=<size>@<base>[:<ctrl_off>:<data_off>]
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* [qemu_fw_cfg.]ioport=<size>@<base>[:<ctrl_off>:<data_off>[:<dma_off>]]
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* or
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* [qemu_fw_cfg.]mmio=<size>@<base>[:<ctrl_off>:<data_off>]
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* [qemu_fw_cfg.]mmio=<size>@<base>[:<ctrl_off>:<data_off>[:<dma_off>]]
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*
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* where:
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* <size> := size of ioport or mmio range
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* <base> := physical base address of ioport or mmio range
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* <ctrl_off> := (optional) offset of control register
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* <data_off> := (optional) offset of data register
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* <dma_off> := (optional) offset of dma register
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*
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* e.g.:
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* qemu_fw_cfg.ioport=2@0x510:0:1 (the default on x86)
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* qemu_fw_cfg.ioport=12@0x510:0:1:4 (the default on x86)
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* or
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* qemu_fw_cfg.mmio=0xA@0x9020000:8:0 (the default on arm)
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* qemu_fw_cfg.mmio=16@0x9020000:8:0:16 (the default on arm)
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*/
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#include <linux/module.h>
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@ -45,6 +46,7 @@ static resource_size_t fw_cfg_p_size;
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static void __iomem *fw_cfg_dev_base;
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static void __iomem *fw_cfg_reg_ctrl;
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static void __iomem *fw_cfg_reg_data;
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static void __iomem *fw_cfg_reg_dma;
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/* atomic access to fw_cfg device (potentially slow i/o, so using mutex) */
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static DEFINE_MUTEX(fw_cfg_dev_lock);
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@ -104,12 +106,14 @@ static void fw_cfg_io_cleanup(void)
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# if (defined(CONFIG_ARM) || defined(CONFIG_ARM64))
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# define FW_CFG_CTRL_OFF 0x08
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# define FW_CFG_DATA_OFF 0x00
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# define FW_CFG_DMA_OFF 0x10
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# elif (defined(CONFIG_PPC_PMAC) || defined(CONFIG_SPARC32)) /* ppc/mac,sun4m */
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# define FW_CFG_CTRL_OFF 0x00
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# define FW_CFG_DATA_OFF 0x02
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# elif (defined(CONFIG_X86) || defined(CONFIG_SPARC64)) /* x86, sun4u */
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# define FW_CFG_CTRL_OFF 0x00
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# define FW_CFG_DATA_OFF 0x01
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# define FW_CFG_DMA_OFF 0x04
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# else
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# error "QEMU FW_CFG not available on this architecture!"
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# endif
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@ -119,7 +123,7 @@ static void fw_cfg_io_cleanup(void)
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static int fw_cfg_do_platform_probe(struct platform_device *pdev)
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{
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char sig[FW_CFG_SIG_SIZE];
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struct resource *range, *ctrl, *data;
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struct resource *range, *ctrl, *data, *dma;
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/* acquire i/o range details */
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fw_cfg_is_mmio = false;
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@ -156,6 +160,7 @@ static int fw_cfg_do_platform_probe(struct platform_device *pdev)
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/* were custom register offsets provided (e.g. on the command line)? */
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ctrl = platform_get_resource_byname(pdev, IORESOURCE_REG, "ctrl");
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data = platform_get_resource_byname(pdev, IORESOURCE_REG, "data");
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dma = platform_get_resource_byname(pdev, IORESOURCE_REG, "dma");
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if (ctrl && data) {
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fw_cfg_reg_ctrl = fw_cfg_dev_base + ctrl->start;
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fw_cfg_reg_data = fw_cfg_dev_base + data->start;
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@ -165,6 +170,13 @@ static int fw_cfg_do_platform_probe(struct platform_device *pdev)
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fw_cfg_reg_data = fw_cfg_dev_base + FW_CFG_DATA_OFF;
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}
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if (dma)
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fw_cfg_reg_dma = fw_cfg_dev_base + dma->start;
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#ifdef FW_CFG_DMA_OFF
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else
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fw_cfg_reg_dma = fw_cfg_dev_base + FW_CFG_DMA_OFF;
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#endif
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/* verify fw_cfg device signature */
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if (fw_cfg_read_blob(FW_CFG_SIGNATURE, sig,
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0, FW_CFG_SIG_SIZE) < 0 ||
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@ -630,6 +642,7 @@ static struct platform_device *fw_cfg_cmdline_dev;
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/* use special scanf/printf modifier for phys_addr_t, resource_size_t */
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#define PH_ADDR_SCAN_FMT "@%" __PHYS_ADDR_PREFIX "i%n" \
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":%" __PHYS_ADDR_PREFIX "i" \
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":%" __PHYS_ADDR_PREFIX "i%n" \
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":%" __PHYS_ADDR_PREFIX "i%n"
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#define PH_ADDR_PR_1_FMT "0x%" __PHYS_ADDR_PREFIX "x@" \
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@ -639,12 +652,15 @@ static struct platform_device *fw_cfg_cmdline_dev;
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":%" __PHYS_ADDR_PREFIX "u" \
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":%" __PHYS_ADDR_PREFIX "u"
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#define PH_ADDR_PR_4_FMT PH_ADDR_PR_3_FMT \
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":%" __PHYS_ADDR_PREFIX "u"
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static int fw_cfg_cmdline_set(const char *arg, const struct kernel_param *kp)
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{
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struct resource res[3] = {};
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struct resource res[4] = {};
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char *str;
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phys_addr_t base;
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resource_size_t size, ctrl_off, data_off;
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resource_size_t size, ctrl_off, data_off, dma_off;
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int processed, consumed = 0;
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/* only one fw_cfg device can exist system-wide, so if one
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@ -660,19 +676,20 @@ static int fw_cfg_cmdline_set(const char *arg, const struct kernel_param *kp)
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/* consume "<size>" portion of command line argument */
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size = memparse(arg, &str);
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/* get "@<base>[:<ctrl_off>:<data_off>]" chunks */
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/* get "@<base>[:<ctrl_off>:<data_off>[:<dma_off>]]" chunks */
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processed = sscanf(str, PH_ADDR_SCAN_FMT,
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&base, &consumed,
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&ctrl_off, &data_off, &consumed);
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&ctrl_off, &data_off, &consumed,
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&dma_off, &consumed);
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/* sscanf() must process precisely 1 or 3 chunks:
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/* sscanf() must process precisely 1, 3 or 4 chunks:
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* <base> is mandatory, optionally followed by <ctrl_off>
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* and <data_off>;
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* and <data_off>, and <dma_off>;
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* there must be no extra characters after the last chunk,
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* so str[consumed] must be '\0'.
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*/
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if (str[consumed] ||
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(processed != 1 && processed != 3))
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(processed != 1 && processed != 3 && processed != 4))
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return -EINVAL;
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res[0].start = base;
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res[2].start = data_off;
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res[2].flags = IORESOURCE_REG;
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}
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if (processed > 3) {
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res[3].name = "dma";
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res[3].start = dma_off;
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res[3].flags = IORESOURCE_REG;
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}
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/* "processed" happens to nicely match the number of resources
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* we need to pass in to this platform device.
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@ -721,6 +743,13 @@ static int fw_cfg_cmdline_get(char *buf, const struct kernel_param *kp)
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fw_cfg_cmdline_dev->resource[0].start,
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fw_cfg_cmdline_dev->resource[1].start,
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fw_cfg_cmdline_dev->resource[2].start);
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case 4:
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return snprintf(buf, PAGE_SIZE, PH_ADDR_PR_4_FMT,
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resource_size(&fw_cfg_cmdline_dev->resource[0]),
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fw_cfg_cmdline_dev->resource[0].start,
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fw_cfg_cmdline_dev->resource[1].start,
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fw_cfg_cmdline_dev->resource[2].start,
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fw_cfg_cmdline_dev->resource[3].start);
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}
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/* Should never get here */
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