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media: v4l: fwnode: The clock lane is the first lane in lane_polarities 

The clock lane is the first lane in the lane_polarities array. Reflect this
consistently by putting the number of data lanes after the number of clock
lanes.

Fixes: 4ee236219f ("media: v4l2-fwnode: suppress a warning at OF parsing logic")

Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
zero-colors
Sakari Ailus 2017-08-14 06:22:14 -04:00 committed by Mauro Carvalho Chehab
parent b24f021579
commit 1526c704b3
2 changed files with 2 additions and 2 deletions
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2
drivers/media/v4l2-core/v4l2-fwnode.c
View File

@ -48,7 +48,7 @@ static int v4l2_fwnode_endpoint_parse_csi2_bus(struct fwnode_handle *fwnode,
rval = fwnode_property_read_u32_array(fwnode, "data-lanes", NULL, 0);
if (rval > 0) {
u32 array[MAX_DATA_LANES + 1];
u32 array[1 + MAX_DATA_LANES];
bus->num_data_lanes = min_t(int, MAX_DATA_LANES, rval);

2
include/media/v4l2-fwnode.h
View File

@ -42,7 +42,7 @@ struct v4l2_fwnode_bus_mipi_csi2 {
unsigned char data_lanes[MAX_DATA_LANES];
unsigned char clock_lane;
unsigned short num_data_lanes;
bool lane_polarities[MAX_DATA_LANES + 1];
bool lane_polarities[1 + MAX_DATA_LANES];
};
/**