MIPS: JZ4740: Drop old platform reset code
This work is now performed by the watchdog driver directly. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Acked-by: James Hogan <jhogan@kernel.org> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Guenter Roeck <linux@roeck-us.net> Cc: Wim Van Sebroeck <wim@linux-watchdog.org> Cc: Mathieu Malaterre <malat@debian.org> Cc: linux-mips@linux-mips.org Cc: linux-watchdog@vger.kernel.org Signed-off-by: James Hogan <jhogan@kernel.org>
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@ -12,18 +12,9 @@
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*
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*/
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#include <linux/clk.h>
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#include <linux/io.h>
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#include <linux/kernel.h>
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#include <linux/pm.h>
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#include <asm/reboot.h>
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#include <asm/mach-jz4740/base.h>
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#include <asm/mach-jz4740/timer.h>
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#include "reset.h"
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#include "clock.h"
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static void jz4740_halt(void)
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{
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@ -36,29 +27,7 @@ static void jz4740_halt(void)
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}
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}
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#define JZ_REG_WDT_DATA 0x00
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#define JZ_REG_WDT_COUNTER_ENABLE 0x04
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#define JZ_REG_WDT_COUNTER 0x08
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#define JZ_REG_WDT_CTRL 0x0c
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static void jz4740_restart(char *command)
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{
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void __iomem *wdt_base = ioremap(JZ4740_WDT_BASE_ADDR, 0x0f);
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jz4740_timer_enable_watchdog();
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writeb(0, wdt_base + JZ_REG_WDT_COUNTER_ENABLE);
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writew(0, wdt_base + JZ_REG_WDT_COUNTER);
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writew(0, wdt_base + JZ_REG_WDT_DATA);
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writew(BIT(2), wdt_base + JZ_REG_WDT_CTRL);
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writeb(1, wdt_base + JZ_REG_WDT_COUNTER_ENABLE);
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jz4740_halt();
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}
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void jz4740_reset_init(void)
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{
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_machine_restart = jz4740_restart;
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_machine_halt = jz4740_halt;
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}
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