hpt366: add hpt3xx_disable_fast_irq() helper
* Factor out disabling of "fast interrupt" prediction from init_hwif_hpt366() to hpt3xx_disable_fast_irq() helper. * Use hpt3xx_disable_fast_irq() in ->init_chipset instead of ->init_hwif method. This is a preparation for adding proper PCI PM support. While at it: * Cache chip type in chip_type variable in hpt3xx_disable_fast_irq(). There should be no functional changes caused by this patch. Cc: Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
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@ -971,6 +971,36 @@ static int __devinit hpt37x_calibrate_dpll(struct pci_dev *dev, u16 f_low, u16 f
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return 1;
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return 1;
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}
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}
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static void __devinit hpt3xx_disable_fast_irq(struct pci_dev *dev, u8 mcr_addr)
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{
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struct ide_host *host = pci_get_drvdata(dev);
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struct hpt_info *info = host->host_priv + (&dev->dev == host->dev[1]);
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u8 chip_type = info->chip_type;
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u8 new_mcr, old_mcr = 0;
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/*
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* Disable the "fast interrupt" prediction. Don't hold off
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* on interrupts. (== 0x01 despite what the docs say)
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*/
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pci_read_config_byte(dev, mcr_addr + 1, &old_mcr);
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if (chip_type >= HPT374)
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new_mcr = old_mcr & ~0x07;
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else if (chip_type >= HPT370) {
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new_mcr = old_mcr;
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new_mcr &= ~0x02;
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#ifdef HPT_DELAY_INTERRUPT
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new_mcr &= ~0x01;
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#else
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new_mcr |= 0x01;
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#endif
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} else /* HPT366 and HPT368 */
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new_mcr = old_mcr & ~0x80;
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if (new_mcr != old_mcr)
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pci_write_config_byte(dev, mcr_addr + 1, new_mcr);
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}
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static unsigned int __devinit init_chipset_hpt366(struct pci_dev *dev)
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static unsigned int __devinit init_chipset_hpt366(struct pci_dev *dev)
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{
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{
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unsigned long io_base = pci_resource_start(dev, 4);
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unsigned long io_base = pci_resource_start(dev, 4);
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@ -1208,9 +1238,11 @@ static unsigned int __devinit init_chipset_hpt366(struct pci_dev *dev)
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* NOTE: This register is only writeable via I/O space.
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* NOTE: This register is only writeable via I/O space.
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*/
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*/
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if (chip_type == HPT371N && clock == ATA_CLOCK_66MHZ)
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if (chip_type == HPT371N && clock == ATA_CLOCK_66MHZ)
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outb(inb(io_base + 0x9c) | 0x04, io_base + 0x9c);
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outb(inb(io_base + 0x9c) | 0x04, io_base + 0x9c);
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hpt3xx_disable_fast_irq(dev, 0x50);
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hpt3xx_disable_fast_irq(dev, 0x54);
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return dev->irq;
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return dev->irq;
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}
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}
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@ -1264,7 +1296,6 @@ static void __devinit init_hwif_hpt366(ide_hwif_t *hwif)
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struct hpt_info *info = hpt3xx_get_info(hwif->dev);
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struct hpt_info *info = hpt3xx_get_info(hwif->dev);
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int serialize = HPT_SERIALIZE_IO;
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int serialize = HPT_SERIALIZE_IO;
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u8 chip_type = info->chip_type;
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u8 chip_type = info->chip_type;
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u8 new_mcr, old_mcr = 0;
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/* Cache the channel's MISC. control registers' offset */
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/* Cache the channel's MISC. control registers' offset */
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hwif->select_data = hwif->channel ? 0x54 : 0x50;
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hwif->select_data = hwif->channel ? 0x54 : 0x50;
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@ -1287,29 +1318,6 @@ static void __devinit init_hwif_hpt366(ide_hwif_t *hwif)
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/* Serialize access to this device if needed */
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/* Serialize access to this device if needed */
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if (serialize && hwif->mate)
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if (serialize && hwif->mate)
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hwif->serialized = hwif->mate->serialized = 1;
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hwif->serialized = hwif->mate->serialized = 1;
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/*
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* Disable the "fast interrupt" prediction. Don't hold off
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* on interrupts. (== 0x01 despite what the docs say)
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*/
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pci_read_config_byte(dev, hwif->select_data + 1, &old_mcr);
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if (info->chip_type >= HPT374)
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new_mcr = old_mcr & ~0x07;
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else if (info->chip_type >= HPT370) {
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new_mcr = old_mcr;
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new_mcr &= ~0x02;
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#ifdef HPT_DELAY_INTERRUPT
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new_mcr &= ~0x01;
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#else
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new_mcr |= 0x01;
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#endif
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} else /* HPT366 and HPT368 */
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new_mcr = old_mcr & ~0x80;
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if (new_mcr != old_mcr)
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pci_write_config_byte(dev, hwif->select_data + 1, new_mcr);
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}
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}
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static int __devinit init_dma_hpt366(ide_hwif_t *hwif,
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static int __devinit init_dma_hpt366(ide_hwif_t *hwif,
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