Merge branch 'omap-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6
* 'omap-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6: hwspinlock: depend on OMAP4 ARM: OMAP2+: Fix warnings for GPMC interrupt OMAP4: PandaBoard: remove unused power regulators arm: mach-omap2: omap_l3_smx: fix irq handler setup arm: mach-omap2: devices: fix omap3_l3_init() return value
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commit
17c6dd8144
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@ -285,19 +285,6 @@ static int __init omap4_twl6030_hsmmc_init(struct omap2_hsmmc_info *controllers)
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return 0;
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}
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static struct regulator_init_data omap4_panda_vaux1 = {
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.constraints = {
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.min_uV = 1000000,
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.max_uV = 3000000,
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.apply_uV = true,
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.valid_modes_mask = REGULATOR_MODE_NORMAL
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| REGULATOR_MODE_STANDBY,
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.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
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| REGULATOR_CHANGE_MODE
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| REGULATOR_CHANGE_STATUS,
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},
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};
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static struct regulator_init_data omap4_panda_vaux2 = {
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.constraints = {
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.min_uV = 1200000,
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@ -353,19 +340,6 @@ static struct regulator_init_data omap4_panda_vpp = {
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},
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};
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static struct regulator_init_data omap4_panda_vusim = {
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.constraints = {
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.min_uV = 1200000,
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.max_uV = 2900000,
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.apply_uV = true,
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.valid_modes_mask = REGULATOR_MODE_NORMAL
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| REGULATOR_MODE_STANDBY,
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.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
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| REGULATOR_CHANGE_MODE
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| REGULATOR_CHANGE_STATUS,
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},
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};
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static struct regulator_init_data omap4_panda_vana = {
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.constraints = {
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.min_uV = 2100000,
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@ -424,12 +398,10 @@ static struct twl4030_platform_data omap4_panda_twldata = {
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/* Regulators */
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.vmmc = &omap4_panda_vmmc,
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.vpp = &omap4_panda_vpp,
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.vusim = &omap4_panda_vusim,
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.vana = &omap4_panda_vana,
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.vcxio = &omap4_panda_vcxio,
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.vdac = &omap4_panda_vdac,
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.vusb = &omap4_panda_vusb,
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.vaux1 = &omap4_panda_vaux1,
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.vaux2 = &omap4_panda_vaux2,
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.vaux3 = &omap4_panda_vaux3,
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.clk32kg = &omap4_panda_clk32kg,
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@ -66,7 +66,7 @@ static int __init omap3_l3_init(void)
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WARN(IS_ERR(od), "could not build omap_device for %s\n", oh_name);
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return PTR_ERR(od);
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return IS_ERR(od) ? PTR_ERR(od) : 0;
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}
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postcore_initcall(omap3_l3_init);
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@ -693,6 +693,7 @@ static int __init gpmc_init(void)
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{
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u32 l, irq;
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int cs, ret = -EINVAL;
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int gpmc_irq;
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char *ck = NULL;
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if (cpu_is_omap24xx()) {
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@ -701,12 +702,15 @@ static int __init gpmc_init(void)
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l = OMAP2420_GPMC_BASE;
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else
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l = OMAP34XX_GPMC_BASE;
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gpmc_irq = INT_34XX_GPMC_IRQ;
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} else if (cpu_is_omap34xx()) {
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ck = "gpmc_fck";
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l = OMAP34XX_GPMC_BASE;
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gpmc_irq = INT_34XX_GPMC_IRQ;
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} else if (cpu_is_omap44xx()) {
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ck = "gpmc_ck";
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l = OMAP44XX_GPMC_BASE;
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gpmc_irq = OMAP44XX_IRQ_GPMC;
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}
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if (WARN_ON(!ck))
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@ -739,16 +743,17 @@ static int __init gpmc_init(void)
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/* initalize the irq_chained */
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irq = OMAP_GPMC_IRQ_BASE;
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for (cs = 0; cs < GPMC_CS_NUM; cs++) {
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set_irq_handler(irq, handle_simple_irq);
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set_irq_chip_and_handler(irq, &dummy_irq_chip,
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handle_simple_irq);
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set_irq_flags(irq, IRQF_VALID);
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irq++;
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}
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ret = request_irq(INT_34XX_GPMC_IRQ,
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ret = request_irq(gpmc_irq,
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gpmc_handle_irq, IRQF_SHARED, "gpmc", gpmc_base);
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if (ret)
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pr_err("gpmc: irq-%d could not claim: err %d\n",
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INT_34XX_GPMC_IRQ, ret);
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gpmc_irq, ret);
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return ret;
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}
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postcore_initcall(gpmc_init);
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@ -757,8 +762,6 @@ static irqreturn_t gpmc_handle_irq(int irq, void *dev)
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{
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u8 cs;
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if (irq != INT_34XX_GPMC_IRQ)
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return IRQ_HANDLED;
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/* check cs to invoke the irq */
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cs = ((gpmc_read_reg(GPMC_PREFETCH_CONFIG1)) >> CS_NUM_SHIFT) & 0x7;
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if (OMAP_GPMC_IRQ_BASE+cs <= OMAP_GPMC_IRQ_END)
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@ -226,7 +226,6 @@ static int __init omap3_l3_probe(struct platform_device *pdev)
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struct omap3_l3 *l3;
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struct resource *res;
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int ret;
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int irq;
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l3 = kzalloc(sizeof(*l3), GFP_KERNEL);
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if (!l3) {
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@ -249,18 +248,17 @@ static int __init omap3_l3_probe(struct platform_device *pdev)
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goto err2;
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}
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irq = platform_get_irq(pdev, 0);
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ret = request_irq(irq, omap3_l3_app_irq,
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l3->debug_irq = platform_get_irq(pdev, 0);
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ret = request_irq(l3->debug_irq, omap3_l3_app_irq,
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IRQF_DISABLED | IRQF_TRIGGER_RISING,
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"l3-debug-irq", l3);
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if (ret) {
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dev_err(&pdev->dev, "couldn't request debug irq\n");
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goto err3;
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}
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l3->debug_irq = irq;
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irq = platform_get_irq(pdev, 1);
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ret = request_irq(irq, omap3_l3_app_irq,
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l3->app_irq = platform_get_irq(pdev, 1);
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ret = request_irq(l3->app_irq, omap3_l3_app_irq,
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IRQF_DISABLED | IRQF_TRIGGER_RISING,
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"l3-app-irq", l3);
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@ -269,7 +267,6 @@ static int __init omap3_l3_probe(struct platform_device *pdev)
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goto err4;
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}
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l3->app_irq = irq;
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goto err0;
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err4:
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@ -416,7 +416,7 @@
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/* GPMC related */
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#define OMAP_GPMC_IRQ_BASE (TWL_IRQ_END)
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#define OMAP_GPMC_NR_IRQS 7
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#define OMAP_GPMC_NR_IRQS 8
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#define OMAP_GPMC_IRQ_END (OMAP_GPMC_IRQ_BASE + OMAP_GPMC_NR_IRQS)
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@ -4,6 +4,7 @@
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config HWSPINLOCK
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tristate "Generic Hardware Spinlock framework"
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depends on ARCH_OMAP4
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help
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Say y here to support the generic hardware spinlock framework.
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You only need to enable this if you have hardware spinlock module
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