InfiniBand/RDMA fixes for 3.3:
- Fix a crash due to a regression (uninitialized refcnt) introduced in 3.2 with XRC support. - Close race in how ucma reports events when connect fails. - Process vendor-specific MADs in mlx4 so that eg FDR-10 data rate works. - Fix regression in qib caused by over-aggressive PCIe tuning. - Other small fixes for hardware drivers (ipath, nes, qib). -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iQIcBAABCAAGBQJPKNzJAAoJEENa44ZhAt0heQsP/1XmbosLnTZ3RFmEFcvW4Akn lCuxPqvF7tfMXzl4fkYOZ0bNvfB4xTbMVkWeQXnwK+e2p/kL8a/dWHaom79wgo7Z qAldncGAZrXEn8E3IcHLgWKMtHK9/HpJZvxkqlACa7muQKunS41Qa/QqIL5MoUQm PVsTkj3wjtdvN5XgrtmeY2efTY86tZDxDv8Glg76616SawsJ/J17FRMNAEl02vZ5 mFH2jtmlsSNNenwSkykwEJpX39teqLl/GreAKuxt2pZXhGi67aFcfu7OrS9LY5iy LNP5a+gmykOAjq+dx9DGj24LRD4+pisDXb851e2tcZ1l1jrgedBGTqPWXldR0acq +eFYmYmIGU7iFQZvKel9PFiPa2YEUZn8TtKN+e1vSkXqsLuI1qjBVf+i2fMUwszB TyxRjX62S9J01CY5XKlBySAAoVWcf2NyP6IKAIF4nOKXR5g4KtMUmmkL5BamV/7c YodAey8+0RTqLY2tgj0WKIswVAHg1ALXo8AzFwQRioau9Ro+T+2UsSzR6WzKpF7B uhAyZynW8zNb7esSuXiiD5PfI4+gUlEyeesxuRFhufp45i3NQhhkW+6bRM5m0YkJ MMww5UyFnXqiEiCrB35rAio+MrhIHLMYXP5/oPNblgYlRWpSN9ijnyeDrVN9D0aX 3BS5gakUhRntjwFcOz54 =81hM -----END PGP SIGNATURE----- Merge tag 'rdma-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/roland/infiniband InfiniBand/RDMA fixes for 3.3: - Fix a crash due to a regression (uninitialized refcnt) introduced in 3.2 with XRC support. - Close race in how ucma reports events when connect fails. - Process vendor-specific MADs in mlx4 so that eg FDR-10 data rate works. - Fix regression in qib caused by over-aggressive PCIe tuning. - Other small fixes for hardware drivers (ipath, nes, qib). * tag 'rdma-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/roland/infiniband: RDMA/nes: Copyright update IB/mlx4: pass SMP vendor-specific attribute MADs to firmware RDMA/nes: Fix fast memory registration opcode RDMA/nes: Fix fast memory registration length RDMA/ucma: Discard all events for new connections until accepted IB/qib: Roll back PCIe tuning change IB/qib: Use GFP_ATOMIC when locks are held RDMA/nes: Add missing rcu_read_unlock() in nes_addr_resolve_neigh() RDMA/nes: Fix for sending MPA reject frame IB/ipath: Calling PTR_ERR() on right variable in create_file() RDMA/core: Fix kernel panic by always initializing qp->usecnt
This commit is contained in:
commit
18d3e0d750
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@ -808,9 +808,12 @@ static ssize_t ucma_accept(struct ucma_file *file, const char __user *inbuf,
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return PTR_ERR(ctx);
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if (cmd.conn_param.valid) {
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ctx->uid = cmd.uid;
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ucma_copy_conn_param(&conn_param, &cmd.conn_param);
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mutex_lock(&file->mut);
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ret = rdma_accept(ctx->cm_id, &conn_param);
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if (!ret)
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ctx->uid = cmd.uid;
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mutex_unlock(&file->mut);
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} else
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ret = rdma_accept(ctx->cm_id, NULL);
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@ -1485,6 +1485,7 @@ ssize_t ib_uverbs_create_qp(struct ib_uverbs_file *file,
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qp->event_handler = attr.event_handler;
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qp->qp_context = attr.qp_context;
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qp->qp_type = attr.qp_type;
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atomic_set(&qp->usecnt, 0);
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atomic_inc(&pd->usecnt);
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atomic_inc(&attr.send_cq->usecnt);
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if (attr.recv_cq)
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@ -421,6 +421,7 @@ struct ib_qp *ib_create_qp(struct ib_pd *pd,
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qp->uobject = NULL;
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qp->qp_type = qp_init_attr->qp_type;
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atomic_set(&qp->usecnt, 0);
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if (qp_init_attr->qp_type == IB_QPT_XRC_TGT) {
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qp->event_handler = __ib_shared_qp_event_handler;
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qp->qp_context = qp;
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@ -430,7 +431,6 @@ struct ib_qp *ib_create_qp(struct ib_pd *pd,
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qp->xrcd = qp_init_attr->xrcd;
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atomic_inc(&qp_init_attr->xrcd->usecnt);
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INIT_LIST_HEAD(&qp->open_list);
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atomic_set(&qp->usecnt, 0);
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real_qp = qp;
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qp = __ib_open_qp(real_qp, qp_init_attr->event_handler,
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@ -89,7 +89,7 @@ static int create_file(const char *name, umode_t mode,
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error = ipathfs_mknod(parent->d_inode, *dentry,
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mode, fops, data);
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else
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error = PTR_ERR(dentry);
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error = PTR_ERR(*dentry);
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mutex_unlock(&parent->d_inode->i_mutex);
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return error;
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@ -257,12 +257,9 @@ static int ib_process_mad(struct ib_device *ibdev, int mad_flags, u8 port_num,
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return IB_MAD_RESULT_SUCCESS;
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/*
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* Don't process SMInfo queries or vendor-specific
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* MADs -- the SMA can't handle them.
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* Don't process SMInfo queries -- the SMA can't handle them.
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*/
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if (in_mad->mad_hdr.attr_id == IB_SMP_ATTR_SM_INFO ||
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((in_mad->mad_hdr.attr_id & IB_SMP_ATTR_VENDOR_MASK) ==
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IB_SMP_ATTR_VENDOR_MASK))
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if (in_mad->mad_hdr.attr_id == IB_SMP_ATTR_SM_INFO)
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return IB_MAD_RESULT_SUCCESS;
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} else if (in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_PERF_MGMT ||
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in_mad->mad_hdr.mgmt_class == MLX4_IB_VENDOR_CLASS1 ||
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2006 - 2009 Intel Corporation. All rights reserved.
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* Copyright (c) 2006 - 2011 Intel Corporation. All rights reserved.
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* Copyright (c) 2005 Open Grid Computing, Inc. All rights reserved.
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*
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* This software is available to you under a choice of one of two
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2006 - 2009 Intel Corporation. All rights reserved.
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* Copyright (c) 2006 - 2011 Intel Corporation. All rights reserved.
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* Copyright (c) 2005 Open Grid Computing, Inc. All rights reserved.
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*
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* This software is available to you under a choice of one of two
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2006 - 2009 Intel Corporation. All rights reserved.
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* Copyright (c) 2006 - 2011 Intel Corporation. All rights reserved.
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*
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* This software is available to you under a choice of one of two
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* licenses. You may choose to be licensed under the terms of the GNU
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@ -233,6 +233,7 @@ static int send_mpa_reject(struct nes_cm_node *cm_node)
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u8 *start_ptr = &start_addr;
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u8 **start_buff = &start_ptr;
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u16 buff_len = 0;
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struct ietf_mpa_v1 *mpa_frame;
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skb = dev_alloc_skb(MAX_CM_BUFFER);
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if (!skb) {
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/* send an MPA reject frame */
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cm_build_mpa_frame(cm_node, start_buff, &buff_len, NULL, MPA_KEY_REPLY);
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mpa_frame = (struct ietf_mpa_v1 *)*start_buff;
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mpa_frame->flags |= IETF_MPA_FLAGS_REJECT;
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form_cm_frame(skb, cm_node, NULL, 0, *start_buff, buff_len, SET_ACK | SET_FIN);
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cm_node->state = NES_CM_STATE_FIN_WAIT1;
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@ -1360,8 +1363,7 @@ static int nes_addr_resolve_neigh(struct nes_vnic *nesvnic, u32 dst_ip, int arpi
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if (!memcmp(nesadapter->arp_table[arpindex].mac_addr,
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neigh->ha, ETH_ALEN)) {
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/* Mac address same as in nes_arp_table */
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ip_rt_put(rt);
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return rc;
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goto out;
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}
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nes_manage_arp_cache(nesvnic->netdev,
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neigh_event_send(neigh, NULL);
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}
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}
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out:
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rcu_read_unlock();
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ip_rt_put(rt);
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return rc;
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2006 - 2009 Intel Corporation. All rights reserved.
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* Copyright (c) 2006 - 2011 Intel Corporation. All rights reserved.
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*
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* This software is available to you under a choice of one of two
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* licenses. You may choose to be licensed under the terms of the GNU
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2006 - 2009 Intel Corporation. All rights reserved.
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* Copyright (c) 2006 - 2011 Intel Corporation. All rights reserved.
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*
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* This software is available to you under a choice of one of two
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* licenses. You may choose to be licensed under the terms of the GNU
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2006 - 2009 Intel Corporation. All rights reserved.
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* Copyright (c) 2006 - 2011 Intel Corporation. All rights reserved.
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*
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* This software is available to you under a choice of one of two
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* licenses. You may choose to be licensed under the terms of the GNU
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2006 - 2009 Intel Corporation. All rights reserved.
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* Copyright (c) 2006 - 2011 Intel Corporation. All rights reserved.
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*
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* This software is available to you under a choice of one of two
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* licenses. You may choose to be licensed under the terms of the GNU
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2006 - 2009 Intel-NE, Inc. All rights reserved.
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* Copyright (c) 2006 - 2011 Intel-NE, Inc. All rights reserved.
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*
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* This software is available to you under a choice of one of two
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* licenses. You may choose to be licensed under the terms of the GNU
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2010 Intel-NE, Inc. All rights reserved.
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* Copyright (c) 2006 - 2011 Intel-NE, Inc. All rights reserved.
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*
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* This software is available to you under a choice of one of two
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* licenses. You may choose to be licensed under the terms of the GNU
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2006 - 2009 Intel Corporation. All rights reserved.
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* Copyright (c) 2006 - 2011 Intel Corporation. All rights reserved.
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*
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* This software is available to you under a choice of one of two
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* licenses. You may choose to be licensed under the terms of the GNU
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2006 - 2009 Intel Corporation. All rights reserved.
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* Copyright (c) 2006 - 2011 Intel Corporation. All rights reserved.
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* Copyright (c) 2005 Topspin Communications. All rights reserved.
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* Copyright (c) 2005 Cisco Systems. All rights reserved.
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* Copyright (c) 2005 Open Grid Computing, Inc. All rights reserved.
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2006 - 2009 Intel Corporation. All rights reserved.
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* Copyright (c) 2006 - 2011 Intel Corporation. All rights reserved.
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*
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* This software is available to you under a choice of one of two
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* licenses. You may choose to be licensed under the terms of the GNU
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2006 - 2009 Intel Corporation. All rights reserved.
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* Copyright (c) 2006 - 2011 Intel Corporation. All rights reserved.
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*
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* This software is available to you under a choice of one of two
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* licenses. You may choose to be licensed under the terms of the GNU
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@ -3427,6 +3427,8 @@ static int nes_post_send(struct ib_qp *ibqp, struct ib_send_wr *ib_wr,
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set_wqe_32bit_value(wqe->wqe_words,
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NES_IWARP_SQ_FMR_WQE_LENGTH_LOW_IDX,
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ib_wr->wr.fast_reg.length);
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set_wqe_32bit_value(wqe->wqe_words,
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NES_IWARP_SQ_FMR_WQE_LENGTH_HIGH_IDX, 0);
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set_wqe_32bit_value(wqe->wqe_words,
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NES_IWARP_SQ_FMR_WQE_MR_STAG_IDX,
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ib_wr->wr.fast_reg.rkey);
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entry->opcode = IB_WC_SEND;
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break;
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case NES_IWARP_SQ_OP_LOCINV:
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entry->opcode = IB_WR_LOCAL_INV;
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entry->opcode = IB_WC_LOCAL_INV;
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break;
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case NES_IWARP_SQ_OP_FAST_REG:
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entry->opcode = IB_WC_FAST_REG_MR;
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2006 - 2009 Intel Corporation. All rights reserved.
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* Copyright (c) 2006 - 2011 Intel Corporation. All rights reserved.
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* Copyright (c) 2005 Open Grid Computing, Inc. All rights reserved.
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*
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* This software is available to you under a choice of one of two
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@ -2105,7 +2105,7 @@ static void alloc_dummy_hdrq(struct qib_devdata *dd)
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dd->cspec->dummy_hdrq = dma_alloc_coherent(&dd->pcidev->dev,
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dd->rcd[0]->rcvhdrq_size,
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&dd->cspec->dummy_hdrq_phys,
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GFP_KERNEL | __GFP_COMP);
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GFP_ATOMIC | __GFP_COMP);
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if (!dd->cspec->dummy_hdrq) {
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qib_devinfo(dd->pcidev, "Couldn't allocate dummy hdrq\n");
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/* fallback to just 0'ing */
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@ -560,7 +560,7 @@ static int qib_tune_pcie_coalesce(struct qib_devdata *dd)
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* BIOS may not set PCIe bus-utilization parameters for best performance.
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* Check and optionally adjust them to maximize our throughput.
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*/
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static int qib_pcie_caps = 0x51;
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static int qib_pcie_caps;
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module_param_named(pcie_caps, qib_pcie_caps, int, S_IRUGO);
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MODULE_PARM_DESC(pcie_caps, "Max PCIe tuning: Payload (0..3), ReadReq (4..7)");
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