x86 / msr: add 64bit _on_cpu access functions
Having 64-bit MSR access methods on given CPU can avoid shifting and simplify MSR content manipulation. We already have other combinations of rdmsrl_xxx and wrmsrl_xxx but missing the _on_cpu version. Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Signed-off-by: Jacob Pan <jacob.jun.pan@linux.intel.com> Reviewed-by: H. Peter Anvin <hpa@linux.intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
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@ -218,10 +218,14 @@ void msrs_free(struct msr *msrs);
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#ifdef CONFIG_SMP
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int rdmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h);
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int wrmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h);
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int rdmsrl_on_cpu(unsigned int cpu, u32 msr_no, u64 *q);
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int wrmsrl_on_cpu(unsigned int cpu, u32 msr_no, u64 q);
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void rdmsr_on_cpus(const struct cpumask *mask, u32 msr_no, struct msr *msrs);
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void wrmsr_on_cpus(const struct cpumask *mask, u32 msr_no, struct msr *msrs);
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int rdmsr_safe_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h);
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int wrmsr_safe_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h);
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int rdmsrl_safe_on_cpu(unsigned int cpu, u32 msr_no, u64 *q);
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int wrmsrl_safe_on_cpu(unsigned int cpu, u32 msr_no, u64 q);
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int rdmsr_safe_regs_on_cpu(unsigned int cpu, u32 regs[8]);
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int wrmsr_safe_regs_on_cpu(unsigned int cpu, u32 regs[8]);
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#else /* CONFIG_SMP */
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@ -235,6 +239,16 @@ static inline int wrmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h)
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wrmsr(msr_no, l, h);
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return 0;
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}
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static inline int rdmsrl_on_cpu(unsigned int cpu, u32 msr_no, u64 *q)
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{
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rdmsrl(msr_no, *q);
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return 0;
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}
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static inline int wrmsrl_on_cpu(unsigned int cpu, u32 msr_no, u64 q)
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{
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wrmsrl(msr_no, q);
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return 0;
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}
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static inline void rdmsr_on_cpus(const struct cpumask *m, u32 msr_no,
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struct msr *msrs)
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{
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@ -254,6 +268,14 @@ static inline int wrmsr_safe_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h)
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{
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return wrmsr_safe(msr_no, l, h);
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}
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static inline int rdmsrl_safe_on_cpu(unsigned int cpu, u32 msr_no, u64 *q)
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{
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return rdmsrl_safe(msr_no, q);
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}
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static inline int wrmsrl_safe_on_cpu(unsigned int cpu, u32 msr_no, u64 q)
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{
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return wrmsrl_safe(msr_no, q);
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}
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static inline int rdmsr_safe_regs_on_cpu(unsigned int cpu, u32 regs[8])
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{
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return rdmsr_safe_regs(regs);
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@ -47,6 +47,21 @@ int rdmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h)
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}
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EXPORT_SYMBOL(rdmsr_on_cpu);
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int rdmsrl_on_cpu(unsigned int cpu, u32 msr_no, u64 *q)
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{
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int err;
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struct msr_info rv;
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memset(&rv, 0, sizeof(rv));
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rv.msr_no = msr_no;
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err = smp_call_function_single(cpu, __rdmsr_on_cpu, &rv, 1);
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*q = rv.reg.q;
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return err;
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}
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EXPORT_SYMBOL(rdmsrl_on_cpu);
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int wrmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h)
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{
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int err;
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@ -63,6 +78,22 @@ int wrmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h)
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}
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EXPORT_SYMBOL(wrmsr_on_cpu);
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int wrmsrl_on_cpu(unsigned int cpu, u32 msr_no, u64 q)
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{
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int err;
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struct msr_info rv;
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memset(&rv, 0, sizeof(rv));
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rv.msr_no = msr_no;
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rv.reg.q = q;
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err = smp_call_function_single(cpu, __wrmsr_on_cpu, &rv, 1);
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return err;
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}
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EXPORT_SYMBOL(wrmsrl_on_cpu);
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static void __rwmsr_on_cpus(const struct cpumask *mask, u32 msr_no,
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struct msr *msrs,
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void (*msr_func) (void *info))
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@ -159,6 +190,37 @@ int wrmsr_safe_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h)
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}
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EXPORT_SYMBOL(wrmsr_safe_on_cpu);
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int wrmsrl_safe_on_cpu(unsigned int cpu, u32 msr_no, u64 q)
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{
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int err;
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struct msr_info rv;
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memset(&rv, 0, sizeof(rv));
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rv.msr_no = msr_no;
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rv.reg.q = q;
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err = smp_call_function_single(cpu, __wrmsr_safe_on_cpu, &rv, 1);
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return err ? err : rv.err;
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}
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EXPORT_SYMBOL(wrmsrl_safe_on_cpu);
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int rdmsrl_safe_on_cpu(unsigned int cpu, u32 msr_no, u64 *q)
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{
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int err;
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struct msr_info rv;
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memset(&rv, 0, sizeof(rv));
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rv.msr_no = msr_no;
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err = smp_call_function_single(cpu, __rdmsr_safe_on_cpu, &rv, 1);
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*q = rv.reg.q;
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return err ? err : rv.err;
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}
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EXPORT_SYMBOL(rdmsrl_safe_on_cpu);
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/*
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* These variants are significantly slower, but allows control over
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* the entire 32-bit GPR set.
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