Automatic merge of /spare/repo/netdev-2.6 branch smc91x
This commit is contained in:
commit
1a9505996d
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@ -129,7 +129,7 @@ MODULE_PARM_DESC(nowait, "set to 1 for no wait state");
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/*
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* Transmit timeout, default 5 seconds.
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*/
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static int watchdog = 5000;
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static int watchdog = 1000;
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module_param(watchdog, int, 0400);
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MODULE_PARM_DESC(watchdog, "transmit timeout in milliseconds");
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@ -660,15 +660,14 @@ static void smc_hardware_send_pkt(unsigned long data)
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SMC_outw(((len & 1) ? (0x2000 | buf[len-1]) : 0), ioaddr, DATA_REG);
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/*
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* If THROTTLE_TX_PKTS is set, we look at the TX_EMPTY flag
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* before queueing this packet for TX, and if it's clear then
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* we stop the queue here. This will have the effect of
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* having at most 2 packets queued for TX in the chip's memory
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* at all time. If THROTTLE_TX_PKTS is not set then the queue
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* is stopped only when memory allocation (MC_ALLOC) does not
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* succeed right away.
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* If THROTTLE_TX_PKTS is set, we stop the queue here. This will
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* have the effect of having at most one packet queued for TX
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* in the chip's memory at all time.
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*
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* If THROTTLE_TX_PKTS is not set then the queue is stopped only
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* when memory allocation (MC_ALLOC) does not succeed right away.
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*/
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if (THROTTLE_TX_PKTS && !(SMC_GET_INT() & IM_TX_EMPTY_INT))
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if (THROTTLE_TX_PKTS)
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netif_stop_queue(dev);
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/* queue the packet for TX */
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@ -792,17 +791,20 @@ static void smc_tx(struct net_device *dev)
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DBG(2, "%s: TX STATUS 0x%04x PNR 0x%02x\n",
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dev->name, tx_status, packet_no);
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if (!(tx_status & TS_SUCCESS))
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if (!(tx_status & ES_TX_SUC))
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lp->stats.tx_errors++;
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if (tx_status & TS_LOSTCAR)
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if (tx_status & ES_LOSTCARR)
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lp->stats.tx_carrier_errors++;
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if (tx_status & TS_LATCOL) {
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PRINTK("%s: late collision occurred on last xmit\n", dev->name);
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if (tx_status & (ES_LATCOL | ES_16COL)) {
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PRINTK("%s: %s occurred on last xmit\n", dev->name,
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(tx_status & ES_LATCOL) ?
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"late collision" : "too many collisions");
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lp->stats.tx_window_errors++;
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if (!(lp->stats.tx_window_errors & 63) && net_ratelimit()) {
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printk(KERN_INFO "%s: unexpectedly large numbers of "
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"late collisions. Please check duplex "
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printk(KERN_INFO "%s: unexpectedly large number of "
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"bad collisions. Please check duplex "
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"setting.\n", dev->name);
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}
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}
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@ -1236,7 +1238,7 @@ static void smc_10bt_check_media(struct net_device *dev, int init)
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old_carrier = netif_carrier_ok(dev) ? 1 : 0;
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SMC_SELECT_BANK(0);
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new_carrier = SMC_inw(ioaddr, EPH_STATUS_REG) & ES_LINK_OK ? 1 : 0;
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new_carrier = (SMC_GET_EPH_STATUS() & ES_LINK_OK) ? 1 : 0;
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SMC_SELECT_BANK(2);
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if (init || (old_carrier != new_carrier)) {
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@ -1308,15 +1310,16 @@ static irqreturn_t smc_interrupt(int irq, void *dev_id, struct pt_regs *regs)
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if (!status)
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break;
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if (status & IM_RCV_INT) {
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DBG(3, "%s: RX irq\n", dev->name);
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smc_rcv(dev);
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} else if (status & IM_TX_INT) {
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if (status & IM_TX_INT) {
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/* do this before RX as it will free memory quickly */
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DBG(3, "%s: TX int\n", dev->name);
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smc_tx(dev);
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SMC_ACK_INT(IM_TX_INT);
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if (THROTTLE_TX_PKTS)
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netif_wake_queue(dev);
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} else if (status & IM_RCV_INT) {
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DBG(3, "%s: RX irq\n", dev->name);
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smc_rcv(dev);
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} else if (status & IM_ALLOC_INT) {
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DBG(3, "%s: Allocation irq\n", dev->name);
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tasklet_hi_schedule(&lp->tx_task);
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@ -1337,7 +1340,10 @@ static irqreturn_t smc_interrupt(int irq, void *dev_id, struct pt_regs *regs)
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/* multiple collisions */
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lp->stats.collisions += card_stats & 0xF;
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} else if (status & IM_RX_OVRN_INT) {
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DBG(1, "%s: RX overrun\n", dev->name);
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DBG(1, "%s: RX overrun (EPH_ST 0x%04x)\n", dev->name,
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({ int eph_st; SMC_SELECT_BANK(0);
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eph_st = SMC_GET_EPH_STATUS();
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SMC_SELECT_BANK(2); eph_st; }) );
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SMC_ACK_INT(IM_RX_OVRN_INT);
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lp->stats.rx_errors++;
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lp->stats.rx_fifo_errors++;
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@ -1389,7 +1395,7 @@ static void smc_timeout(struct net_device *dev)
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{
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struct smc_local *lp = netdev_priv(dev);
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void __iomem *ioaddr = lp->base;
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int status, mask, meminfo, fifo;
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int status, mask, eph_st, meminfo, fifo;
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DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
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@ -1398,11 +1404,13 @@ static void smc_timeout(struct net_device *dev)
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mask = SMC_GET_INT_MASK();
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fifo = SMC_GET_FIFO();
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SMC_SELECT_BANK(0);
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eph_st = SMC_GET_EPH_STATUS();
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meminfo = SMC_GET_MIR();
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SMC_SELECT_BANK(2);
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spin_unlock_irq(&lp->lock);
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PRINTK( "%s: INT 0x%02x MASK 0x%02x MEM 0x%04x FIFO 0x%04x\n",
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dev->name, status, mask, meminfo, fifo );
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PRINTK( "%s: TX timeout (INT 0x%02x INTMASK 0x%02x "
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"MEM 0x%04x FIFO 0x%04x EPH_ST 0x%04x)\n",
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dev->name, status, mask, meminfo, fifo, eph_st );
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smc_reset(dev);
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smc_enable(dev);
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@ -1863,7 +1871,7 @@ static int __init smc_probe(struct net_device *dev, void __iomem *ioaddr)
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SMC_SELECT_BANK(1);
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val = SMC_GET_BASE();
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val = ((val & 0x1F00) >> 3) << SMC_IO_SHIFT;
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if (((unsigned long)ioaddr & ((PAGE_SIZE-1)<<SMC_IO_SHIFT)) != val) { /*XXX: WTF? */
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if (((unsigned int)ioaddr & (0x3e0 << SMC_IO_SHIFT)) != val) {
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printk("%s: IOADDR %p doesn't match configuration (%x).\n",
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CARDNAME, ioaddr, val);
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}
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@ -151,7 +151,7 @@
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/* We actually can't write halfwords properly if not word aligned */
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static inline void
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SMC_outw(u16 val, unsigned long ioaddr, int reg)
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SMC_outw(u16 val, void __iomem *ioaddr, int reg)
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{
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if (reg & 2) {
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unsigned int v = val << 16;
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@ -317,7 +317,7 @@ static inline void SMC_outsw (unsigned long a, int r, unsigned char* p, int l)
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#define SMC_insl(a, r, p, l) \
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smc_pxa_dma_insl(a, lp->physaddr, r, dev->dma, p, l)
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static inline void
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smc_pxa_dma_insl(u_long ioaddr, u_long physaddr, int reg, int dma,
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smc_pxa_dma_insl(void __iomem *ioaddr, u_long physaddr, int reg, int dma,
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u_char *buf, int len)
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{
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dma_addr_t dmabuf;
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@ -355,7 +355,7 @@ smc_pxa_dma_insl(u_long ioaddr, u_long physaddr, int reg, int dma,
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#define SMC_insw(a, r, p, l) \
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smc_pxa_dma_insw(a, lp->physaddr, r, dev->dma, p, l)
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static inline void
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smc_pxa_dma_insw(u_long ioaddr, u_long physaddr, int reg, int dma,
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smc_pxa_dma_insw(void __iomem *ioaddr, u_long physaddr, int reg, int dma,
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u_char *buf, int len)
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{
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dma_addr_t dmabuf;
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@ -680,14 +680,6 @@ static const char * chip_ids[ 16 ] = {
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NULL, NULL, NULL};
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/*
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. Transmit status bits
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*/
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#define TS_SUCCESS 0x0001
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#define TS_LOSTCAR 0x0400
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#define TS_LATCOL 0x0200
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#define TS_16COL 0x0010
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/*
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. Receive status bits
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*/
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@ -845,6 +837,7 @@ static const char * chip_ids[ 16 ] = {
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#define SMC_GET_FIFO() SMC_inw( ioaddr, FIFO_REG )
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#define SMC_GET_PTR() SMC_inw( ioaddr, PTR_REG )
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#define SMC_SET_PTR(x) SMC_outw( x, ioaddr, PTR_REG )
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#define SMC_GET_EPH_STATUS() SMC_inw( ioaddr, EPH_STATUS_REG )
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#define SMC_GET_RCR() SMC_inw( ioaddr, RCR_REG )
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#define SMC_SET_RCR(x) SMC_outw( x, ioaddr, RCR_REG )
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#define SMC_GET_REV() SMC_inw( ioaddr, REV_REG )
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