mtd: docg3 refactor cascade floors structure
Group floors into a common cascade structure. This will provide a common structure to store common data to all cascaded docg3 chips, like IO addressing, locking protection. Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
This commit is contained in:
Robert Jarzmik
David Woodhouse
parent
a2b3d284ed
commit
1b15a5f93b
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@ -80,14 +80,9 @@ static struct nand_ecclayout docg3_oobinfo = {
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.oobavail = 8,
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};
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/**
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* struct docg3_bch - BCH engine
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*/
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static struct bch_control *docg3_bch;
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static inline u8 doc_readb(struct docg3 *docg3, u16 reg)
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{
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u8 val = readb(docg3->base + reg);
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u8 val = readb(docg3->cascade->base + reg);
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trace_docg3_io(0, 8, reg, (int)val);
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return val;
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@ -95,7 +90,7 @@ static inline u8 doc_readb(struct docg3 *docg3, u16 reg)
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static inline u16 doc_readw(struct docg3 *docg3, u16 reg)
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{
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u16 val = readw(docg3->base + reg);
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u16 val = readw(docg3->cascade->base + reg);
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trace_docg3_io(0, 16, reg, (int)val);
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return val;
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@ -103,13 +98,13 @@ static inline u16 doc_readw(struct docg3 *docg3, u16 reg)
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static inline void doc_writeb(struct docg3 *docg3, u8 val, u16 reg)
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{
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writeb(val, docg3->base + reg);
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writeb(val, docg3->cascade->base + reg);
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trace_docg3_io(1, 8, reg, val);
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}
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static inline void doc_writew(struct docg3 *docg3, u16 val, u16 reg)
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{
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writew(val, docg3->base + reg);
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writew(val, docg3->cascade->base + reg);
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trace_docg3_io(1, 16, reg, val);
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}
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@ -643,7 +638,8 @@ static int doc_ecc_bch_fix_data(struct docg3 *docg3, void *buf, u8 *hwecc)
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for (i = 0; i < DOC_ECC_BCH_SIZE; i++)
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ecc[i] = bitrev8(hwecc[i]);
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numerrs = decode_bch(docg3_bch, NULL, DOC_ECC_BCH_COVERED_BYTES,
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numerrs = decode_bch(docg3->cascade->bch, NULL,
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DOC_ECC_BCH_COVERED_BYTES,
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NULL, ecc, NULL, errorpos);
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BUG_ON(numerrs == -EINVAL);
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if (numerrs < 0)
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@ -1599,13 +1595,13 @@ static struct device_attribute doc_sys_attrs[DOC_MAX_NBFLOORS][4] = {
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};
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static int doc_register_sysfs(struct platform_device *pdev,
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struct mtd_info **floors)
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struct docg3_cascade *cascade)
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{
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int ret = 0, floor, i = 0;
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struct device *dev = &pdev->dev;
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for (floor = 0; !ret && floor < DOC_MAX_NBFLOORS && floors[floor];
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floor++)
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for (floor = 0; !ret && floor < DOC_MAX_NBFLOORS &&
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cascade->floors[floor]; floor++)
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for (i = 0; !ret && i < 4; i++)
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ret = device_create_file(dev, &doc_sys_attrs[floor][i]);
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if (!ret)
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@ -1619,12 +1615,12 @@ static int doc_register_sysfs(struct platform_device *pdev,
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}
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static void doc_unregister_sysfs(struct platform_device *pdev,
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struct mtd_info **floors)
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struct docg3_cascade *cascade)
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{
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struct device *dev = &pdev->dev;
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int floor, i;
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for (floor = 0; floor < DOC_MAX_NBFLOORS && floors[floor];
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for (floor = 0; floor < DOC_MAX_NBFLOORS && cascade->floors[floor];
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floor++)
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for (i = 0; i < 4; i++)
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device_remove_file(dev, &doc_sys_attrs[floor][i]);
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@ -1833,6 +1829,7 @@ static void __init doc_set_driver_info(int chip_id, struct mtd_info *mtd)
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* @base: the io space where the device is probed
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* @floor: the floor of the probed device
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* @dev: the device
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* @cascade: the cascade of chips this devices will belong to
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*
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* Checks whether a device at the specified IO range, and floor is available.
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*
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@ -1841,7 +1838,7 @@ static void __init doc_set_driver_info(int chip_id, struct mtd_info *mtd)
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* launched.
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*/
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static struct mtd_info * __init
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doc_probe_device(void __iomem *base, int floor, struct device *dev)
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doc_probe_device(struct docg3_cascade *cascade, int floor, struct device *dev)
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{
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int ret, bbt_nbpages;
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u16 chip_id, chip_id_inv;
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@ -1864,7 +1861,7 @@ doc_probe_device(void __iomem *base, int floor, struct device *dev)
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docg3->dev = dev;
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docg3->device_id = floor;
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docg3->base = base;
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docg3->cascade = cascade;
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doc_set_device_id(docg3, docg3->device_id);
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if (!floor)
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doc_set_asic_mode(docg3, DOC_ASICMODE_RESET);
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@ -1881,7 +1878,7 @@ doc_probe_device(void __iomem *base, int floor, struct device *dev)
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switch (chip_id) {
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case DOC_CHIPID_G3:
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doc_info("Found a G3 DiskOnChip at addr %p, floor %d\n",
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base, floor);
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docg3->cascade->base, floor);
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break;
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default:
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doc_err("Chip id %04x is not a DiskOnChip G3 chip\n", chip_id);
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@ -1926,10 +1923,12 @@ static void doc_release_device(struct mtd_info *mtd)
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static int docg3_resume(struct platform_device *pdev)
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{
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int i;
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struct docg3_cascade *cascade;
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struct mtd_info **docg3_floors, *mtd;
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struct docg3 *docg3;
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docg3_floors = platform_get_drvdata(pdev);
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cascade = platform_get_drvdata(pdev);
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docg3_floors = cascade->floors;
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mtd = docg3_floors[0];
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docg3 = mtd->priv;
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@ -1951,11 +1950,13 @@ static int docg3_resume(struct platform_device *pdev)
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static int docg3_suspend(struct platform_device *pdev, pm_message_t state)
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{
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int floor, i;
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struct docg3_cascade *cascade;
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struct mtd_info **docg3_floors, *mtd;
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struct docg3 *docg3;
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u8 ctrl, pwr_down;
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docg3_floors = platform_get_drvdata(pdev);
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cascade = platform_get_drvdata(pdev);
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docg3_floors = cascade->floors;
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for (floor = 0; floor < DOC_MAX_NBFLOORS; floor++) {
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mtd = docg3_floors[floor];
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if (!mtd)
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@ -2005,7 +2006,7 @@ static int __init docg3_probe(struct platform_device *pdev)
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struct resource *ress;
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void __iomem *base;
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int ret, floor, found = 0;
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struct mtd_info **docg3_floors;
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struct docg3_cascade *cascade;
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ret = -ENXIO;
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ress = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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@ -2016,17 +2017,18 @@ static int __init docg3_probe(struct platform_device *pdev)
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base = ioremap(ress->start, DOC_IOSPACE_SIZE);
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ret = -ENOMEM;
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docg3_floors = kzalloc(sizeof(*docg3_floors) * DOC_MAX_NBFLOORS,
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GFP_KERNEL);
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if (!docg3_floors)
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cascade = kzalloc(sizeof(*cascade) * DOC_MAX_NBFLOORS,
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GFP_KERNEL);
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if (!cascade)
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goto nomem1;
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docg3_bch = init_bch(DOC_ECC_BCH_M, DOC_ECC_BCH_T,
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cascade->base = base;
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cascade->bch = init_bch(DOC_ECC_BCH_M, DOC_ECC_BCH_T,
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DOC_ECC_BCH_PRIMPOLY);
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if (!docg3_bch)
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if (!cascade->bch)
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goto nomem2;
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for (floor = 0; floor < DOC_MAX_NBFLOORS; floor++) {
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mtd = doc_probe_device(base, floor, dev);
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mtd = doc_probe_device(cascade, floor, dev);
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if (IS_ERR(mtd)) {
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ret = PTR_ERR(mtd);
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goto err_probe;
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@ -2037,7 +2039,7 @@ static int __init docg3_probe(struct platform_device *pdev)
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else
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continue;
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}
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docg3_floors[floor] = mtd;
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cascade->floors[floor] = mtd;
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ret = mtd_device_parse_register(mtd, part_probes, NULL, NULL,
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0);
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if (ret)
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@ -2045,26 +2047,26 @@ static int __init docg3_probe(struct platform_device *pdev)
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found++;
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}
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ret = doc_register_sysfs(pdev, docg3_floors);
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ret = doc_register_sysfs(pdev, cascade);
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if (ret)
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goto err_probe;
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if (!found)
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goto notfound;
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platform_set_drvdata(pdev, docg3_floors);
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doc_dbg_register(docg3_floors[0]->priv);
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platform_set_drvdata(pdev, cascade);
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doc_dbg_register(cascade->floors[0]->priv);
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return 0;
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notfound:
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ret = -ENODEV;
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dev_info(dev, "No supported DiskOnChip found\n");
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err_probe:
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free_bch(docg3_bch);
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kfree(cascade->bch);
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for (floor = 0; floor < DOC_MAX_NBFLOORS; floor++)
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if (docg3_floors[floor])
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doc_release_device(docg3_floors[floor]);
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if (cascade->floors[floor])
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doc_release_device(cascade->floors[floor]);
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nomem2:
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kfree(docg3_floors);
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kfree(cascade);
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nomem1:
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iounmap(base);
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noress:
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@ -2079,19 +2081,19 @@ noress:
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*/
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static int __exit docg3_release(struct platform_device *pdev)
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{
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struct mtd_info **docg3_floors = platform_get_drvdata(pdev);
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struct docg3 *docg3 = docg3_floors[0]->priv;
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void __iomem *base = docg3->base;
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struct docg3_cascade *cascade = platform_get_drvdata(pdev);
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struct docg3 *docg3 = cascade->floors[0]->priv;
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void __iomem *base = cascade->base;
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int floor;
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doc_unregister_sysfs(pdev, docg3_floors);
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doc_unregister_sysfs(pdev, cascade);
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doc_dbg_unregister(docg3);
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for (floor = 0; floor < DOC_MAX_NBFLOORS; floor++)
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if (docg3_floors[floor])
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doc_release_device(docg3_floors[floor]);
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if (cascade->floors[floor])
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doc_release_device(cascade->floors[floor]);
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kfree(docg3_floors);
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free_bch(docg3_bch);
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free_bch(docg3->cascade->bch);
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kfree(cascade);
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iounmap(base);
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return 0;
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}
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@ -22,6 +22,8 @@
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#ifndef _MTD_DOCG3_H
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#define _MTD_DOCG3_H
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#include <linux/mtd/mtd.h>
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/*
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* Flash memory areas :
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* - 0x0000 .. 0x07ff : IPL
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@ -266,10 +268,22 @@
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*/
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#define DOC_LAYOUT_DPS_KEY_LENGTH 8
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/**
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* struct docg3_cascade - Cascade of 1 to 4 docg3 chips
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* @floors: floors (ie. one physical docg3 chip is one floor)
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* @base: IO space to access all chips in the cascade
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* @bch: the BCH correcting control structure
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*/
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struct docg3_cascade {
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struct mtd_info *floors[DOC_MAX_NBFLOORS];
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void __iomem *base;
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struct bch_control *bch;
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};
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/**
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* struct docg3 - DiskOnChip driver private data
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* @dev: the device currently under control
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* @base: mapped IO space
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* @cascade: the cascade this device belongs to
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* @device_id: number of the cascaded DoCG3 device (0, 1, 2 or 3)
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* @if_cfg: if true, reads are on 16bits, else reads are on 8bits
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@ -287,7 +301,7 @@
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*/
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struct docg3 {
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struct device *dev;
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void __iomem *base;
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struct docg3_cascade *cascade;
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unsigned int device_id:4;
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unsigned int if_cfg:1;
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unsigned int reliable:2;
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