MIPS: RB532: GPIO register offsets are relative to GPIOBASE
This patch fixes the wrong use of GPIO register offsets in devices.c. To avoid further problems, use gpio_get_value to return the NAND status instead of our own expanded code. Also define the zero offset of the alternate function register to allow consistent access. Signed-off-by: Florian Fainelli <florian@openwrt.org> Signed-off-by: Phil Sutter <n0-1@freewrt.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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@ -40,12 +40,14 @@
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#define BTCS 0x010040
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#define BTCOMPARE 0x010044
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#define GPIOBASE 0x050000
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#define GPIOCFG 0x050004
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#define GPIOD 0x050008
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#define GPIOILEVEL 0x05000C
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#define GPIOISTAT 0x050010
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#define GPIONMIEN 0x050014
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#define IMASK6 0x038038
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/* Offsets relative to GPIOBASE */
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#define GPIOFUNC 0x00
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#define GPIOCFG 0x04
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#define GPIOD 0x08
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#define GPIOILEVEL 0x0C
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#define GPIOISTAT 0x10
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#define GPIONMIEN 0x14
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#define IMASK6 0x38
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#define LO_WPX (1 << 0)
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#define LO_ALE (1 << 1)
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#define LO_CLE (1 << 2)
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@ -118,7 +118,7 @@ static struct platform_device cf_slot0 = {
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/* Resources and device for NAND */
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static int rb532_dev_ready(struct mtd_info *mtd)
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{
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return readl(IDT434_REG_BASE + GPIOD) & GPIO_RDY;
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return gpio_get_value(GPIO_RDY);
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}
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static void rb532_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
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