powerpc/mpc85xx: Add BSC9132 QDS Support
- BSC9132 is an integrated device that targets Femto base station market. It combines Power Architecture e500v2 and DSP StarCore SC3850 technologies with MAPLE-B2F baseband acceleration processing elements - BSC9132QDS Overview 2Gbyte DDR3 (on board DDR) 32Mbyte 16bit NOR flash 128Mbyte 2K page size NAND Flash 256 Kbit M24256 I2C EEPROM 128 Mbit SPI Flash memory SD slot eTSEC1: Connected to SGMII PHY eTSEC2: Connected to SGMII PHY DUART interface: supports one UARTs up to 115200 bps for console display Signed-off-by: Harninder Rai <harninder.rai@freescale.com> Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
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@ -67,3 +67,20 @@ Example:
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gpio-controller;
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gpio-controller;
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};
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};
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};
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};
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* Freescale on-board FPGA connected on I2C bus
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Some Freescale boards like BSC9132QDS have on board FPGA connected on
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the i2c bus.
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Required properties:
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- compatible: Should be a board-specific string followed by a string
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indicating the type of FPGA. Example:
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"fsl,<board>-fpga", "fsl,fpga-qixis-i2c"
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- reg: Should contain the address of the FPGA
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Example:
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fpga: fpga@66 {
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compatible = "fsl,bsc9132qds-fpga", "fsl,fpga-qixis-i2c";
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reg = <0x66>;
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};
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35
arch/powerpc/boot/dts/bsc9132qds.dts
Normal file
35
arch/powerpc/boot/dts/bsc9132qds.dts
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@ -0,0 +1,35 @@
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/*
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* BSC9132 QDS Device Tree Source
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*
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* Copyright 2014 Freescale Semiconductor Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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/include/ "fsl/bsc9132si-pre.dtsi"
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/ {
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model = "fsl,bsc9132qds";
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compatible = "fsl,bsc9132qds";
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memory {
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device_type = "memory";
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};
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ifc: ifc@ff71e000 {
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/* NOR, NAND Flash on board */
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ranges = <0x0 0x0 0x0 0x88000000 0x08000000
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0x1 0x0 0x0 0xff800000 0x00010000>;
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reg = <0x0 0xff71e000 0x0 0x2000>;
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};
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soc: soc@ff700000 {
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ranges = <0x0 0x0 0xff700000 0x100000>;
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};
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};
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/include/ "bsc9132qds.dtsi"
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/include/ "fsl/bsc9132si-post.dtsi"
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101
arch/powerpc/boot/dts/bsc9132qds.dtsi
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101
arch/powerpc/boot/dts/bsc9132qds.dtsi
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@ -0,0 +1,101 @@
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/*
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* BSC9132 QDS Device Tree Source stub (no addresses or top-level ranges)
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*
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* Copyright 2014 Freescale Semiconductor Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* * Neither the name of Freescale Semiconductor nor the
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* names of its contributors may be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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*
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* ALTERNATIVELY, this software may be distributed under the terms of the
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* GNU General Public License ("GPL") as published by the Free Software
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* Foundation, either version 2 of that License or (at your option) any
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* later version.
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*
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* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
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* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
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* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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&ifc {
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nor@0,0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "cfi-flash";
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reg = <0x0 0x0 0x8000000>;
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bank-width = <2>;
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device-width = <1>;
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};
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nand@1,0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "fsl,ifc-nand";
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reg = <0x1 0x0 0x4000>;
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};
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};
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&soc {
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spi@7000 {
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flash@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "spansion,s25sl12801";
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reg = <0>;
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spi-max-frequency = <30000000>;
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};
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};
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i2c@3000 {
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fpga: fpga@66 {
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compatible = "fsl,bsc9132qds-fpga", "fsl,fpga-qixis-i2c";
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reg = <0x66>;
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};
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};
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usb@22000 {
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phy_type = "ulpi";
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};
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mdio@24000 {
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phy0: ethernet-phy@0 {
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reg = <0x0>;
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};
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phy1: ethernet-phy@1 {
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reg = <0x1>;
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};
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tbi0: tbi-phy@11 {
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reg = <0x1f>;
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device_type = "tbi-phy";
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};
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};
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enet0: ethernet@b0000 {
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phy-handle = <&phy0>;
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tbi-handle = <&tbi0>;
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phy-connection-type = "sgmii";
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};
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enet1: ethernet@b1000 {
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phy-handle = <&phy1>;
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tbi-handle = <&tbi0>;
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phy-connection-type = "sgmii";
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};
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};
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185
arch/powerpc/boot/dts/fsl/bsc9132si-post.dtsi
Normal file
185
arch/powerpc/boot/dts/fsl/bsc9132si-post.dtsi
Normal file
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@ -0,0 +1,185 @@
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/*
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* BSC9132 Silicon/SoC Device Tree Source (post include)
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*
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* Copyright 2014 Freescale Semiconductor Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* * Neither the name of Freescale Semiconductor nor the
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* names of its contributors may be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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*
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* ALTERNATIVELY, this software may be distributed under the terms of the
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* GNU General Public License ("GPL") as published by the Free Software
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* Foundation, either version 2 of that License or (at your option) any
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* later version.
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*
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* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
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* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
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* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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&ifc {
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#address-cells = <2>;
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#size-cells = <1>;
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compatible = "fsl,ifc", "simple-bus";
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/* FIXME: Test whether interrupts are split */
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interrupts = <16 2 0 0 20 2 0 0>;
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};
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&soc {
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#address-cells = <1>;
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#size-cells = <1>;
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device_type = "soc";
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compatible = "fsl,bsc9132-immr", "simple-bus";
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bus-frequency = <0>; // Filled out by uboot.
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ecm-law@0 {
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compatible = "fsl,ecm-law";
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reg = <0x0 0x1000>;
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fsl,num-laws = <12>;
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};
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ecm@1000 {
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compatible = "fsl,bsc9132-ecm", "fsl,ecm";
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reg = <0x1000 0x1000>;
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interrupts = <16 2 0 0>;
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};
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memory-controller@2000 {
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compatible = "fsl,bsc9132-memory-controller";
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reg = <0x2000 0x1000>;
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interrupts = <16 2 1 8>;
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};
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/include/ "pq3-i2c-0.dtsi"
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i2c@3000 {
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interrupts = <17 2 0 0>;
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};
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/include/ "pq3-i2c-1.dtsi"
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i2c@3100 {
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interrupts = <17 2 0 0>;
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};
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/include/ "pq3-duart-0.dtsi"
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serial0: serial@4500 {
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interrupts = <18 2 0 0>;
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};
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serial1: serial@4600 {
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interrupts = <18 2 0 0 >;
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};
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/include/ "pq3-espi-0.dtsi"
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spi0: spi@7000 {
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fsl,espi-num-chipselects = <1>;
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interrupts = <22 0x2 0 0>;
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};
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/include/ "pq3-gpio-0.dtsi"
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gpio-controller@f000 {
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interrupts = <19 0x2 0 0>;
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};
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L2: l2-cache-controller@20000 {
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compatible = "fsl,bsc9132-l2-cache-controller";
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reg = <0x20000 0x1000>;
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cache-line-size = <32>; // 32 bytes
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cache-size = <0x40000>; // L2,256K
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interrupts = <16 2 1 0>;
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};
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/include/ "pq3-dma-0.dtsi"
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dma@21300 {
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dma-channel@0 {
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interrupts = <62 2 0 0>;
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};
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dma-channel@80 {
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interrupts = <63 2 0 0>;
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};
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dma-channel@100 {
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interrupts = <64 2 0 0>;
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};
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dma-channel@180 {
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interrupts = <65 2 0 0>;
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};
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};
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/include/ "pq3-usb2-dr-0.dtsi"
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usb@22000 {
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compatible = "fsl-usb2-dr","fsl-usb2-dr-v2.2";
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interrupts = <40 0x2 0 0>;
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};
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/include/ "pq3-esdhc-0.dtsi"
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sdhc@2e000 {
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fsl,sdhci-auto-cmd12;
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interrupts = <41 0x2 0 0>;
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};
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/include/ "pq3-sec4.4-0.dtsi"
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crypto@30000 {
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interrupts = <57 2 0 0>;
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sec_jr0: jr@1000 {
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interrupts = <58 2 0 0>;
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};
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sec_jr1: jr@2000 {
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interrupts = <59 2 0 0>;
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};
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sec_jr2: jr@3000 {
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interrupts = <60 2 0 0>;
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};
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sec_jr3: jr@4000 {
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interrupts = <61 2 0 0>;
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};
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};
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/include/ "pq3-mpic.dtsi"
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/include/ "pq3-mpic-timer-B.dtsi"
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/include/ "pq3-etsec2-0.dtsi"
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enet0: ethernet@b0000 {
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queue-group@b0000 {
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fsl,rx-bit-map = <0xff>;
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fsl,tx-bit-map = <0xff>;
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interrupts = <26 2 0 0 27 2 0 0 28 2 0 0>;
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};
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};
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/include/ "pq3-etsec2-1.dtsi"
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enet1: ethernet@b1000 {
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queue-group@b1000 {
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fsl,rx-bit-map = <0xff>;
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fsl,tx-bit-map = <0xff>;
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interrupts = <33 2 0 0 34 2 0 0 35 2 0 0>;
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};
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};
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global-utilities@e0000 {
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compatible = "fsl,bsc9132-guts";
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reg = <0xe0000 0x1000>;
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fsl,has-rstcr;
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};
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};
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66
arch/powerpc/boot/dts/fsl/bsc9132si-pre.dtsi
Normal file
66
arch/powerpc/boot/dts/fsl/bsc9132si-pre.dtsi
Normal file
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@ -0,0 +1,66 @@
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/*
|
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|
* BSC9132 Silicon/SoC Device Tree Source (pre include)
|
||||||
|
*
|
||||||
|
* Copyright 2014 Freescale Semiconductor Inc.
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions are met:
|
||||||
|
* * Redistributions of source code must retain the above copyright
|
||||||
|
* notice, this list of conditions and the following disclaimer.
|
||||||
|
* * Redistributions in binary form must reproduce the above copyright
|
||||||
|
* notice, this list of conditions and the following disclaimer in the
|
||||||
|
* documentation and/or other materials provided with the distribution.
|
||||||
|
* * Neither the name of Freescale Semiconductor nor the
|
||||||
|
* names of its contributors may be used to endorse or promote products
|
||||||
|
* derived from this software without specific prior written permission.
|
||||||
|
*
|
||||||
|
*
|
||||||
|
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||||
|
* GNU General Public License ("GPL") as published by the Free Software
|
||||||
|
* Foundation, either version 2 of that License or (at your option) any
|
||||||
|
* later version.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
|
||||||
|
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||||
|
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||||
|
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||||
|
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||||
|
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||||
|
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||||
|
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||||
|
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||||
|
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*/
|
||||||
|
|
||||||
|
/dts-v1/;
|
||||||
|
|
||||||
|
/include/ "e500v2_power_isa.dtsi"
|
||||||
|
|
||||||
|
/ {
|
||||||
|
#address-cells = <2>;
|
||||||
|
#size-cells = <2>;
|
||||||
|
interrupt-parent = <&mpic>;
|
||||||
|
|
||||||
|
aliases {
|
||||||
|
serial0 = &serial0;
|
||||||
|
ethernet0 = &enet0;
|
||||||
|
ethernet1 = &enet1;
|
||||||
|
};
|
||||||
|
|
||||||
|
cpus {
|
||||||
|
#address-cells = <1>;
|
||||||
|
#size-cells = <0>;
|
||||||
|
|
||||||
|
cpu0: PowerPC,e500v2@0 {
|
||||||
|
device_type = "cpu";
|
||||||
|
reg = <0x0>;
|
||||||
|
next-level-cache = <&L2>;
|
||||||
|
};
|
||||||
|
|
||||||
|
cpu1: PowerPC,e500v2@1 {
|
||||||
|
device_type = "cpu";
|
||||||
|
reg = <0x1>;
|
||||||
|
next-level-cache = <&L2>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
};
|
|
@ -38,6 +38,15 @@ config C293_PCIE
|
||||||
help
|
help
|
||||||
This option enables support for the C293PCIE board
|
This option enables support for the C293PCIE board
|
||||||
|
|
||||||
|
config BSC9132_QDS
|
||||||
|
bool "Freescale BSC9132QDS"
|
||||||
|
select DEFAULT_UIMAGE
|
||||||
|
help
|
||||||
|
This option enables support for the Freescale BSC9132 QDS board.
|
||||||
|
BSC9132 is a heterogeneous SoC containing dual e500v2 powerpc cores
|
||||||
|
and dual StarCore SC3850 DSP cores.
|
||||||
|
Manufacturer : Freescale Semiconductor, Inc
|
||||||
|
|
||||||
config MPC8540_ADS
|
config MPC8540_ADS
|
||||||
bool "Freescale MPC8540 ADS"
|
bool "Freescale MPC8540 ADS"
|
||||||
select DEFAULT_UIMAGE
|
select DEFAULT_UIMAGE
|
||||||
|
|
|
@ -6,6 +6,7 @@ obj-$(CONFIG_SMP) += smp.o
|
||||||
obj-y += common.o
|
obj-y += common.o
|
||||||
|
|
||||||
obj-$(CONFIG_BSC9131_RDB) += bsc913x_rdb.o
|
obj-$(CONFIG_BSC9131_RDB) += bsc913x_rdb.o
|
||||||
|
obj-$(CONFIG_BSC9132_QDS) += bsc913x_qds.o
|
||||||
obj-$(CONFIG_C293_PCIE) += c293pcie.o
|
obj-$(CONFIG_C293_PCIE) += c293pcie.o
|
||||||
obj-$(CONFIG_MPC8540_ADS) += mpc85xx_ads.o
|
obj-$(CONFIG_MPC8540_ADS) += mpc85xx_ads.o
|
||||||
obj-$(CONFIG_MPC8560_ADS) += mpc85xx_ads.o
|
obj-$(CONFIG_MPC8560_ADS) += mpc85xx_ads.o
|
||||||
|
|
74
arch/powerpc/platforms/85xx/bsc913x_qds.c
Normal file
74
arch/powerpc/platforms/85xx/bsc913x_qds.c
Normal file
|
@ -0,0 +1,74 @@
|
||||||
|
/*
|
||||||
|
* BSC913xQDS Board Setup
|
||||||
|
*
|
||||||
|
* Author:
|
||||||
|
* Harninder Rai <harninder.rai@freescale.com>
|
||||||
|
* Priyanka Jain <Priyanka.Jain@freescale.com>
|
||||||
|
*
|
||||||
|
* Copyright 2014 Freescale Semiconductor Inc.
|
||||||
|
*
|
||||||
|
* This program is free software; you can redistribute it and/or modify it
|
||||||
|
* under the terms of the GNU General Public License as published by the
|
||||||
|
* Free Software Foundation; either version 2 of the License, or (at your
|
||||||
|
* option) any later version.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#include <linux/of_platform.h>
|
||||||
|
#include <linux/pci.h>
|
||||||
|
#include <asm/mpic.h>
|
||||||
|
#include <sysdev/fsl_soc.h>
|
||||||
|
#include <asm/udbg.h>
|
||||||
|
|
||||||
|
#include "mpc85xx.h"
|
||||||
|
#include "smp.h"
|
||||||
|
|
||||||
|
void __init bsc913x_qds_pic_init(void)
|
||||||
|
{
|
||||||
|
struct mpic *mpic = mpic_alloc(NULL, 0, MPIC_BIG_ENDIAN |
|
||||||
|
MPIC_SINGLE_DEST_CPU,
|
||||||
|
0, 256, " OpenPIC ");
|
||||||
|
|
||||||
|
if (!mpic)
|
||||||
|
pr_err("bsc913x: Failed to allocate MPIC structure\n");
|
||||||
|
else
|
||||||
|
mpic_init(mpic);
|
||||||
|
}
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Setup the architecture
|
||||||
|
*/
|
||||||
|
static void __init bsc913x_qds_setup_arch(void)
|
||||||
|
{
|
||||||
|
if (ppc_md.progress)
|
||||||
|
ppc_md.progress("bsc913x_qds_setup_arch()", 0);
|
||||||
|
|
||||||
|
#if defined(CONFIG_SMP)
|
||||||
|
mpc85xx_smp_init();
|
||||||
|
#endif
|
||||||
|
|
||||||
|
pr_info("bsc913x board from Freescale Semiconductor\n");
|
||||||
|
}
|
||||||
|
|
||||||
|
machine_device_initcall(bsc9132_qds, mpc85xx_common_publish_devices);
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Called very early, device-tree isn't unflattened
|
||||||
|
*/
|
||||||
|
|
||||||
|
static int __init bsc9132_qds_probe(void)
|
||||||
|
{
|
||||||
|
unsigned long root = of_get_flat_dt_root();
|
||||||
|
|
||||||
|
return of_flat_dt_is_compatible(root, "fsl,bsc9132qds");
|
||||||
|
}
|
||||||
|
|
||||||
|
define_machine(bsc9132_qds) {
|
||||||
|
.name = "BSC9132 QDS",
|
||||||
|
.probe = bsc9132_qds_probe,
|
||||||
|
.setup_arch = bsc913x_qds_setup_arch,
|
||||||
|
.init_IRQ = bsc913x_qds_pic_init,
|
||||||
|
.get_irq = mpic_get_irq,
|
||||||
|
.restart = fsl_rstcr_restart,
|
||||||
|
.calibrate_decr = generic_calibrate_decr,
|
||||||
|
.progress = udbg_progress,
|
||||||
|
};
|
Loading…
Reference in a new issue