Merge branch 'tracing/urgent' into tracing/core
Merge reason: pick up both v2.6.30-rc1 [which includes tracing/urgent fixes]
and pick up the current lineup of tracing/urgent fixes as well
Signed-off-by: Ingo Molnar <mingo@elte.hu>
This commit is contained in:
Ingo Molnar
commit
1cad1252ed
|
|
@ -136,7 +136,7 @@ exactly why.
|
|||
The standard 32-bit addressing PCI device would do something like
|
||||
this:
|
||||
|
||||
if (pci_set_dma_mask(pdev, DMA_32BIT_MASK)) {
|
||||
if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) {
|
||||
printk(KERN_WARNING
|
||||
"mydev: No suitable DMA available.\n");
|
||||
goto ignore_this_device;
|
||||
|
|
@ -155,9 +155,9 @@ all 64-bits when accessing streaming DMA:
|
|||
|
||||
int using_dac;
|
||||
|
||||
if (!pci_set_dma_mask(pdev, DMA_64BIT_MASK)) {
|
||||
if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) {
|
||||
using_dac = 1;
|
||||
} else if (!pci_set_dma_mask(pdev, DMA_32BIT_MASK)) {
|
||||
} else if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) {
|
||||
using_dac = 0;
|
||||
} else {
|
||||
printk(KERN_WARNING
|
||||
|
|
@ -170,14 +170,14 @@ the case would look like this:
|
|||
|
||||
int using_dac, consistent_using_dac;
|
||||
|
||||
if (!pci_set_dma_mask(pdev, DMA_64BIT_MASK)) {
|
||||
if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) {
|
||||
using_dac = 1;
|
||||
consistent_using_dac = 1;
|
||||
pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK);
|
||||
} else if (!pci_set_dma_mask(pdev, DMA_32BIT_MASK)) {
|
||||
pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64));
|
||||
} else if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) {
|
||||
using_dac = 0;
|
||||
consistent_using_dac = 0;
|
||||
pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
|
||||
pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
|
||||
} else {
|
||||
printk(KERN_WARNING
|
||||
"mydev: No suitable DMA available.\n");
|
||||
|
|
@ -192,7 +192,7 @@ check the return value from pci_set_consistent_dma_mask().
|
|||
Finally, if your device can only drive the low 24-bits of
|
||||
address during PCI bus mastering you might do something like:
|
||||
|
||||
if (pci_set_dma_mask(pdev, DMA_24BIT_MASK)) {
|
||||
if (pci_set_dma_mask(pdev, DMA_BIT_MASK(24))) {
|
||||
printk(KERN_WARNING
|
||||
"mydev: 24-bit DMA addressing not available.\n");
|
||||
goto ignore_this_device;
|
||||
|
|
@ -213,7 +213,7 @@ most specific mask.
|
|||
|
||||
Here is pseudo-code showing how this might be done:
|
||||
|
||||
#define PLAYBACK_ADDRESS_BITS DMA_32BIT_MASK
|
||||
#define PLAYBACK_ADDRESS_BITS DMA_BIT_MASK(32)
|
||||
#define RECORD_ADDRESS_BITS 0x00ffffff
|
||||
|
||||
struct my_sound_card *card;
|
||||
|
|
|
|||
|
|
@ -1137,8 +1137,8 @@
|
|||
if (err < 0)
|
||||
return err;
|
||||
/* check PCI availability (28bit DMA) */
|
||||
if (pci_set_dma_mask(pci, DMA_28BIT_MASK) < 0 ||
|
||||
pci_set_consistent_dma_mask(pci, DMA_28BIT_MASK) < 0) {
|
||||
if (pci_set_dma_mask(pci, DMA_BIT_MASK(28)) < 0 ||
|
||||
pci_set_consistent_dma_mask(pci, DMA_BIT_MASK(28)) < 0) {
|
||||
printk(KERN_ERR "error to set 28bit mask DMA\n");
|
||||
pci_disable_device(pci);
|
||||
return -ENXIO;
|
||||
|
|
@ -1252,8 +1252,8 @@
|
|||
err = pci_enable_device(pci);
|
||||
if (err < 0)
|
||||
return err;
|
||||
if (pci_set_dma_mask(pci, DMA_28BIT_MASK) < 0 ||
|
||||
pci_set_consistent_dma_mask(pci, DMA_28BIT_MASK) < 0) {
|
||||
if (pci_set_dma_mask(pci, DMA_BIT_MASK(28)) < 0 ||
|
||||
pci_set_consistent_dma_mask(pci, DMA_BIT_MASK(28)) < 0) {
|
||||
printk(KERN_ERR "error to set 28bit mask DMA\n");
|
||||
pci_disable_device(pci);
|
||||
return -ENXIO;
|
||||
|
|
|
|||
|
|
@ -8,6 +8,8 @@ cpqarray.txt
|
|||
- info on using Compaq's SMART2 Intelligent Disk Array Controllers.
|
||||
floppy.txt
|
||||
- notes and driver options for the floppy disk driver.
|
||||
mflash.txt
|
||||
- info on mGine m(g)flash driver for linux.
|
||||
nbd.txt
|
||||
- info on a TCP implementation of a network block device.
|
||||
paride.txt
|
||||
|
|
|
|||
84
Documentation/blockdev/mflash.txt
Normal file
84
Documentation/blockdev/mflash.txt
Normal file
|
|
@ -0,0 +1,84 @@
|
|||
This document describes m[g]flash support in linux.
|
||||
|
||||
Contents
|
||||
1. Overview
|
||||
2. Reserved area configuration
|
||||
3. Example of mflash platform driver registration
|
||||
|
||||
1. Overview
|
||||
|
||||
Mflash and gflash are embedded flash drive. The only difference is mflash is
|
||||
MCP(Multi Chip Package) device. These two device operate exactly same way.
|
||||
So the rest mflash repersents mflash and gflash altogether.
|
||||
|
||||
Internally, mflash has nand flash and other hardware logics and supports
|
||||
2 different operation (ATA, IO) modes. ATA mode doesn't need any new
|
||||
driver and currently works well under standard IDE subsystem. Actually it's
|
||||
one chip SSD. IO mode is ATA-like custom mode for the host that doesn't have
|
||||
IDE interface.
|
||||
|
||||
Followings are brief descriptions about IO mode.
|
||||
A. IO mode based on ATA protocol and uses some custom command. (read confirm,
|
||||
write confirm)
|
||||
B. IO mode uses SRAM bus interface.
|
||||
C. IO mode supports 4kB boot area, so host can boot from mflash.
|
||||
|
||||
2. Reserved area configuration
|
||||
If host boot from mflash, usually needs raw area for boot loader image. All of
|
||||
the mflash's block device operation will be taken this value as start offset.
|
||||
Note that boot loader's size of reserved area and kernel configuration value
|
||||
must be same.
|
||||
|
||||
3. Example of mflash platform driver registration
|
||||
Working mflash is very straight forward. Adding platform device stuff to board
|
||||
configuration file is all. Here is some pseudo example.
|
||||
|
||||
static struct mg_drv_data mflash_drv_data = {
|
||||
/* If you want to polling driver set to 1 */
|
||||
.use_polling = 0,
|
||||
/* device attribution */
|
||||
.dev_attr = MG_BOOT_DEV
|
||||
};
|
||||
|
||||
static struct resource mg_mflash_rsc[] = {
|
||||
/* Base address of mflash */
|
||||
[0] = {
|
||||
.start = 0x08000000,
|
||||
.end = 0x08000000 + SZ_64K - 1,
|
||||
.flags = IORESOURCE_MEM
|
||||
},
|
||||
/* mflash interrupt pin */
|
||||
[1] = {
|
||||
.start = IRQ_GPIO(84),
|
||||
.end = IRQ_GPIO(84),
|
||||
.flags = IORESOURCE_IRQ
|
||||
},
|
||||
/* mflash reset pin */
|
||||
[2] = {
|
||||
.start = 43,
|
||||
.end = 43,
|
||||
.name = MG_RST_PIN,
|
||||
.flags = IORESOURCE_IO
|
||||
},
|
||||
/* mflash reset-out pin
|
||||
* If you use mflash as storage device (i.e. other than MG_BOOT_DEV),
|
||||
* should assign this */
|
||||
[3] = {
|
||||
.start = 51,
|
||||
.end = 51,
|
||||
.name = MG_RSTOUT_PIN,
|
||||
.flags = IORESOURCE_IO
|
||||
}
|
||||
};
|
||||
|
||||
static struct platform_device mflash_dev = {
|
||||
.name = MG_DEV_NAME,
|
||||
.id = -1,
|
||||
.dev = {
|
||||
.platform_data = &mflash_drv_data,
|
||||
},
|
||||
.num_resources = ARRAY_SIZE(mg_mflash_rsc),
|
||||
.resource = mg_mflash_rsc
|
||||
};
|
||||
|
||||
platform_device_register(&mflash_dev);
|
||||
|
|
@ -30,3 +30,21 @@ The above steps create a new group g1 and move the current shell
|
|||
process (bash) into it. CPU time consumed by this bash and its children
|
||||
can be obtained from g1/cpuacct.usage and the same is accumulated in
|
||||
/cgroups/cpuacct.usage also.
|
||||
|
||||
cpuacct.stat file lists a few statistics which further divide the
|
||||
CPU time obtained by the cgroup into user and system times. Currently
|
||||
the following statistics are supported:
|
||||
|
||||
user: Time spent by tasks of the cgroup in user mode.
|
||||
system: Time spent by tasks of the cgroup in kernel mode.
|
||||
|
||||
user and system are in USER_HZ unit.
|
||||
|
||||
cpuacct controller uses percpu_counter interface to collect user and
|
||||
system times. This has two side effects:
|
||||
|
||||
- It is theoretically possible to see wrong values for user and system times.
|
||||
This is because percpu_counter_read() on 32bit systems isn't safe
|
||||
against concurrent writes.
|
||||
- It is possible to see slightly outdated values for user and system times
|
||||
due to the batch processing nature of percpu_counter.
|
||||
|
|
|
|||
|
|
@ -2797,6 +2797,10 @@ Your cooperation is appreciated.
|
|||
206 = /dev/ttySC1 SC26xx serial port 1
|
||||
207 = /dev/ttySC2 SC26xx serial port 2
|
||||
208 = /dev/ttySC3 SC26xx serial port 3
|
||||
209 = /dev/ttyMAX0 MAX3100 serial port 0
|
||||
210 = /dev/ttyMAX1 MAX3100 serial port 1
|
||||
211 = /dev/ttyMAX2 MAX3100 serial port 2
|
||||
212 = /dev/ttyMAX3 MAX3100 serial port 3
|
||||
|
||||
205 char Low-density serial ports (alternate device)
|
||||
0 = /dev/culu0 Callout device for ttyLU0
|
||||
|
|
|
|||
|
|
@ -59,7 +59,8 @@ Accepted options:
|
|||
ypan Enable display panning using the VESA protected mode
|
||||
interface. The visible screen is just a window of the
|
||||
video memory, console scrolling is done by changing the
|
||||
start of the window. Available on x86 only.
|
||||
start of the window. This option is available on x86
|
||||
only and is the default option on that architecture.
|
||||
|
||||
ywrap Same as ypan, but assumes your gfx board can wrap-around
|
||||
the video memory (i.e. starts reading from top if it
|
||||
|
|
@ -67,7 +68,7 @@ ywrap Same as ypan, but assumes your gfx board can wrap-around
|
|||
Available on x86 only.
|
||||
|
||||
redraw Scroll by redrawing the affected part of the screen, this
|
||||
is the safe (and slow) default.
|
||||
is the default on non-x86.
|
||||
|
||||
(If you're using uvesafb as a module, the above three options are
|
||||
used a parameter of the scroll option, e.g. scroll=ypan.)
|
||||
|
|
@ -182,7 +183,7 @@ from the Video BIOS if you set pixclock to 0 in fb_var_screeninfo.
|
|||
|
||||
--
|
||||
Michal Januszewski <spock@gentoo.org>
|
||||
Last updated: 2007-06-16
|
||||
Last updated: 2009-03-30
|
||||
|
||||
Documentation of the uvesafb options is loosely based on vesafb.txt.
|
||||
|
||||
|
|
|
|||
|
|
@ -68,6 +68,8 @@ ncpfs.txt
|
|||
- info on Novell Netware(tm) filesystem using NCP protocol.
|
||||
nfsroot.txt
|
||||
- short guide on setting up a diskless box with NFS root filesystem.
|
||||
nilfs2.txt
|
||||
- info and mount options for the NILFS2 filesystem.
|
||||
ntfs.txt
|
||||
- info and mount options for the NTFS filesystem (Windows NT).
|
||||
ocfs2.txt
|
||||
|
|
|
|||
200
Documentation/filesystems/nilfs2.txt
Normal file
200
Documentation/filesystems/nilfs2.txt
Normal file
|
|
@ -0,0 +1,200 @@
|
|||
NILFS2
|
||||
------
|
||||
|
||||
NILFS2 is a log-structured file system (LFS) supporting continuous
|
||||
snapshotting. In addition to versioning capability of the entire file
|
||||
system, users can even restore files mistakenly overwritten or
|
||||
destroyed just a few seconds ago. Since NILFS2 can keep consistency
|
||||
like conventional LFS, it achieves quick recovery after system
|
||||
crashes.
|
||||
|
||||
NILFS2 creates a number of checkpoints every few seconds or per
|
||||
synchronous write basis (unless there is no change). Users can select
|
||||
significant versions among continuously created checkpoints, and can
|
||||
change them into snapshots which will be preserved until they are
|
||||
changed back to checkpoints.
|
||||
|
||||
There is no limit on the number of snapshots until the volume gets
|
||||
full. Each snapshot is mountable as a read-only file system
|
||||
concurrently with its writable mount, and this feature is convenient
|
||||
for online backup.
|
||||
|
||||
The userland tools are included in nilfs-utils package, which is
|
||||
available from the following download page. At least "mkfs.nilfs2",
|
||||
"mount.nilfs2", "umount.nilfs2", and "nilfs_cleanerd" (so called
|
||||
cleaner or garbage collector) are required. Details on the tools are
|
||||
described in the man pages included in the package.
|
||||
|
||||
Project web page: http://www.nilfs.org/en/
|
||||
Download page: http://www.nilfs.org/en/download.html
|
||||
Git tree web page: http://www.nilfs.org/git/
|
||||
NILFS mailing lists: http://www.nilfs.org/mailman/listinfo/users
|
||||
|
||||
Caveats
|
||||
=======
|
||||
|
||||
Features which NILFS2 does not support yet:
|
||||
|
||||
- atime
|
||||
- extended attributes
|
||||
- POSIX ACLs
|
||||
- quotas
|
||||
- writable snapshots
|
||||
- remote backup (CDP)
|
||||
- data integrity
|
||||
- defragmentation
|
||||
|
||||
Mount options
|
||||
=============
|
||||
|
||||
NILFS2 supports the following mount options:
|
||||
(*) == default
|
||||
|
||||
barrier=on(*) This enables/disables barriers. barrier=off disables
|
||||
it, barrier=on enables it.
|
||||
errors=continue(*) Keep going on a filesystem error.
|
||||
errors=remount-ro Remount the filesystem read-only on an error.
|
||||
errors=panic Panic and halt the machine if an error occurs.
|
||||
cp=n Specify the checkpoint-number of the snapshot to be
|
||||
mounted. Checkpoints and snapshots are listed by lscp
|
||||
user command. Only the checkpoints marked as snapshot
|
||||
are mountable with this option. Snapshot is read-only,
|
||||
so a read-only mount option must be specified together.
|
||||
order=relaxed(*) Apply relaxed order semantics that allows modified data
|
||||
blocks to be written to disk without making a
|
||||
checkpoint if no metadata update is going. This mode
|
||||
is equivalent to the ordered data mode of the ext3
|
||||
filesystem except for the updates on data blocks still
|
||||
conserve atomicity. This will improve synchronous
|
||||
write performance for overwriting.
|
||||
order=strict Apply strict in-order semantics that preserves sequence
|
||||
of all file operations including overwriting of data
|
||||
blocks. That means, it is guaranteed that no
|
||||
overtaking of events occurs in the recovered file
|
||||
system after a crash.
|
||||
|
||||
NILFS2 usage
|
||||
============
|
||||
|
||||
To use nilfs2 as a local file system, simply:
|
||||
|
||||
# mkfs -t nilfs2 /dev/block_device
|
||||
# mount -t nilfs2 /dev/block_device /dir
|
||||
|
||||
This will also invoke the cleaner through the mount helper program
|
||||
(mount.nilfs2).
|
||||
|
||||
Checkpoints and snapshots are managed by the following commands.
|
||||
Their manpages are included in the nilfs-utils package above.
|
||||
|
||||
lscp list checkpoints or snapshots.
|
||||
mkcp make a checkpoint or a snapshot.
|
||||
chcp change an existing checkpoint to a snapshot or vice versa.
|
||||
rmcp invalidate specified checkpoint(s).
|
||||
|
||||
To mount a snapshot,
|
||||
|
||||
# mount -t nilfs2 -r -o cp=<cno> /dev/block_device /snap_dir
|
||||
|
||||
where <cno> is the checkpoint number of the snapshot.
|
||||
|
||||
To unmount the NILFS2 mount point or snapshot, simply:
|
||||
|
||||
# umount /dir
|
||||
|
||||
Then, the cleaner daemon is automatically shut down by the umount
|
||||
helper program (umount.nilfs2).
|
||||
|
||||
Disk format
|
||||
===========
|
||||
|
||||
A nilfs2 volume is equally divided into a number of segments except
|
||||
for the super block (SB) and segment #0. A segment is the container
|
||||
of logs. Each log is composed of summary information blocks, payload
|
||||
blocks, and an optional super root block (SR):
|
||||
|
||||
______________________________________________________
|
||||
| |SB| | Segment | Segment | Segment | ... | Segment | |
|
||||
|_|__|_|____0____|____1____|____2____|_____|____N____|_|
|
||||
0 +1K +4K +8M +16M +24M +(8MB x N)
|
||||
. . (Typical offsets for 4KB-block)
|
||||
. .
|
||||
.______________________.
|
||||
| log | log |... | log |
|
||||
|__1__|__2__|____|__m__|
|
||||
. .
|
||||
. .
|
||||
. .
|
||||
.______________________________.
|
||||
| Summary | Payload blocks |SR|
|
||||
|_blocks__|_________________|__|
|
||||
|
||||
The payload blocks are organized per file, and each file consists of
|
||||
data blocks and B-tree node blocks:
|
||||
|
||||
|<--- File-A --->|<--- File-B --->|
|
||||
_______________________________________________________________
|
||||
| Data blocks | B-tree blocks | Data blocks | B-tree blocks | ...
|
||||
_|_____________|_______________|_____________|_______________|_
|
||||
|
||||
|
||||
Since only the modified blocks are written in the log, it may have
|
||||
files without data blocks or B-tree node blocks.
|
||||
|
||||
The organization of the blocks is recorded in the summary information
|
||||
blocks, which contains a header structure (nilfs_segment_summary), per
|
||||
file structures (nilfs_finfo), and per block structures (nilfs_binfo):
|
||||
|
||||
_________________________________________________________________________
|
||||
| Summary | finfo | binfo | ... | binfo | finfo | binfo | ... | binfo |...
|
||||
|_blocks__|___A___|_(A,1)_|_____|(A,Na)_|___B___|_(B,1)_|_____|(B,Nb)_|___
|
||||
|
||||
|
||||
The logs include regular files, directory files, symbolic link files
|
||||
and several meta data files. The mata data files are the files used
|
||||
to maintain file system meta data. The current version of NILFS2 uses
|
||||
the following meta data files:
|
||||
|
||||
1) Inode file (ifile) -- Stores on-disk inodes
|
||||
2) Checkpoint file (cpfile) -- Stores checkpoints
|
||||
3) Segment usage file (sufile) -- Stores allocation state of segments
|
||||
4) Data address translation file -- Maps virtual block numbers to usual
|
||||
(DAT) block numbers. This file serves to
|
||||
make on-disk blocks relocatable.
|
||||
|
||||
The following figure shows a typical organization of the logs:
|
||||
|
||||
_________________________________________________________________________
|
||||
| Summary | regular file | file | ... | ifile | cpfile | sufile | DAT |SR|
|
||||
|_blocks__|_or_directory_|_______|_____|_______|________|________|_____|__|
|
||||
|
||||
|
||||
To stride over segment boundaries, this sequence of files may be split
|
||||
into multiple logs. The sequence of logs that should be treated as
|
||||
logically one log, is delimited with flags marked in the segment
|
||||
summary. The recovery code of nilfs2 looks this boundary information
|
||||
to ensure atomicity of updates.
|
||||
|
||||
The super root block is inserted for every checkpoints. It includes
|
||||
three special inodes, inodes for the DAT, cpfile, and sufile. Inodes
|
||||
of regular files, directories, symlinks and other special files, are
|
||||
included in the ifile. The inode of ifile itself is included in the
|
||||
corresponding checkpoint entry in the cpfile. Thus, the hierarchy
|
||||
among NILFS2 files can be depicted as follows:
|
||||
|
||||
Super block (SB)
|
||||
|
|
||||
v
|
||||
Super root block (the latest cno=xx)
|
||||
|-- DAT
|
||||
|-- sufile
|
||||
`-- cpfile
|
||||
|-- ifile (cno=c1)
|
||||
|-- ifile (cno=c2) ---- file (ino=i1)
|
||||
: : |-- file (ino=i2)
|
||||
`-- ifile (cno=xx) |-- file (ino=i3)
|
||||
: :
|
||||
`-- file (ino=yy)
|
||||
( regular file, directory, or symlink )
|
||||
|
||||
For detail on the format of each file, please see include/linux/nilfs2_fs.h.
|
||||
36
Documentation/hwmon/g760a
Normal file
36
Documentation/hwmon/g760a
Normal file
|
|
@ -0,0 +1,36 @@
|
|||
Kernel driver g760a
|
||||
===================
|
||||
|
||||
Supported chips:
|
||||
* Global Mixed-mode Technology Inc. G760A
|
||||
Prefix: 'g760a'
|
||||
Datasheet: Publicly available at the GMT website
|
||||
http://www.gmt.com.tw/datasheet/g760a.pdf
|
||||
|
||||
Author: Herbert Valerio Riedel <hvr@gnu.org>
|
||||
|
||||
Description
|
||||
-----------
|
||||
|
||||
The GMT G760A Fan Speed PWM Controller is connected directly to a fan
|
||||
and performs closed-loop control of the fan speed.
|
||||
|
||||
The fan speed is programmed by setting the period via 'pwm1' of two
|
||||
consecutive speed pulses. The period is defined in terms of clock
|
||||
cycle counts of an assumed 32kHz clock source.
|
||||
|
||||
Setting a period of 0 stops the fan; setting the period to 255 sets
|
||||
fan to maximum speed.
|
||||
|
||||
The measured fan rotation speed returned via 'fan1_input' is derived
|
||||
from the measured speed pulse period by assuming again a 32kHz clock
|
||||
source and a 2 pulse-per-revolution fan.
|
||||
|
||||
The 'alarms' file provides access to the two alarm bits provided by
|
||||
the G760A chip's status register: Bit 0 is set when the actual fan
|
||||
speed differs more than 20% with respect to the programmed fan speed;
|
||||
bit 1 is set when fan speed is below 1920 RPM.
|
||||
|
||||
The g760a driver will not update its values more frequently than every
|
||||
other second; reading them more often will do no harm, but will return
|
||||
'old' values.
|
||||
|
|
@ -61,24 +61,28 @@ GigaSet 307x Device Driver
|
|||
---------------------
|
||||
2.1. Modules
|
||||
-------
|
||||
To get the device working, you have to load the proper kernel module. You
|
||||
can do this using
|
||||
modprobe modulename
|
||||
where modulename is ser_gigaset (M101), usb_gigaset (M105), or
|
||||
bas_gigaset (direct USB connection to the base).
|
||||
For the devices to work, the proper kernel modules have to be loaded.
|
||||
This normally happens automatically when the system detects the USB
|
||||
device (base, M105) or when the line discipline is attached (M101). It
|
||||
can also be triggered manually using the modprobe(8) command, for example
|
||||
for troubleshooting or to pass module parameters.
|
||||
|
||||
The module ser_gigaset provides a serial line discipline N_GIGASET_M101
|
||||
which drives the device through the regular serial line driver. To use it,
|
||||
run the Gigaset M101 daemon "gigasetm101d" (also available from
|
||||
http://sourceforge.net/projects/gigaset307x/) with the device file of the
|
||||
RS232 port to the M101 as an argument, for example:
|
||||
gigasetm101d /dev/ttyS1
|
||||
This will open the device file, set its line discipline to N_GIGASET_M101,
|
||||
and then sleep in the background, keeping the device open so that the
|
||||
line discipline remains active. To deactivate it, kill the daemon, for
|
||||
example with
|
||||
killall gigasetm101d
|
||||
before disconnecting the device.
|
||||
which drives the device through the regular serial line driver. It must
|
||||
be attached to the serial line to which the M101 is connected with the
|
||||
ldattach(8) command (requires util-linux-ng release 2.14 or later), for
|
||||
example:
|
||||
ldattach GIGASET_M101 /dev/ttyS1
|
||||
This will open the device file, attach the line discipline to it, and
|
||||
then sleep in the background, keeping the device open so that the line
|
||||
discipline remains active. To deactivate it, kill the daemon, for example
|
||||
with
|
||||
killall ldattach
|
||||
before disconnecting the device. To have this happen automatically at
|
||||
system startup/shutdown on an LSB compatible system, create and activate
|
||||
an appropriate LSB startup script /etc/init.d/gigaset. (The init name
|
||||
'gigaset' is officially assigned to this project by LANANA.)
|
||||
Alternatively, just add the 'ldattach' command line to /etc/rc.local.
|
||||
|
||||
2.2. Device nodes for user space programs
|
||||
------------------------------------
|
||||
|
|
@ -194,10 +198,11 @@ GigaSet 307x Device Driver
|
|||
operation (for wireless access to the base), but are needed for access
|
||||
to the M105's own configuration mode (registration to the base, baudrate
|
||||
and line format settings, device status queries) via the gigacontr
|
||||
utility. Their use is disabled in the driver by default for safety
|
||||
reasons but can be enabled by setting the kernel configuration option
|
||||
"Support for undocumented USB requests" (GIGASET_UNDOCREQ) to "Y" and
|
||||
recompiling.
|
||||
utility. Their use is controlled by the kernel configuration option
|
||||
"Support for undocumented USB requests" (CONFIG_GIGASET_UNDOCREQ). If you
|
||||
encounter error code -ENOTTY when trying to use some features of the
|
||||
M105, try setting that option to "y" via 'make {x,menu}config' and
|
||||
recompiling the driver.
|
||||
|
||||
|
||||
3. Troubleshooting
|
||||
|
|
@ -228,6 +233,13 @@ GigaSet 307x Device Driver
|
|||
Solution:
|
||||
Select Unimodem mode for all DECT data adapters. (see section 2.4.)
|
||||
|
||||
Problem:
|
||||
You want to configure your USB DECT data adapter (M105) but gigacontr
|
||||
reports an error: "/dev/ttyGU0: Inappropriate ioctl for device".
|
||||
Solution:
|
||||
Recompile the usb_gigaset driver with the kernel configuration option
|
||||
CONFIG_GIGASET_UNDOCREQ set to 'y'. (see section 2.6.)
|
||||
|
||||
3.2. Telling the driver to provide more information
|
||||
----------------------------------------------
|
||||
Building the driver with the "Gigaset debugging" kernel configuration
|
||||
|
|
|
|||
|
|
@ -212,7 +212,9 @@ hit, Kprobes calls kp->pre_handler. After the probed instruction
|
|||
is single-stepped, Kprobe calls kp->post_handler. If a fault
|
||||
occurs during execution of kp->pre_handler or kp->post_handler,
|
||||
or during single-stepping of the probed instruction, Kprobes calls
|
||||
kp->fault_handler. Any or all handlers can be NULL.
|
||||
kp->fault_handler. Any or all handlers can be NULL. If kp->flags
|
||||
is set KPROBE_FLAG_DISABLED, that kp will be registered but disabled,
|
||||
so, it's handlers aren't hit until calling enable_kprobe(kp).
|
||||
|
||||
NOTE:
|
||||
1. With the introduction of the "symbol_name" field to struct kprobe,
|
||||
|
|
@ -363,6 +365,26 @@ probes) in the specified array, they clear the addr field of those
|
|||
incorrect probes. However, other probes in the array are
|
||||
unregistered correctly.
|
||||
|
||||
4.7 disable_*probe
|
||||
|
||||
#include <linux/kprobes.h>
|
||||
int disable_kprobe(struct kprobe *kp);
|
||||
int disable_kretprobe(struct kretprobe *rp);
|
||||
int disable_jprobe(struct jprobe *jp);
|
||||
|
||||
Temporarily disables the specified *probe. You can enable it again by using
|
||||
enable_*probe(). You must specify the probe which has been registered.
|
||||
|
||||
4.8 enable_*probe
|
||||
|
||||
#include <linux/kprobes.h>
|
||||
int enable_kprobe(struct kprobe *kp);
|
||||
int enable_kretprobe(struct kretprobe *rp);
|
||||
int enable_jprobe(struct jprobe *jp);
|
||||
|
||||
Enables *probe which has been disabled by disable_*probe(). You must specify
|
||||
the probe which has been registered.
|
||||
|
||||
5. Kprobes Features and Limitations
|
||||
|
||||
Kprobes allows multiple probes at the same address. Currently,
|
||||
|
|
@ -500,10 +522,14 @@ the probe. If the probed function belongs to a module, the module name
|
|||
is also specified. Following columns show probe status. If the probe is on
|
||||
a virtual address that is no longer valid (module init sections, module
|
||||
virtual addresses that correspond to modules that've been unloaded),
|
||||
such probes are marked with [GONE].
|
||||
such probes are marked with [GONE]. If the probe is temporarily disabled,
|
||||
such probes are marked with [DISABLED].
|
||||
|
||||
/debug/kprobes/enabled: Turn kprobes ON/OFF
|
||||
/debug/kprobes/enabled: Turn kprobes ON/OFF forcibly.
|
||||
|
||||
Provides a knob to globally turn registered kprobes ON or OFF. By default,
|
||||
all kprobes are enabled. By echoing "0" to this file, all registered probes
|
||||
will be disarmed, till such time a "1" is echoed to this file.
|
||||
Provides a knob to globally and forcibly turn registered kprobes ON or OFF.
|
||||
By default, all kprobes are enabled. By echoing "0" to this file, all
|
||||
registered probes will be disarmed, till such time a "1" is echoed to this
|
||||
file. Note that this knob just disarms and arms all kprobes and doesn't
|
||||
change each probe's disabling state. This means that disabled kprobes (marked
|
||||
[DISABLED]) will be not enabled if you turn ON all kprobes by this knob.
|
||||
|
|
|
|||
71
Documentation/sound/alsa/soc/jack.txt
Normal file
71
Documentation/sound/alsa/soc/jack.txt
Normal file
|
|
@ -0,0 +1,71 @@
|
|||
ASoC jack detection
|
||||
===================
|
||||
|
||||
ALSA has a standard API for representing physical jacks to user space,
|
||||
the kernel side of which can be seen in include/sound/jack.h. ASoC
|
||||
provides a version of this API adding two additional features:
|
||||
|
||||
- It allows more than one jack detection method to work together on one
|
||||
user visible jack. In embedded systems it is common for multiple
|
||||
to be present on a single jack but handled by separate bits of
|
||||
hardware.
|
||||
|
||||
- Integration with DAPM, allowing DAPM endpoints to be updated
|
||||
automatically based on the detected jack status (eg, turning off the
|
||||
headphone outputs if no headphones are present).
|
||||
|
||||
This is done by splitting the jacks up into three things working
|
||||
together: the jack itself represented by a struct snd_soc_jack, sets of
|
||||
snd_soc_jack_pins representing DAPM endpoints to update and blocks of
|
||||
code providing jack reporting mechanisms.
|
||||
|
||||
For example, a system may have a stereo headset jack with two reporting
|
||||
mechanisms, one for the headphone and one for the microphone. Some
|
||||
systems won't be able to use their speaker output while a headphone is
|
||||
connected and so will want to make sure to update both speaker and
|
||||
headphone when the headphone jack status changes.
|
||||
|
||||
The jack - struct snd_soc_jack
|
||||
==============================
|
||||
|
||||
This represents a physical jack on the system and is what is visible to
|
||||
user space. The jack itself is completely passive, it is set up by the
|
||||
machine driver and updated by jack detection methods.
|
||||
|
||||
Jacks are created by the machine driver calling snd_soc_jack_new().
|
||||
|
||||
snd_soc_jack_pin
|
||||
================
|
||||
|
||||
These represent a DAPM pin to update depending on some of the status
|
||||
bits supported by the jack. Each snd_soc_jack has zero or more of these
|
||||
which are updated automatically. They are created by the machine driver
|
||||
and associated with the jack using snd_soc_jack_add_pins(). The status
|
||||
of the endpoint may configured to be the opposite of the jack status if
|
||||
required (eg, enabling a built in microphone if a microphone is not
|
||||
connected via a jack).
|
||||
|
||||
Jack detection methods
|
||||
======================
|
||||
|
||||
Actual jack detection is done by code which is able to monitor some
|
||||
input to the system and update a jack by calling snd_soc_jack_report(),
|
||||
specifying a subset of bits to update. The jack detection code should
|
||||
be set up by the machine driver, taking configuration for the jack to
|
||||
update and the set of things to report when the jack is connected.
|
||||
|
||||
Often this is done based on the status of a GPIO - a handler for this is
|
||||
provided by the snd_soc_jack_add_gpio() function. Other methods are
|
||||
also available, for example integrated into CODECs. One example of
|
||||
CODEC integrated jack detection can be see in the WM8350 driver.
|
||||
|
||||
Each jack may have multiple reporting mechanisms, though it will need at
|
||||
least one to be useful.
|
||||
|
||||
Machine drivers
|
||||
===============
|
||||
|
||||
These are all hooked together by the machine driver depending on the
|
||||
system hardware. The machine driver will set up the snd_soc_jack and
|
||||
the list of pins to update then set up one or more jack detection
|
||||
mechanisms to update that jack based on their current status.
|
||||
|
|
@ -39,6 +39,8 @@ Currently, these files are in /proc/sys/vm:
|
|||
- nr_hugepages
|
||||
- nr_overcommit_hugepages
|
||||
- nr_pdflush_threads
|
||||
- nr_pdflush_threads_min
|
||||
- nr_pdflush_threads_max
|
||||
- nr_trim_pages (only if CONFIG_MMU=n)
|
||||
- numa_zonelist_order
|
||||
- oom_dump_tasks
|
||||
|
|
@ -463,6 +465,32 @@ The default value is 0.
|
|||
|
||||
==============================================================
|
||||
|
||||
nr_pdflush_threads_min
|
||||
|
||||
This value controls the minimum number of pdflush threads.
|
||||
|
||||
At boot time, the kernel will create and maintain 'nr_pdflush_threads_min'
|
||||
threads for the kernel's lifetime.
|
||||
|
||||
The default value is 2. The minimum value you can specify is 1, and
|
||||
the maximum value is the current setting of 'nr_pdflush_threads_max'.
|
||||
|
||||
See 'nr_pdflush_threads_max' below for more information.
|
||||
|
||||
==============================================================
|
||||
|
||||
nr_pdflush_threads_max
|
||||
|
||||
This value controls the maximum number of pdflush threads that can be
|
||||
created. The pdflush algorithm will create a new pdflush thread (up to
|
||||
this maximum) if no pdflush threads have been available for >= 1 second.
|
||||
|
||||
The default value is 8. The minimum value you can specify is the
|
||||
current value of 'nr_pdflush_threads_min' and the
|
||||
maximum is 1000.
|
||||
|
||||
==============================================================
|
||||
|
||||
overcommit_memory:
|
||||
|
||||
This value contains a flag that enables memory overcommitment.
|
||||
|
|
|
|||
125
Documentation/video4linux/pxa_camera.txt
Normal file
125
Documentation/video4linux/pxa_camera.txt
Normal file
|
|
@ -0,0 +1,125 @@
|
|||
PXA-Camera Host Driver
|
||||
======================
|
||||
|
||||
Constraints
|
||||
-----------
|
||||
a) Image size for YUV422P format
|
||||
All YUV422P images are enforced to have width x height % 16 = 0.
|
||||
This is due to DMA constraints, which transfers only planes of 8 byte
|
||||
multiples.
|
||||
|
||||
|
||||
Global video workflow
|
||||
---------------------
|
||||
a) QCI stopped
|
||||
Initialy, the QCI interface is stopped.
|
||||
When a buffer is queued (pxa_videobuf_ops->buf_queue), the QCI starts.
|
||||
|
||||
b) QCI started
|
||||
More buffers can be queued while the QCI is started without halting the
|
||||
capture. The new buffers are "appended" at the tail of the DMA chain, and
|
||||
smoothly captured one frame after the other.
|
||||
|
||||
Once a buffer is filled in the QCI interface, it is marked as "DONE" and
|
||||
removed from the active buffers list. It can be then requeud or dequeued by
|
||||
userland application.
|
||||
|
||||
Once the last buffer is filled in, the QCI interface stops.
|
||||
|
||||
|
||||
DMA usage
|
||||
---------
|
||||
a) DMA flow
|
||||
- first buffer queued for capture
|
||||
Once a first buffer is queued for capture, the QCI is started, but data
|
||||
transfer is not started. On "End Of Frame" interrupt, the irq handler
|
||||
starts the DMA chain.
|
||||
- capture of one videobuffer
|
||||
The DMA chain starts transfering data into videobuffer RAM pages.
|
||||
When all pages are transfered, the DMA irq is raised on "ENDINTR" status
|
||||
- finishing one videobuffer
|
||||
The DMA irq handler marks the videobuffer as "done", and removes it from
|
||||
the active running queue
|
||||
Meanwhile, the next videobuffer (if there is one), is transfered by DMA
|
||||
- finishing the last videobuffer
|
||||
On the DMA irq of the last videobuffer, the QCI is stopped.
|
||||
|
||||
b) DMA prepared buffer will have this structure
|
||||
|
||||
+------------+-----+---------------+-----------------+
|
||||
| desc-sg[0] | ... | desc-sg[last] | finisher/linker |
|
||||
+------------+-----+---------------+-----------------+
|
||||
|
||||
This structure is pointed by dma->sg_cpu.
|
||||
The descriptors are used as follows :
|
||||
- desc-sg[i]: i-th descriptor, transfering the i-th sg
|
||||
element to the video buffer scatter gather
|
||||
- finisher: has ddadr=DADDR_STOP, dcmd=ENDIRQEN
|
||||
- linker: has ddadr= desc-sg[0] of next video buffer, dcmd=0
|
||||
|
||||
For the next schema, let's assume d0=desc-sg[0] .. dN=desc-sg[N],
|
||||
"f" stands for finisher and "l" for linker.
|
||||
A typical running chain is :
|
||||
|
||||
Videobuffer 1 Videobuffer 2
|
||||
+---------+----+---+ +----+----+----+---+
|
||||
| d0 | .. | dN | l | | d0 | .. | dN | f |
|
||||
+---------+----+-|-+ ^----+----+----+---+
|
||||
| |
|
||||
+----+
|
||||
|
||||
After the chaining is finished, the chain looks like :
|
||||
|
||||
Videobuffer 1 Videobuffer 2 Videobuffer 3
|
||||
+---------+----+---+ +----+----+----+---+ +----+----+----+---+
|
||||
| d0 | .. | dN | l | | d0 | .. | dN | l | | d0 | .. | dN | f |
|
||||
+---------+----+-|-+ ^----+----+----+-|-+ ^----+----+----+---+
|
||||
| | | |
|
||||
+----+ +----+
|
||||
new_link
|
||||
|
||||
c) DMA hot chaining timeslice issue
|
||||
|
||||
As DMA chaining is done while DMA _is_ running, the linking may be done
|
||||
while the DMA jumps from one Videobuffer to another. On the schema, that
|
||||
would be a problem if the following sequence is encountered :
|
||||
|
||||
- DMA chain is Videobuffer1 + Videobuffer2
|
||||
- pxa_videobuf_queue() is called to queue Videobuffer3
|
||||
- DMA controller finishes Videobuffer2, and DMA stops
|
||||
=>
|
||||
Videobuffer 1 Videobuffer 2
|
||||
+---------+----+---+ +----+----+----+---+
|
||||
| d0 | .. | dN | l | | d0 | .. | dN | f |
|
||||
+---------+----+-|-+ ^----+----+----+-^-+
|
||||
| | |
|
||||
+----+ +-- DMA DDADR loads DDADR_STOP
|
||||
|
||||
- pxa_dma_add_tail_buf() is called, the Videobuffer2 "finisher" is
|
||||
replaced by a "linker" to Videobuffer3 (creation of new_link)
|
||||
- pxa_videobuf_queue() finishes
|
||||
- the DMA irq handler is called, which terminates Videobuffer2
|
||||
- Videobuffer3 capture is not scheduled on DMA chain (as it stopped !!!)
|
||||
|
||||
Videobuffer 1 Videobuffer 2 Videobuffer 3
|
||||
+---------+----+---+ +----+----+----+---+ +----+----+----+---+
|
||||
| d0 | .. | dN | l | | d0 | .. | dN | l | | d0 | .. | dN | f |
|
||||
+---------+----+-|-+ ^----+----+----+-|-+ ^----+----+----+---+
|
||||
| | | |
|
||||
+----+ +----+
|
||||
new_link
|
||||
DMA DDADR still is DDADR_STOP
|
||||
|
||||
- pxa_camera_check_link_miss() is called
|
||||
This checks if the DMA is finished and a buffer is still on the
|
||||
pcdev->capture list. If that's the case, the capture will be restarted,
|
||||
and Videobuffer3 is scheduled on DMA chain.
|
||||
- the DMA irq handler finishes
|
||||
|
||||
Note: if DMA stops just after pxa_camera_check_link_miss() reads DDADR()
|
||||
value, we have the guarantee that the DMA irq handler will be called back
|
||||
when the DMA will finish the buffer, and pxa_camera_check_link_miss() will
|
||||
be called again, to reschedule Videobuffer3.
|
||||
|
||||
--
|
||||
Author: Robert Jarzmik <robert.jarzmik@free.fr>
|
||||
|
|
@ -90,7 +90,7 @@ up before calling v4l2_device_register then it will be untouched. If dev is
|
|||
NULL, then you *must* setup v4l2_dev->name before calling v4l2_device_register.
|
||||
|
||||
The first 'dev' argument is normally the struct device pointer of a pci_dev,
|
||||
usb_device or platform_device. It is rare for dev to be NULL, but it happens
|
||||
usb_interface or platform_device. It is rare for dev to be NULL, but it happens
|
||||
with ISA devices or when one device creates multiple PCI devices, thus making
|
||||
it impossible to associate v4l2_dev with a particular parent.
|
||||
|
||||
|
|
@ -351,17 +351,6 @@ And this to go from an i2c_client to a v4l2_subdev struct:
|
|||
|
||||
struct v4l2_subdev *sd = i2c_get_clientdata(client);
|
||||
|
||||
Finally you need to make a command function to make driver->command()
|
||||
call the right subdev_ops functions:
|
||||
|
||||
static int subdev_command(struct i2c_client *client, unsigned cmd, void *arg)
|
||||
{
|
||||
return v4l2_subdev_command(i2c_get_clientdata(client), cmd, arg);
|
||||
}
|
||||
|
||||
If driver->command is never used then you can leave this out. Eventually the
|
||||
driver->command usage should be removed from v4l.
|
||||
|
||||
Make sure to call v4l2_device_unregister_subdev(sd) when the remove() callback
|
||||
is called. This will unregister the sub-device from the bridge driver. It is
|
||||
safe to call this even if the sub-device was never registered.
|
||||
|
|
@ -375,14 +364,12 @@ from the remove() callback ensures that this is always done correctly.
|
|||
|
||||
The bridge driver also has some helper functions it can use:
|
||||
|
||||
struct v4l2_subdev *sd = v4l2_i2c_new_subdev(adapter, "module_foo", "chipid", 0x36);
|
||||
struct v4l2_subdev *sd = v4l2_i2c_new_subdev(v4l2_dev, adapter,
|
||||
"module_foo", "chipid", 0x36);
|
||||
|
||||
This loads the given module (can be NULL if no module needs to be loaded) and
|
||||
calls i2c_new_device() with the given i2c_adapter and chip/address arguments.
|
||||
If all goes well, then it registers the subdev with the v4l2_device. It gets
|
||||
the v4l2_device by calling i2c_get_adapdata(adapter), so you should make sure
|
||||
to call i2c_set_adapdata(adapter, v4l2_device) when you setup the i2c_adapter
|
||||
in your driver.
|
||||
If all goes well, then it registers the subdev with the v4l2_device.
|
||||
|
||||
You can also use v4l2_i2c_new_probed_subdev() which is very similar to
|
||||
v4l2_i2c_new_subdev(), except that it has an array of possible I2C addresses
|
||||
|
|
|
|||
20
MAINTAINERS
20
MAINTAINERS
|
|
@ -636,7 +636,7 @@ P: Dirk Opfer
|
|||
M: dirk@opfer-online.de
|
||||
S: Maintained
|
||||
|
||||
ARM/PALMTX,PALMT5,PALMLD SUPPORT
|
||||
ARM/PALMTX,PALMT5,PALMLD,PALMTE2 SUPPORT
|
||||
P: Marek Vasut
|
||||
M: marek.vasut@gmail.com
|
||||
W: http://hackndev.com
|
||||
|
|
@ -1544,7 +1544,6 @@ S: Maintained
|
|||
DVB SUBSYSTEM AND DRIVERS
|
||||
P: LinuxTV.org Project
|
||||
M: linux-media@vger.kernel.org
|
||||
L: linux-dvb@linuxtv.org (subscription required)
|
||||
W: http://linuxtv.org/
|
||||
T: git kernel.org:/pub/scm/linux/kernel/git/mchehab/linux-2.6.git
|
||||
S: Maintained
|
||||
|
|
@ -3058,7 +3057,7 @@ S: Supported
|
|||
|
||||
MULTIMEDIA CARD (MMC), SECURE DIGITAL (SD) AND SDIO SUBSYSTEM
|
||||
P: Pierre Ossman
|
||||
M: drzeus-mmc@drzeus.cx
|
||||
M: pierre@ossman.eu
|
||||
L: linux-kernel@vger.kernel.org
|
||||
S: Maintained
|
||||
|
||||
|
|
@ -3245,6 +3244,13 @@ M: andi@lisas.de
|
|||
L: netdev@vger.kernel.org
|
||||
S: Maintained
|
||||
|
||||
NILFS2 FILESYSTEM
|
||||
P: KONISHI Ryusuke
|
||||
M: konishi.ryusuke@lab.ntt.co.jp
|
||||
L: users@nilfs.org
|
||||
W: http://www.nilfs.org/en/
|
||||
S: Supported
|
||||
|
||||
NINJA SCSI-3 / NINJA SCSI-32Bi (16bit/CardBus) PCMCIA SCSI HOST ADAPTER DRIVER
|
||||
P: YOKOTA Hiroshi
|
||||
M: yokota@netlab.is.tsukuba.ac.jp
|
||||
|
|
@ -3867,8 +3873,8 @@ S: Maintained
|
|||
SCHEDULER
|
||||
P: Ingo Molnar
|
||||
M: mingo@elte.hu
|
||||
P: Robert Love [the preemptible kernel bits]
|
||||
M: rml@tech9.net
|
||||
P: Peter Zijlstra
|
||||
M: peterz@infradead.org
|
||||
L: linux-kernel@vger.kernel.org
|
||||
S: Maintained
|
||||
|
||||
|
|
@ -3933,7 +3939,7 @@ S: Maintained
|
|||
|
||||
SECURE DIGITAL HOST CONTROLLER INTERFACE (SDHCI) DRIVER
|
||||
P: Pierre Ossman
|
||||
M: drzeus-sdhci@drzeus.cx
|
||||
M: pierre@ossman.eu
|
||||
L: sdhci-devel@lists.ossman.eu
|
||||
S: Maintained
|
||||
|
||||
|
|
@ -4920,7 +4926,7 @@ S: Maintained
|
|||
|
||||
W83L51xD SD/MMC CARD INTERFACE DRIVER
|
||||
P: Pierre Ossman
|
||||
M: drzeus-wbsd@drzeus.cx
|
||||
M: pierre@ossman.eu
|
||||
L: linux-kernel@vger.kernel.org
|
||||
S: Maintained
|
||||
|
||||
|
|
|
|||
4
Makefile
4
Makefile
|
|
@ -1,7 +1,7 @@
|
|||
VERSION = 2
|
||||
PATCHLEVEL = 6
|
||||
SUBLEVEL = 29
|
||||
EXTRAVERSION =
|
||||
SUBLEVEL = 30
|
||||
EXTRAVERSION = -rc1
|
||||
NAME = Temporary Tasmanian Devil
|
||||
|
||||
# *DOCUMENTATION*
|
||||
|
|
|
|||
|
|
@ -1183,7 +1183,11 @@ CONFIG_RTC_INTF_DEV=y
|
|||
CONFIG_RTC_DRV_SA1100=y
|
||||
# CONFIG_RTC_DRV_PXA is not set
|
||||
# CONFIG_DMADEVICES is not set
|
||||
# CONFIG_REGULATOR is not set
|
||||
CONFIG_REGULATOR=y
|
||||
# CONFIG_REGULATOR_DEBUG is not set
|
||||
# CONFIG_REGULATOR_FIXED_VOLTAGE is not set
|
||||
# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set
|
||||
CONFIG_REGULATOR_BQ24022=y
|
||||
# CONFIG_UIO is not set
|
||||
# CONFIG_STAGING is not set
|
||||
|
||||
|
|
|
|||
|
|
@ -32,6 +32,7 @@
|
|||
#define SZ_4K 0x00001000
|
||||
#define SZ_8K 0x00002000
|
||||
#define SZ_16K 0x00004000
|
||||
#define SZ_32K 0x00008000
|
||||
#define SZ_64K 0x00010000
|
||||
#define SZ_128K 0x00020000
|
||||
#define SZ_256K 0x00040000
|
||||
|
|
|
|||
|
|
@ -87,7 +87,7 @@ extern void __init at91_add_device_eth(struct at91_eth_data *data);
|
|||
/* USB Host */
|
||||
struct at91_usbh_data {
|
||||
u8 ports; /* number of ports on root hub */
|
||||
u8 vbus_pin[]; /* port power-control pin */
|
||||
u8 vbus_pin[2]; /* port power-control pin */
|
||||
};
|
||||
extern void __init at91_add_device_usbh(struct at91_usbh_data *data);
|
||||
|
||||
|
|
|
|||
|
|
@ -118,7 +118,7 @@ static struct resource ide_resources[] = {
|
|||
},
|
||||
};
|
||||
|
||||
static u64 ide_dma_mask = DMA_32BIT_MASK;
|
||||
static u64 ide_dma_mask = DMA_BIT_MASK(32);
|
||||
|
||||
static struct platform_device ide_dev = {
|
||||
.name = "palm_bk3710",
|
||||
|
|
@ -127,7 +127,7 @@ static struct platform_device ide_dev = {
|
|||
.num_resources = ARRAY_SIZE(ide_resources),
|
||||
.dev = {
|
||||
.dma_mask = &ide_dma_mask,
|
||||
.coherent_dma_mask = DMA_32BIT_MASK,
|
||||
.coherent_dma_mask = DMA_BIT_MASK(32),
|
||||
},
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -64,7 +64,7 @@ static struct resource usb_resources[] = {
|
|||
},
|
||||
};
|
||||
|
||||
static u64 usb_dmamask = DMA_32BIT_MASK;
|
||||
static u64 usb_dmamask = DMA_BIT_MASK(32);
|
||||
|
||||
static struct platform_device usb_dev = {
|
||||
.name = "musb_hdrc",
|
||||
|
|
@ -72,7 +72,7 @@ static struct platform_device usb_dev = {
|
|||
.dev = {
|
||||
.platform_data = &usb_data,
|
||||
.dma_mask = &usb_dmamask,
|
||||
.coherent_dma_mask = DMA_32BIT_MASK,
|
||||
.coherent_dma_mask = DMA_BIT_MASK(32),
|
||||
},
|
||||
.resource = usb_resources,
|
||||
.num_resources = ARRAY_SIZE(usb_resources),
|
||||
|
|
|
|||
|
|
@ -307,7 +307,7 @@ static struct resource iop13xx_adma_2_resources[] = {
|
|||
}
|
||||
};
|
||||
|
||||
static u64 iop13xx_adma_dmamask = DMA_64BIT_MASK;
|
||||
static u64 iop13xx_adma_dmamask = DMA_BIT_MASK(64);
|
||||
static struct iop_adma_platform_data iop13xx_adma_0_data = {
|
||||
.hw_id = 0,
|
||||
.pool_size = PAGE_SIZE,
|
||||
|
|
@ -331,7 +331,7 @@ static struct platform_device iop13xx_adma_0_channel = {
|
|||
.resource = iop13xx_adma_0_resources,
|
||||
.dev = {
|
||||
.dma_mask = &iop13xx_adma_dmamask,
|
||||
.coherent_dma_mask = DMA_64BIT_MASK,
|
||||
.coherent_dma_mask = DMA_BIT_MASK(64),
|
||||
.platform_data = (void *) &iop13xx_adma_0_data,
|
||||
},
|
||||
};
|
||||
|
|
@ -343,7 +343,7 @@ static struct platform_device iop13xx_adma_1_channel = {
|
|||
.resource = iop13xx_adma_1_resources,
|
||||
.dev = {
|
||||
.dma_mask = &iop13xx_adma_dmamask,
|
||||
.coherent_dma_mask = DMA_64BIT_MASK,
|
||||
.coherent_dma_mask = DMA_BIT_MASK(64),
|
||||
.platform_data = (void *) &iop13xx_adma_1_data,
|
||||
},
|
||||
};
|
||||
|
|
@ -355,7 +355,7 @@ static struct platform_device iop13xx_adma_2_channel = {
|
|||
.resource = iop13xx_adma_2_resources,
|
||||
.dev = {
|
||||
.dma_mask = &iop13xx_adma_dmamask,
|
||||
.coherent_dma_mask = DMA_64BIT_MASK,
|
||||
.coherent_dma_mask = DMA_BIT_MASK(64),
|
||||
.platform_data = (void *) &iop13xx_adma_2_data,
|
||||
},
|
||||
};
|
||||
|
|
|
|||
|
|
@ -151,7 +151,7 @@ static struct resource iop13xx_tpmi_3_resources[] = {
|
|||
}
|
||||
};
|
||||
|
||||
u64 iop13xx_tpmi_mask = DMA_64BIT_MASK;
|
||||
u64 iop13xx_tpmi_mask = DMA_BIT_MASK(64);
|
||||
static struct platform_device iop13xx_tpmi_0_device = {
|
||||
.name = "iop-tpmi",
|
||||
.id = 0,
|
||||
|
|
@ -159,7 +159,7 @@ static struct platform_device iop13xx_tpmi_0_device = {
|
|||
.resource = iop13xx_tpmi_0_resources,
|
||||
.dev = {
|
||||
.dma_mask = &iop13xx_tpmi_mask,
|
||||
.coherent_dma_mask = DMA_64BIT_MASK,
|
||||
.coherent_dma_mask = DMA_BIT_MASK(64),
|
||||
},
|
||||
};
|
||||
|
||||
|
|
@ -170,7 +170,7 @@ static struct platform_device iop13xx_tpmi_1_device = {
|
|||
.resource = iop13xx_tpmi_1_resources,
|
||||
.dev = {
|
||||
.dma_mask = &iop13xx_tpmi_mask,
|
||||
.coherent_dma_mask = DMA_64BIT_MASK,
|
||||
.coherent_dma_mask = DMA_BIT_MASK(64),
|
||||
},
|
||||
};
|
||||
|
||||
|
|
@ -181,7 +181,7 @@ static struct platform_device iop13xx_tpmi_2_device = {
|
|||
.resource = iop13xx_tpmi_2_resources,
|
||||
.dev = {
|
||||
.dma_mask = &iop13xx_tpmi_mask,
|
||||
.coherent_dma_mask = DMA_64BIT_MASK,
|
||||
.coherent_dma_mask = DMA_BIT_MASK(64),
|
||||
},
|
||||
};
|
||||
|
||||
|
|
@ -192,7 +192,7 @@ static struct platform_device iop13xx_tpmi_3_device = {
|
|||
.resource = iop13xx_tpmi_3_resources,
|
||||
.dev = {
|
||||
.dma_mask = &iop13xx_tpmi_mask,
|
||||
.coherent_dma_mask = DMA_64BIT_MASK,
|
||||
.coherent_dma_mask = DMA_BIT_MASK(64),
|
||||
},
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -508,7 +508,7 @@ static struct mv_xor_platform_shared_data kirkwood_xor_shared_data = {
|
|||
.dram = &kirkwood_mbus_dram_info,
|
||||
};
|
||||
|
||||
static u64 kirkwood_xor_dmamask = DMA_32BIT_MASK;
|
||||
static u64 kirkwood_xor_dmamask = DMA_BIT_MASK(32);
|
||||
|
||||
|
||||
/*****************************************************************************
|
||||
|
|
@ -559,7 +559,7 @@ static struct platform_device kirkwood_xor00_channel = {
|
|||
.resource = kirkwood_xor00_resources,
|
||||
.dev = {
|
||||
.dma_mask = &kirkwood_xor_dmamask,
|
||||
.coherent_dma_mask = DMA_64BIT_MASK,
|
||||
.coherent_dma_mask = DMA_BIT_MASK(64),
|
||||
.platform_data = (void *)&kirkwood_xor00_data,
|
||||
},
|
||||
};
|
||||
|
|
@ -585,7 +585,7 @@ static struct platform_device kirkwood_xor01_channel = {
|
|||
.resource = kirkwood_xor01_resources,
|
||||
.dev = {
|
||||
.dma_mask = &kirkwood_xor_dmamask,
|
||||
.coherent_dma_mask = DMA_64BIT_MASK,
|
||||
.coherent_dma_mask = DMA_BIT_MASK(64),
|
||||
.platform_data = (void *)&kirkwood_xor01_data,
|
||||
},
|
||||
};
|
||||
|
|
@ -657,7 +657,7 @@ static struct platform_device kirkwood_xor10_channel = {
|
|||
.resource = kirkwood_xor10_resources,
|
||||
.dev = {
|
||||
.dma_mask = &kirkwood_xor_dmamask,
|
||||
.coherent_dma_mask = DMA_64BIT_MASK,
|
||||
.coherent_dma_mask = DMA_BIT_MASK(64),
|
||||
.platform_data = (void *)&kirkwood_xor10_data,
|
||||
},
|
||||
};
|
||||
|
|
@ -683,7 +683,7 @@ static struct platform_device kirkwood_xor11_channel = {
|
|||
.resource = kirkwood_xor11_resources,
|
||||
.dev = {
|
||||
.dma_mask = &kirkwood_xor_dmamask,
|
||||
.coherent_dma_mask = DMA_64BIT_MASK,
|
||||
.coherent_dma_mask = DMA_BIT_MASK(64),
|
||||
.platform_data = (void *)&kirkwood_xor11_data,
|
||||
},
|
||||
};
|
||||
|
|
|
|||
|
|
@ -6,6 +6,9 @@
|
|||
|
||||
obj-y += generic.o clock.o devices.o
|
||||
|
||||
# Support for CMOS sensor interface
|
||||
obj-$(CONFIG_MX1_VIDEO) += ksym_mx1.o mx1_camera_fiq.o
|
||||
|
||||
# Specific board support
|
||||
obj-$(CONFIG_ARCH_MX1ADS) += mx1ads.o
|
||||
obj-$(CONFIG_MACH_SCB9328) += scb9328.o
|
||||
|
|
@ -44,7 +44,7 @@ static struct resource imx_csi_resources[] = {
|
|||
static u64 imx_csi_dmamask = 0xffffffffUL;
|
||||
|
||||
struct platform_device imx_csi_device = {
|
||||
.name = "imx-csi",
|
||||
.name = "mx1-camera",
|
||||
.id = 0, /* This is used to put cameras on this interface */
|
||||
.dev = {
|
||||
.dma_mask = &imx_csi_dmamask,
|
||||
|
|
|
|||
18
arch/arm/mach-mx1/ksym_mx1.c
Normal file
18
arch/arm/mach-mx1/ksym_mx1.c
Normal file
|
|
@ -0,0 +1,18 @@
|
|||
/*
|
||||
* Exported ksyms of ARCH_MX1
|
||||
*
|
||||
* Copyright (C) 2008, Darius Augulis <augulis.darius@gmail.com>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/module.h>
|
||||
|
||||
#include <mach/mx1_camera.h>
|
||||
|
||||
/* IMX camera FIQ handler */
|
||||
EXPORT_SYMBOL(mx1_camera_sof_fiq_start);
|
||||
EXPORT_SYMBOL(mx1_camera_sof_fiq_end);
|
||||
35
arch/arm/mach-mx1/mx1_camera_fiq.S
Normal file
35
arch/arm/mach-mx1/mx1_camera_fiq.S
Normal file
|
|
@ -0,0 +1,35 @@
|
|||
/*
|
||||
* Copyright (C) 2008 Paulius Zaleckas <paulius.zaleckas@teltonika.lt>
|
||||
*
|
||||
* Based on linux/arch/arm/lib/floppydma.S
|
||||
* Copyright (C) 1995, 1996 Russell King
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
#include <linux/linkage.h>
|
||||
#include <asm/assembler.h>
|
||||
|
||||
.text
|
||||
.global mx1_camera_sof_fiq_end
|
||||
.global mx1_camera_sof_fiq_start
|
||||
mx1_camera_sof_fiq_start:
|
||||
@ enable dma
|
||||
ldr r12, [r9]
|
||||
orr r12, r12, #0x00000001
|
||||
str r12, [r9]
|
||||
@ unmask DMA interrupt
|
||||
ldr r12, [r8]
|
||||
bic r12, r12, r13
|
||||
str r12, [r8]
|
||||
@ disable SOF interrupt
|
||||
ldr r12, [r10]
|
||||
bic r12, r12, #0x00010000
|
||||
str r12, [r10]
|
||||
@ clear SOF flag
|
||||
mov r12, #0x00010000
|
||||
str r12, [r11]
|
||||
@ return from FIQ
|
||||
subs pc, lr, #4
|
||||
mx1_camera_sof_fiq_end:
|
||||
|
|
@ -533,7 +533,7 @@ static struct clk_lookup lookups[] __initdata = {
|
|||
_REGISTER_CLOCK(NULL, "kpp", kpp_clk)
|
||||
_REGISTER_CLOCK("fsl-usb2-udc", "usb", usb_clk1)
|
||||
_REGISTER_CLOCK("fsl-usb2-udc", "usb_ahb", usb_clk2)
|
||||
_REGISTER_CLOCK("mx3-camera.0", "csi", csi_clk)
|
||||
_REGISTER_CLOCK("mx3-camera.0", NULL, csi_clk)
|
||||
_REGISTER_CLOCK("imx-uart.0", NULL, uart1_clk)
|
||||
_REGISTER_CLOCK("imx-uart.1", NULL, uart2_clk)
|
||||
_REGISTER_CLOCK("imx-uart.2", NULL, uart3_clk)
|
||||
|
|
|
|||
|
|
@ -590,27 +590,28 @@ static void omap1_init_ext_clk(struct clk * clk)
|
|||
static int omap1_clk_enable(struct clk *clk)
|
||||
{
|
||||
int ret = 0;
|
||||
if (clk->usecount++ == 0) {
|
||||
if (likely(clk->parent)) {
|
||||
ret = omap1_clk_enable(clk->parent);
|
||||
|
||||
if (unlikely(ret != 0)) {
|
||||
clk->usecount--;
|
||||
return ret;
|
||||
}
|
||||
if (clk->usecount++ == 0) {
|
||||
if (clk->parent) {
|
||||
ret = omap1_clk_enable(clk->parent);
|
||||
if (ret)
|
||||
goto err;
|
||||
|
||||
if (clk->flags & CLOCK_NO_IDLE_PARENT)
|
||||
omap1_clk_deny_idle(clk->parent);
|
||||
}
|
||||
|
||||
ret = clk->ops->enable(clk);
|
||||
|
||||
if (unlikely(ret != 0) && clk->parent) {
|
||||
omap1_clk_disable(clk->parent);
|
||||
clk->usecount--;
|
||||
if (ret) {
|
||||
if (clk->parent)
|
||||
omap1_clk_disable(clk->parent);
|
||||
goto err;
|
||||
}
|
||||
}
|
||||
return ret;
|
||||
|
||||
err:
|
||||
clk->usecount--;
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -463,7 +463,7 @@ static struct platform_device orion5x_xor_shared = {
|
|||
.resource = orion5x_xor_shared_resources,
|
||||
};
|
||||
|
||||
static u64 orion5x_xor_dmamask = DMA_32BIT_MASK;
|
||||
static u64 orion5x_xor_dmamask = DMA_BIT_MASK(32);
|
||||
|
||||
static struct resource orion5x_xor0_resources[] = {
|
||||
[0] = {
|
||||
|
|
@ -486,7 +486,7 @@ static struct platform_device orion5x_xor0_channel = {
|
|||
.resource = orion5x_xor0_resources,
|
||||
.dev = {
|
||||
.dma_mask = &orion5x_xor_dmamask,
|
||||
.coherent_dma_mask = DMA_64BIT_MASK,
|
||||
.coherent_dma_mask = DMA_BIT_MASK(64),
|
||||
.platform_data = (void *)&orion5x_xor0_data,
|
||||
},
|
||||
};
|
||||
|
|
@ -512,7 +512,7 @@ static struct platform_device orion5x_xor1_channel = {
|
|||
.resource = orion5x_xor1_resources,
|
||||
.dev = {
|
||||
.dma_mask = &orion5x_xor_dmamask,
|
||||
.coherent_dma_mask = DMA_64BIT_MASK,
|
||||
.coherent_dma_mask = DMA_BIT_MASK(64),
|
||||
.platform_data = (void *)&orion5x_xor1_data,
|
||||
},
|
||||
};
|
||||
|
|
|
|||
|
|
@ -343,6 +343,15 @@ config ARCH_PXA_PALM
|
|||
bool "PXA based Palm PDAs"
|
||||
select HAVE_PWM
|
||||
|
||||
config MACH_PALMTE2
|
||||
bool "Palm Tungsten|E2"
|
||||
default y
|
||||
depends on ARCH_PXA_PALM
|
||||
select PXA25x
|
||||
help
|
||||
Say Y here if you intend to run this kernel on a Palm Tungsten|E2
|
||||
handheld computer.
|
||||
|
||||
config MACH_PALMT5
|
||||
bool "Palm Tungsten|T5"
|
||||
default y
|
||||
|
|
|
|||
|
|
@ -57,6 +57,7 @@ obj-$(CONFIG_MACH_E740) += e740.o
|
|||
obj-$(CONFIG_MACH_E750) += e750.o
|
||||
obj-$(CONFIG_MACH_E400) += e400.o
|
||||
obj-$(CONFIG_MACH_E800) += e800.o
|
||||
obj-$(CONFIG_MACH_PALMTE2) += palmte2.o
|
||||
obj-$(CONFIG_MACH_PALMT5) += palmt5.o
|
||||
obj-$(CONFIG_MACH_PALMTX) += palmtx.o
|
||||
obj-$(CONFIG_MACH_PALMLD) += palmld.o
|
||||
|
|
|
|||
|
|
@ -121,7 +121,7 @@ static inline void cmx2xx_init_dm9000(void) {}
|
|||
/* UCB1400 touchscreen controller */
|
||||
#if defined(CONFIG_TOUCHSCREEN_UCB1400) || defined(CONFIG_TOUCHSCREEN_UCB1400_MODULE)
|
||||
static struct platform_device cmx2xx_ts_device = {
|
||||
.name = "ucb1400_ts",
|
||||
.name = "ucb1400_core",
|
||||
.id = -1,
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -15,7 +15,7 @@
|
|||
#include <linux/kernel.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/gpio.h>
|
||||
#include <net/ax88796.h>
|
||||
#include <linux/interrupt.h>
|
||||
|
||||
#include <asm/mach-types.h>
|
||||
#include <asm/sizes.h>
|
||||
|
|
@ -32,12 +32,13 @@
|
|||
|
||||
#if defined(CONFIG_AX88796)
|
||||
#define COLIBRI_ETH_IRQ_GPIO mfp_to_gpio(GPIO26_GPIO)
|
||||
|
||||
/*
|
||||
* Asix AX88796 Ethernet
|
||||
*/
|
||||
static struct ax_plat_data colibri_asix_platdata = {
|
||||
.flags = AXFLG_MAC_FROMDEV,
|
||||
.wordlength = 2
|
||||
.flags = 0, /* defined later */
|
||||
.wordlength = 2,
|
||||
};
|
||||
|
||||
static struct resource colibri_asix_resource[] = {
|
||||
|
|
@ -49,7 +50,7 @@ static struct resource colibri_asix_resource[] = {
|
|||
[1] = {
|
||||
.start = gpio_to_irq(COLIBRI_ETH_IRQ_GPIO),
|
||||
.end = gpio_to_irq(COLIBRI_ETH_IRQ_GPIO),
|
||||
.flags = IORESOURCE_IRQ
|
||||
.flags = IORESOURCE_IRQ | IRQF_TRIGGER_FALLING,
|
||||
}
|
||||
};
|
||||
|
||||
|
|
@ -70,8 +71,8 @@ static mfp_cfg_t colibri_pxa300_eth_pin_config[] __initdata = {
|
|||
|
||||
static void __init colibri_pxa300_init_eth(void)
|
||||
{
|
||||
colibri_pxa3xx_init_eth(&colibri_asix_platdata);
|
||||
pxa3xx_mfp_config(ARRAY_AND_SIZE(colibri_pxa300_eth_pin_config));
|
||||
set_irq_type(gpio_to_irq(COLIBRI_ETH_IRQ_GPIO), IRQ_TYPE_EDGE_FALLING);
|
||||
platform_device_register(&asix_device);
|
||||
}
|
||||
#else
|
||||
|
|
|
|||
|
|
@ -15,7 +15,7 @@
|
|||
#include <linux/kernel.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/gpio.h>
|
||||
#include <net/ax88796.h>
|
||||
#include <linux/interrupt.h>
|
||||
|
||||
#include <asm/mach-types.h>
|
||||
#include <asm/sizes.h>
|
||||
|
|
@ -38,8 +38,8 @@
|
|||
* Asix AX88796 Ethernet
|
||||
*/
|
||||
static struct ax_plat_data colibri_asix_platdata = {
|
||||
.flags = AXFLG_MAC_FROMDEV,
|
||||
.wordlength = 2
|
||||
.flags = 0, /* defined later */
|
||||
.wordlength = 2,
|
||||
};
|
||||
|
||||
static struct resource colibri_asix_resource[] = {
|
||||
|
|
@ -51,7 +51,7 @@ static struct resource colibri_asix_resource[] = {
|
|||
[1] = {
|
||||
.start = gpio_to_irq(COLIBRI_ETH_IRQ_GPIO),
|
||||
.end = gpio_to_irq(COLIBRI_ETH_IRQ_GPIO),
|
||||
.flags = IORESOURCE_IRQ
|
||||
.flags = IORESOURCE_IRQ | IRQF_TRIGGER_FALLING,
|
||||
}
|
||||
};
|
||||
|
||||
|
|
@ -72,8 +72,8 @@ static mfp_cfg_t colibri_pxa320_eth_pin_config[] __initdata = {
|
|||
|
||||
static void __init colibri_pxa320_init_eth(void)
|
||||
{
|
||||
colibri_pxa3xx_init_eth(&colibri_asix_platdata);
|
||||
pxa3xx_mfp_config(ARRAY_AND_SIZE(colibri_pxa320_eth_pin_config));
|
||||
set_irq_type(gpio_to_irq(COLIBRI_ETH_IRQ_GPIO), IRQ_TYPE_EDGE_FALLING);
|
||||
platform_device_register(&asix_device);
|
||||
}
|
||||
#else
|
||||
|
|
|
|||
|
|
@ -14,6 +14,7 @@
|
|||
#include <linux/kernel.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/gpio.h>
|
||||
#include <linux/etherdevice.h>
|
||||
#include <asm/mach-types.h>
|
||||
#include <mach/hardware.h>
|
||||
#include <asm/sizes.h>
|
||||
|
|
@ -28,6 +29,40 @@
|
|||
#include "generic.h"
|
||||
#include "devices.h"
|
||||
|
||||
#if defined(CONFIG_AX88796)
|
||||
#define ETHER_ADDR_LEN 6
|
||||
static u8 ether_mac_addr[ETHER_ADDR_LEN];
|
||||
|
||||
void __init colibri_pxa3xx_init_eth(struct ax_plat_data *plat_data)
|
||||
{
|
||||
int i;
|
||||
u64 serial = ((u64) system_serial_high << 32) | system_serial_low;
|
||||
|
||||
/*
|
||||
* If the bootloader passed in a serial boot tag, which contains a
|
||||
* valid ethernet MAC, pass it to the interface. Toradex ships the
|
||||
* modules with their own bootloader which provides a valid MAC
|
||||
* this way.
|
||||
*/
|
||||
|
||||
for (i = 0; i < ETHER_ADDR_LEN; i++) {
|
||||
ether_mac_addr[i] = serial & 0xff;
|
||||
serial >>= 8;
|
||||
}
|
||||
|
||||
if (is_valid_ether_addr(ether_mac_addr)) {
|
||||
plat_data->flags |= AXFLG_MAC_FROMPLATFORM;
|
||||
plat_data->mac_addr = ether_mac_addr;
|
||||
printk(KERN_INFO "%s(): taking MAC from serial boot tag\n",
|
||||
__func__);
|
||||
} else {
|
||||
plat_data->flags |= AXFLG_MAC_FROMDEV;
|
||||
printk(KERN_INFO "%s(): no valid serial boot tag found, "
|
||||
"taking MAC from device\n", __func__);
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_MMC_PXA) || defined(CONFIG_MMC_PXA_MODULE)
|
||||
static int mmc_detect_pin;
|
||||
|
||||
|
|
|
|||
|
|
@ -5,6 +5,8 @@
|
|||
#include <linux/input.h>
|
||||
#include <linux/leds.h>
|
||||
|
||||
#include <asm/mach-types.h>
|
||||
|
||||
static struct gpio_keys_button csb701_buttons[] = {
|
||||
{
|
||||
.code = 0x7,
|
||||
|
|
@ -54,6 +56,9 @@ static struct platform_device *devices[] __initdata = {
|
|||
|
||||
static int __init csb701_init(void)
|
||||
{
|
||||
if (!machine_is_csb726())
|
||||
return -ENODEV;
|
||||
|
||||
return platform_add_devices(devices, ARRAY_SIZE(devices));
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -29,6 +29,7 @@
|
|||
#include <mach/udc.h>
|
||||
#include <mach/irda.h>
|
||||
#include <mach/irqs.h>
|
||||
#include <mach/audio.h>
|
||||
|
||||
#include "generic.h"
|
||||
#include "eseries.h"
|
||||
|
|
@ -197,6 +198,7 @@ static void __init e740_init(void)
|
|||
eseries_get_tmio_gpios();
|
||||
platform_add_devices(devices, ARRAY_SIZE(devices));
|
||||
pxa_set_udc_info(&e7xx_udc_mach_info);
|
||||
pxa_set_ac97_info(NULL);
|
||||
e7xx_irda_init();
|
||||
pxa_set_ficp_info(&e7xx_ficp_platform_data);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -28,6 +28,7 @@
|
|||
#include <mach/udc.h>
|
||||
#include <mach/irda.h>
|
||||
#include <mach/irqs.h>
|
||||
#include <mach/audio.h>
|
||||
|
||||
#include "generic.h"
|
||||
#include "eseries.h"
|
||||
|
|
@ -198,6 +199,7 @@ static void __init e750_init(void)
|
|||
eseries_get_tmio_gpios();
|
||||
platform_add_devices(devices, ARRAY_SIZE(devices));
|
||||
pxa_set_udc_info(&e7xx_udc_mach_info);
|
||||
pxa_set_ac97_info(NULL);
|
||||
e7xx_irda_init();
|
||||
pxa_set_ficp_info(&e7xx_ficp_platform_data);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -27,6 +27,7 @@
|
|||
#include <mach/eseries-gpio.h>
|
||||
#include <mach/udc.h>
|
||||
#include <mach/irqs.h>
|
||||
#include <mach/audio.h>
|
||||
|
||||
#include "generic.h"
|
||||
#include "eseries.h"
|
||||
|
|
@ -199,6 +200,7 @@ static void __init e800_init(void)
|
|||
eseries_get_tmio_gpios();
|
||||
platform_add_devices(devices, ARRAY_SIZE(devices));
|
||||
pxa_set_udc_info(&e800_udc_mach_info);
|
||||
pxa_set_ac97_info(NULL);
|
||||
}
|
||||
|
||||
MACHINE_START(E800, "Toshiba e800")
|
||||
|
|
|
|||
|
|
@ -25,8 +25,10 @@
|
|||
#include <linux/regulator/machine.h>
|
||||
#include <linux/spi/spi.h>
|
||||
#include <linux/spi/tdo24m.h>
|
||||
#include <linux/spi/libertas_spi.h>
|
||||
#include <linux/power_supply.h>
|
||||
#include <linux/apm-emulation.h>
|
||||
#include <linux/delay.h>
|
||||
|
||||
#include <media/soc_camera.h>
|
||||
|
||||
|
|
@ -62,6 +64,8 @@
|
|||
#define GPIO93_CAM_RESET (93)
|
||||
#define GPIO41_ETHIRQ (41)
|
||||
#define EM_X270_ETHIRQ IRQ_GPIO(GPIO41_ETHIRQ)
|
||||
#define GPIO115_WLAN_PWEN (115)
|
||||
#define GPIO19_WLAN_STRAP (19)
|
||||
|
||||
static int mmc_cd;
|
||||
static int nand_rb;
|
||||
|
|
@ -159,8 +163,8 @@ static unsigned long common_pin_config[] = {
|
|||
GPIO57_SSP1_TXD,
|
||||
|
||||
/* SSP2 */
|
||||
GPIO19_SSP2_SCLK,
|
||||
GPIO14_SSP2_SFRM,
|
||||
GPIO19_GPIO, /* SSP2 clock is used as GPIO for Libertas pin-strap */
|
||||
GPIO14_GPIO,
|
||||
GPIO89_SSP2_TXD,
|
||||
GPIO88_SSP2_RXD,
|
||||
|
||||
|
|
@ -648,20 +652,86 @@ static struct tdo24m_platform_data em_x270_tdo24m_pdata = {
|
|||
.model = TDO35S,
|
||||
};
|
||||
|
||||
static struct pxa2xx_spi_master em_x270_spi_2_info = {
|
||||
.num_chipselect = 1,
|
||||
.enable_dma = 1,
|
||||
};
|
||||
|
||||
static struct pxa2xx_spi_chip em_x270_libertas_chip = {
|
||||
.rx_threshold = 1,
|
||||
.tx_threshold = 1,
|
||||
.timeout = 1000,
|
||||
};
|
||||
|
||||
static unsigned long em_x270_libertas_pin_config[] = {
|
||||
/* SSP2 */
|
||||
GPIO19_SSP2_SCLK,
|
||||
GPIO14_GPIO,
|
||||
GPIO89_SSP2_TXD,
|
||||
GPIO88_SSP2_RXD,
|
||||
};
|
||||
|
||||
static int em_x270_libertas_setup(struct spi_device *spi)
|
||||
{
|
||||
int err = gpio_request(GPIO115_WLAN_PWEN, "WLAN PWEN");
|
||||
if (err)
|
||||
return err;
|
||||
|
||||
gpio_direction_output(GPIO19_WLAN_STRAP, 1);
|
||||
mdelay(100);
|
||||
|
||||
pxa2xx_mfp_config(ARRAY_AND_SIZE(em_x270_libertas_pin_config));
|
||||
|
||||
gpio_direction_output(GPIO115_WLAN_PWEN, 0);
|
||||
mdelay(100);
|
||||
gpio_set_value(GPIO115_WLAN_PWEN, 1);
|
||||
mdelay(100);
|
||||
|
||||
spi->bits_per_word = 16;
|
||||
spi_setup(spi);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int em_x270_libertas_teardown(struct spi_device *spi)
|
||||
{
|
||||
gpio_set_value(GPIO115_WLAN_PWEN, 0);
|
||||
gpio_free(GPIO115_WLAN_PWEN);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
struct libertas_spi_platform_data em_x270_libertas_pdata = {
|
||||
.use_dummy_writes = 1,
|
||||
.gpio_cs = 14,
|
||||
.setup = em_x270_libertas_setup,
|
||||
.teardown = em_x270_libertas_teardown,
|
||||
};
|
||||
|
||||
static struct spi_board_info em_x270_spi_devices[] __initdata = {
|
||||
{
|
||||
.modalias = "tdo24m",
|
||||
.max_speed_hz = 1000000,
|
||||
.bus_num = 1,
|
||||
.chip_select = 0,
|
||||
.controller_data = &em_x270_tdo24m_chip,
|
||||
.platform_data = &em_x270_tdo24m_pdata,
|
||||
.modalias = "tdo24m",
|
||||
.max_speed_hz = 1000000,
|
||||
.bus_num = 1,
|
||||
.chip_select = 0,
|
||||
.controller_data = &em_x270_tdo24m_chip,
|
||||
.platform_data = &em_x270_tdo24m_pdata,
|
||||
},
|
||||
{
|
||||
.modalias = "libertas_spi",
|
||||
.max_speed_hz = 13000000,
|
||||
.bus_num = 2,
|
||||
.irq = IRQ_GPIO(116),
|
||||
.chip_select = 0,
|
||||
.controller_data = &em_x270_libertas_chip,
|
||||
.platform_data = &em_x270_libertas_pdata,
|
||||
},
|
||||
};
|
||||
|
||||
static void __init em_x270_init_spi(void)
|
||||
{
|
||||
pxa2xx_set_spi_info(1, &em_x270_spi_info);
|
||||
pxa2xx_set_spi_info(2, &em_x270_spi_2_info);
|
||||
spi_register_board_info(ARRAY_AND_SIZE(em_x270_spi_devices));
|
||||
}
|
||||
#else
|
||||
|
|
|
|||
|
|
@ -1,5 +1,8 @@
|
|||
#ifndef _COLIBRI_H_
|
||||
#define _COLIBRI_H_
|
||||
|
||||
#include <net/ax88796.h>
|
||||
|
||||
/*
|
||||
* common settings for all modules
|
||||
*/
|
||||
|
|
@ -16,6 +19,10 @@ extern void colibri_pxa3xx_init_lcd(int bl_pin);
|
|||
static inline void colibri_pxa3xx_init_lcd(int) {}
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_AX88796)
|
||||
extern void colibri_pxa3xx_init_eth(struct ax_plat_data *plat_data);
|
||||
#endif
|
||||
|
||||
/* physical memory regions */
|
||||
#define COLIBRI_SDRAM_BASE 0xa0000000 /* SDRAM region */
|
||||
|
||||
|
|
|
|||
|
|
@ -27,7 +27,7 @@
|
|||
#define GPIO22_MAGICIAN_VIBRA_EN 22
|
||||
#define GPIO26_MAGICIAN_GSM_POWER 26
|
||||
#define GPIO27_MAGICIAN_USBC_PUEN 27
|
||||
#define GPIO30_MAGICIAN_nCHARGE_EN 30
|
||||
#define GPIO30_MAGICIAN_BQ24022_nCHARGE_EN 30
|
||||
#define GPIO37_MAGICIAN_KEY_HANGUP 37
|
||||
#define GPIO38_MAGICIAN_KEY_CONTACTS 38
|
||||
#define GPIO40_MAGICIAN_GSM_OUT2 40
|
||||
|
|
@ -98,7 +98,7 @@
|
|||
#define EGPIO_MAGICIAN_UNKNOWN_WAVEDEV_DLL MAGICIAN_EGPIO(2, 2)
|
||||
#define EGPIO_MAGICIAN_FLASH_VPP MAGICIAN_EGPIO(2, 3)
|
||||
#define EGPIO_MAGICIAN_BL_POWER2 MAGICIAN_EGPIO(2, 4)
|
||||
#define EGPIO_MAGICIAN_CHARGE_EN MAGICIAN_EGPIO(2, 5)
|
||||
#define EGPIO_MAGICIAN_BQ24022_ISET2 MAGICIAN_EGPIO(2, 5)
|
||||
#define EGPIO_MAGICIAN_GSM_POWER MAGICIAN_EGPIO(2, 7)
|
||||
|
||||
/* input */
|
||||
|
|
|
|||
|
|
@ -87,6 +87,7 @@
|
|||
#define PALMLD_IDE_SIZE 0x00100000
|
||||
|
||||
#define PALMLD_PHYS_IO_START 0x40000000
|
||||
#define PALMLD_STR_BASE 0xa0200000
|
||||
|
||||
/* BATTERY */
|
||||
#define PALMLD_BAT_MAX_VOLTAGE 4000 /* 4.00V maximum voltage */
|
||||
|
|
|
|||
|
|
@ -59,6 +59,7 @@
|
|||
/* Various addresses */
|
||||
#define PALMT5_PHYS_RAM_START 0xa0000000
|
||||
#define PALMT5_PHYS_IO_START 0x40000000
|
||||
#define PALMT5_STR_BASE 0xa0200000
|
||||
|
||||
/* TOUCHSCREEN */
|
||||
#define AC97_LINK_FRAME 21
|
||||
|
|
|
|||
68
arch/arm/mach-pxa/include/mach/palmte2.h
Normal file
68
arch/arm/mach-pxa/include/mach/palmte2.h
Normal file
|
|
@ -0,0 +1,68 @@
|
|||
/*
|
||||
* GPIOs and interrupts for Palm Tungsten|E2 Handheld Computer
|
||||
*
|
||||
* Author:
|
||||
* Carlos Eduardo Medaglia Dyonisio <cadu@nerdfeliz.com>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef _INCLUDE_PALMTE2_H_
|
||||
#define _INCLUDE_PALMTE2_H_
|
||||
|
||||
/** HERE ARE GPIOs **/
|
||||
|
||||
/* GPIOs */
|
||||
#define GPIO_NR_PALMTE2_POWER_DETECT 9
|
||||
#define GPIO_NR_PALMTE2_HOTSYNC_BUTTON_N 4
|
||||
#define GPIO_NR_PALMTE2_EARPHONE_DETECT 15
|
||||
|
||||
/* SD/MMC */
|
||||
#define GPIO_NR_PALMTE2_SD_DETECT_N 10
|
||||
#define GPIO_NR_PALMTE2_SD_POWER 55
|
||||
#define GPIO_NR_PALMTE2_SD_READONLY 51
|
||||
|
||||
/* IRDA - disable GPIO connected to SD pin of tranceiver (TFBS4710?) ? */
|
||||
#define GPIO_NR_PALMTE2_IR_DISABLE 48
|
||||
|
||||
/* USB */
|
||||
#define GPIO_NR_PALMTE2_USB_DETECT_N 35
|
||||
#define GPIO_NR_PALMTE2_USB_PULLUP 53
|
||||
|
||||
/* LCD/BACKLIGHT */
|
||||
#define GPIO_NR_PALMTE2_BL_POWER 56
|
||||
#define GPIO_NR_PALMTE2_LCD_POWER 37
|
||||
|
||||
/* KEYS */
|
||||
#define GPIO_NR_PALMTE2_KEY_NOTES 5
|
||||
#define GPIO_NR_PALMTE2_KEY_TASKS 7
|
||||
#define GPIO_NR_PALMTE2_KEY_CALENDAR 11
|
||||
#define GPIO_NR_PALMTE2_KEY_CONTACTS 13
|
||||
#define GPIO_NR_PALMTE2_KEY_CENTER 14
|
||||
#define GPIO_NR_PALMTE2_KEY_LEFT 19
|
||||
#define GPIO_NR_PALMTE2_KEY_RIGHT 20
|
||||
#define GPIO_NR_PALMTE2_KEY_DOWN 21
|
||||
#define GPIO_NR_PALMTE2_KEY_UP 22
|
||||
|
||||
/** HERE ARE INIT VALUES **/
|
||||
|
||||
/* BACKLIGHT */
|
||||
#define PALMTE2_MAX_INTENSITY 0xFE
|
||||
#define PALMTE2_DEFAULT_INTENSITY 0x7E
|
||||
#define PALMTE2_LIMIT_MASK 0x7F
|
||||
#define PALMTE2_PRESCALER 0x3F
|
||||
#define PALMTE2_PERIOD_NS 3500
|
||||
|
||||
/* BATTERY */
|
||||
#define PALMTE2_BAT_MAX_VOLTAGE 4000 /* 4.00v current voltage */
|
||||
#define PALMTE2_BAT_MIN_VOLTAGE 3550 /* 3.55v critical voltage */
|
||||
#define PALMTE2_BAT_MAX_CURRENT 0 /* unknokn */
|
||||
#define PALMTE2_BAT_MIN_CURRENT 0 /* unknown */
|
||||
#define PALMTE2_BAT_MAX_CHARGE 1 /* unknown */
|
||||
#define PALMTE2_BAT_MIN_CHARGE 1 /* unknown */
|
||||
#define PALMTE2_MAX_LIFE_MINS 360 /* on-life in minutes */
|
||||
|
||||
#endif
|
||||
|
|
@ -78,6 +78,8 @@
|
|||
#define PALMTX_PHYS_RAM_START 0xa0000000
|
||||
#define PALMTX_PHYS_IO_START 0x40000000
|
||||
|
||||
#define PALMTX_STR_BASE 0xa0200000
|
||||
|
||||
#define PALMTX_PHYS_FLASH_START PXA_CS0_PHYS /* ChipSelect 0 */
|
||||
#define PALMTX_PHYS_NAND_START PXA_CS1_PHYS /* ChipSelect 1 */
|
||||
|
||||
|
|
|
|||
|
|
@ -38,6 +38,7 @@ struct pxa2xx_spi_chip {
|
|||
u8 dma_burst_size;
|
||||
u32 timeout;
|
||||
u8 enable_loopback;
|
||||
int gpio_cs;
|
||||
void (*cs_control)(u32 command);
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -25,6 +25,8 @@
|
|||
#include <linux/mtd/physmap.h>
|
||||
#include <linux/pda_power.h>
|
||||
#include <linux/pwm_backlight.h>
|
||||
#include <linux/regulator/bq24022.h>
|
||||
#include <linux/regulator/machine.h>
|
||||
#include <linux/usb/gpio_vbus.h>
|
||||
|
||||
#include <mach/hardware.h>
|
||||
|
|
@ -552,33 +554,7 @@ static struct platform_device gpio_vbus = {
|
|||
|
||||
static int power_supply_init(struct device *dev)
|
||||
{
|
||||
int ret;
|
||||
|
||||
ret = gpio_request(EGPIO_MAGICIAN_CABLE_STATE_AC, "CABLE_STATE_AC");
|
||||
if (ret)
|
||||
goto err_cs_ac;
|
||||
ret = gpio_request(EGPIO_MAGICIAN_CABLE_STATE_USB, "CABLE_STATE_USB");
|
||||
if (ret)
|
||||
goto err_cs_usb;
|
||||
ret = gpio_request(EGPIO_MAGICIAN_CHARGE_EN, "CHARGE_EN");
|
||||
if (ret)
|
||||
goto err_chg_en;
|
||||
ret = gpio_request(GPIO30_MAGICIAN_nCHARGE_EN, "nCHARGE_EN");
|
||||
if (!ret)
|
||||
ret = gpio_direction_output(GPIO30_MAGICIAN_nCHARGE_EN, 0);
|
||||
if (ret)
|
||||
goto err_nchg_en;
|
||||
|
||||
return 0;
|
||||
|
||||
err_nchg_en:
|
||||
gpio_free(EGPIO_MAGICIAN_CHARGE_EN);
|
||||
err_chg_en:
|
||||
gpio_free(EGPIO_MAGICIAN_CABLE_STATE_USB);
|
||||
err_cs_usb:
|
||||
gpio_free(EGPIO_MAGICIAN_CABLE_STATE_AC);
|
||||
err_cs_ac:
|
||||
return ret;
|
||||
return gpio_request(EGPIO_MAGICIAN_CABLE_STATE_AC, "CABLE_STATE_AC");
|
||||
}
|
||||
|
||||
static int magician_is_ac_online(void)
|
||||
|
|
@ -586,22 +562,8 @@ static int magician_is_ac_online(void)
|
|||
return gpio_get_value(EGPIO_MAGICIAN_CABLE_STATE_AC);
|
||||
}
|
||||
|
||||
static int magician_is_usb_online(void)
|
||||
{
|
||||
return gpio_get_value(EGPIO_MAGICIAN_CABLE_STATE_USB);
|
||||
}
|
||||
|
||||
static void magician_set_charge(int flags)
|
||||
{
|
||||
gpio_set_value(GPIO30_MAGICIAN_nCHARGE_EN, !flags);
|
||||
gpio_set_value(EGPIO_MAGICIAN_CHARGE_EN, flags);
|
||||
}
|
||||
|
||||
static void power_supply_exit(struct device *dev)
|
||||
{
|
||||
gpio_free(GPIO30_MAGICIAN_nCHARGE_EN);
|
||||
gpio_free(EGPIO_MAGICIAN_CHARGE_EN);
|
||||
gpio_free(EGPIO_MAGICIAN_CABLE_STATE_USB);
|
||||
gpio_free(EGPIO_MAGICIAN_CABLE_STATE_AC);
|
||||
}
|
||||
|
||||
|
|
@ -612,8 +574,6 @@ static char *magician_supplicants[] = {
|
|||
static struct pda_power_pdata power_supply_info = {
|
||||
.init = power_supply_init,
|
||||
.is_ac_online = magician_is_ac_online,
|
||||
.is_usb_online = magician_is_usb_online,
|
||||
.set_charge = magician_set_charge,
|
||||
.exit = power_supply_exit,
|
||||
.supplied_to = magician_supplicants,
|
||||
.num_supplicants = ARRAY_SIZE(magician_supplicants),
|
||||
|
|
@ -646,6 +606,43 @@ static struct platform_device power_supply = {
|
|||
.num_resources = ARRAY_SIZE(power_supply_resources),
|
||||
};
|
||||
|
||||
/*
|
||||
* Battery charger
|
||||
*/
|
||||
|
||||
static struct regulator_consumer_supply bq24022_consumers[] = {
|
||||
{
|
||||
.dev = &gpio_vbus.dev,
|
||||
.supply = "vbus_draw",
|
||||
},
|
||||
{
|
||||
.dev = &power_supply.dev,
|
||||
.supply = "ac_draw",
|
||||
},
|
||||
};
|
||||
|
||||
static struct regulator_init_data bq24022_init_data = {
|
||||
.constraints = {
|
||||
.max_uA = 500000,
|
||||
.valid_ops_mask = REGULATOR_CHANGE_CURRENT,
|
||||
},
|
||||
.num_consumer_supplies = ARRAY_SIZE(bq24022_consumers),
|
||||
.consumer_supplies = bq24022_consumers,
|
||||
};
|
||||
|
||||
static struct bq24022_mach_info bq24022_info = {
|
||||
.gpio_nce = GPIO30_MAGICIAN_BQ24022_nCHARGE_EN,
|
||||
.gpio_iset2 = EGPIO_MAGICIAN_BQ24022_ISET2,
|
||||
.init_data = &bq24022_init_data,
|
||||
};
|
||||
|
||||
static struct platform_device bq24022 = {
|
||||
.name = "bq24022",
|
||||
.id = -1,
|
||||
.dev = {
|
||||
.platform_data = &bq24022_info,
|
||||
},
|
||||
};
|
||||
|
||||
/*
|
||||
* MMC/SD
|
||||
|
|
@ -756,6 +753,7 @@ static struct platform_device *devices[] __initdata = {
|
|||
&egpio,
|
||||
&backlight,
|
||||
&pasic3,
|
||||
&bq24022,
|
||||
&gpio_vbus,
|
||||
&power_supply,
|
||||
&strataflash,
|
||||
|
|
|
|||
|
|
@ -50,6 +50,7 @@
|
|||
#include <mach/pxa27x-udc.h>
|
||||
#include <mach/i2c.h>
|
||||
#include <mach/camera.h>
|
||||
#include <mach/audio.h>
|
||||
#include <media/soc_camera.h>
|
||||
|
||||
#include <mach/mioa701.h>
|
||||
|
|
@ -763,8 +764,6 @@ MIO_PARENT_DEV(mioa701_backlight, "pwm-backlight", &pxa27x_device_pwm0.dev,
|
|||
&mioa701_backlight_data);
|
||||
MIO_SIMPLE_DEV(mioa701_led, "leds-gpio", &gpio_led_info)
|
||||
MIO_SIMPLE_DEV(pxa2xx_pcm, "pxa2xx-pcm", NULL)
|
||||
MIO_SIMPLE_DEV(pxa2xx_ac97, "pxa2xx-ac97", NULL)
|
||||
MIO_PARENT_DEV(mio_wm9713_codec, "wm9713-codec", &pxa2xx_ac97.dev, NULL)
|
||||
MIO_SIMPLE_DEV(mioa701_sound, "mioa701-wm9713", NULL)
|
||||
MIO_SIMPLE_DEV(mioa701_board, "mioa701-board", NULL)
|
||||
MIO_SIMPLE_DEV(gpio_vbus, "gpio-vbus", &gpio_vbus_data);
|
||||
|
|
@ -774,8 +773,6 @@ static struct platform_device *devices[] __initdata = {
|
|||
&mioa701_backlight,
|
||||
&mioa701_led,
|
||||
&pxa2xx_pcm,
|
||||
&pxa2xx_ac97,
|
||||
&mio_wm9713_codec,
|
||||
&mioa701_sound,
|
||||
&power_dev,
|
||||
&strataflash,
|
||||
|
|
@ -818,6 +815,7 @@ static void __init mioa701_machine_init(void)
|
|||
pxa_set_keypad_info(&mioa701_keypad_info);
|
||||
wm97xx_bat_set_pdata(&mioa701_battery_data);
|
||||
pxa_set_udc_info(&mioa701_udc_info);
|
||||
pxa_set_ac97_info(NULL);
|
||||
pm_power_off = mioa701_poweroff;
|
||||
arm_pm_restart = mioa701_restart;
|
||||
platform_add_devices(devices, ARRAY_SIZE(devices));
|
||||
|
|
|
|||
|
|
@ -24,6 +24,7 @@
|
|||
#include <linux/gpio.h>
|
||||
#include <linux/wm97xx_batt.h>
|
||||
#include <linux/power_supply.h>
|
||||
#include <linux/sysdev.h>
|
||||
|
||||
#include <asm/mach-types.h>
|
||||
#include <asm/mach/arch.h>
|
||||
|
|
@ -68,10 +69,10 @@ static unsigned long palmld_pin_config[] __initdata = {
|
|||
GPIO47_FICP_TXD,
|
||||
|
||||
/* MATRIX KEYPAD */
|
||||
GPIO100_KP_MKIN_0,
|
||||
GPIO101_KP_MKIN_1,
|
||||
GPIO102_KP_MKIN_2,
|
||||
GPIO97_KP_MKIN_3,
|
||||
GPIO100_KP_MKIN_0 | WAKEUP_ON_LEVEL_HIGH,
|
||||
GPIO101_KP_MKIN_1 | WAKEUP_ON_LEVEL_HIGH,
|
||||
GPIO102_KP_MKIN_2 | WAKEUP_ON_LEVEL_HIGH,
|
||||
GPIO97_KP_MKIN_3 | WAKEUP_ON_LEVEL_HIGH,
|
||||
GPIO103_KP_MKOUT_0,
|
||||
GPIO104_KP_MKOUT_1,
|
||||
GPIO105_KP_MKOUT_2,
|
||||
|
|
@ -506,6 +507,33 @@ static struct pxafb_mach_info palmld_lcd_screen = {
|
|||
.lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL,
|
||||
};
|
||||
|
||||
/******************************************************************************
|
||||
* Power management - standby
|
||||
******************************************************************************/
|
||||
#ifdef CONFIG_PM
|
||||
static u32 *addr __initdata;
|
||||
static u32 resume[3] __initdata = {
|
||||
0xe3a00101, /* mov r0, #0x40000000 */
|
||||
0xe380060f, /* orr r0, r0, #0x00f00000 */
|
||||
0xe590f008, /* ldr pc, [r0, #0x08] */
|
||||
};
|
||||
|
||||
static int __init palmld_pm_init(void)
|
||||
{
|
||||
int i;
|
||||
|
||||
/* this is where the bootloader jumps */
|
||||
addr = phys_to_virt(PALMLD_STR_BASE);
|
||||
|
||||
for (i = 0; i < 3; i++)
|
||||
addr[i] = resume[i];
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
device_initcall(palmld_pm_init);
|
||||
#endif
|
||||
|
||||
/******************************************************************************
|
||||
* Machine init
|
||||
******************************************************************************/
|
||||
|
|
|
|||
|
|
@ -75,10 +75,10 @@ static unsigned long palmt5_pin_config[] __initdata = {
|
|||
GPIO95_GPIO, /* usb power */
|
||||
|
||||
/* MATRIX KEYPAD */
|
||||
GPIO100_KP_MKIN_0,
|
||||
GPIO101_KP_MKIN_1,
|
||||
GPIO102_KP_MKIN_2,
|
||||
GPIO97_KP_MKIN_3,
|
||||
GPIO100_KP_MKIN_0 | WAKEUP_ON_LEVEL_HIGH,
|
||||
GPIO101_KP_MKIN_1 | WAKEUP_ON_LEVEL_HIGH,
|
||||
GPIO102_KP_MKIN_2 | WAKEUP_ON_LEVEL_HIGH,
|
||||
GPIO97_KP_MKIN_3 | WAKEUP_ON_LEVEL_HIGH,
|
||||
GPIO103_KP_MKOUT_0,
|
||||
GPIO104_KP_MKOUT_1,
|
||||
GPIO105_KP_MKOUT_2,
|
||||
|
|
@ -449,6 +449,33 @@ static struct pxafb_mach_info palmt5_lcd_screen = {
|
|||
.lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL,
|
||||
};
|
||||
|
||||
/******************************************************************************
|
||||
* Power management - standby
|
||||
******************************************************************************/
|
||||
#ifdef CONFIG_PM
|
||||
static u32 *addr __initdata;
|
||||
static u32 resume[3] __initdata = {
|
||||
0xe3a00101, /* mov r0, #0x40000000 */
|
||||
0xe380060f, /* orr r0, r0, #0x00f00000 */
|
||||
0xe590f008, /* ldr pc, [r0, #0x08] */
|
||||
};
|
||||
|
||||
static int __init palmt5_pm_init(void)
|
||||
{
|
||||
int i;
|
||||
|
||||
/* this is where the bootloader jumps */
|
||||
addr = phys_to_virt(PALMT5_STR_BASE);
|
||||
|
||||
for (i = 0; i < 3; i++)
|
||||
addr[i] = resume[i];
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
device_initcall(palmt5_pm_init);
|
||||
#endif
|
||||
|
||||
/******************************************************************************
|
||||
* Machine init
|
||||
******************************************************************************/
|
||||
|
|
|
|||
466
arch/arm/mach-pxa/palmte2.c
Normal file
466
arch/arm/mach-pxa/palmte2.c
Normal file
|
|
@ -0,0 +1,466 @@
|
|||
/*
|
||||
* Hardware definitions for Palm Tungsten|E2
|
||||
*
|
||||
* Author:
|
||||
* Carlos Eduardo Medaglia Dyonisio <cadu@nerdfeliz.com>
|
||||
*
|
||||
* Rewrite for mainline:
|
||||
* Marek Vasut <marek.vasut@gmail.com>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* (find more info at www.hackndev.com)
|
||||
*
|
||||
*/
|
||||
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/delay.h>
|
||||
#include <linux/irq.h>
|
||||
#include <linux/gpio_keys.h>
|
||||
#include <linux/input.h>
|
||||
#include <linux/pda_power.h>
|
||||
#include <linux/pwm_backlight.h>
|
||||
#include <linux/gpio.h>
|
||||
#include <linux/wm97xx_batt.h>
|
||||
#include <linux/power_supply.h>
|
||||
|
||||
#include <asm/mach-types.h>
|
||||
#include <asm/mach/arch.h>
|
||||
#include <asm/mach/map.h>
|
||||
|
||||
#include <mach/audio.h>
|
||||
#include <mach/palmte2.h>
|
||||
#include <mach/mmc.h>
|
||||
#include <mach/pxafb.h>
|
||||
#include <mach/mfp-pxa25x.h>
|
||||
#include <mach/irda.h>
|
||||
#include <mach/udc.h>
|
||||
|
||||
#include "generic.h"
|
||||
#include "devices.h"
|
||||
|
||||
/******************************************************************************
|
||||
* Pin configuration
|
||||
******************************************************************************/
|
||||
static unsigned long palmte2_pin_config[] __initdata = {
|
||||
/* MMC */
|
||||
GPIO6_MMC_CLK,
|
||||
GPIO8_MMC_CS0,
|
||||
GPIO10_GPIO, /* SD detect */
|
||||
GPIO55_GPIO, /* SD power */
|
||||
GPIO51_GPIO, /* SD r/o switch */
|
||||
|
||||
/* AC97 */
|
||||
GPIO28_AC97_BITCLK,
|
||||
GPIO29_AC97_SDATA_IN_0,
|
||||
GPIO30_AC97_SDATA_OUT,
|
||||
GPIO31_AC97_SYNC,
|
||||
|
||||
/* PWM */
|
||||
GPIO16_PWM0_OUT,
|
||||
|
||||
/* USB */
|
||||
GPIO15_GPIO, /* usb detect */
|
||||
GPIO53_GPIO, /* usb power */
|
||||
|
||||
/* IrDA */
|
||||
GPIO48_GPIO, /* ir disable */
|
||||
GPIO46_FICP_RXD,
|
||||
GPIO47_FICP_TXD,
|
||||
|
||||
/* LCD */
|
||||
GPIO58_LCD_LDD_0,
|
||||
GPIO59_LCD_LDD_1,
|
||||
GPIO60_LCD_LDD_2,
|
||||
GPIO61_LCD_LDD_3,
|
||||
GPIO62_LCD_LDD_4,
|
||||
GPIO63_LCD_LDD_5,
|
||||
GPIO64_LCD_LDD_6,
|
||||
GPIO65_LCD_LDD_7,
|
||||
GPIO66_LCD_LDD_8,
|
||||
GPIO67_LCD_LDD_9,
|
||||
GPIO68_LCD_LDD_10,
|
||||
GPIO69_LCD_LDD_11,
|
||||
GPIO70_LCD_LDD_12,
|
||||
GPIO71_LCD_LDD_13,
|
||||
GPIO72_LCD_LDD_14,
|
||||
GPIO73_LCD_LDD_15,
|
||||
GPIO74_LCD_FCLK,
|
||||
GPIO75_LCD_LCLK,
|
||||
GPIO76_LCD_PCLK,
|
||||
GPIO77_LCD_BIAS,
|
||||
|
||||
/* GPIO KEYS */
|
||||
GPIO5_GPIO, /* notes */
|
||||
GPIO7_GPIO, /* tasks */
|
||||
GPIO11_GPIO, /* calendar */
|
||||
GPIO13_GPIO, /* contacts */
|
||||
GPIO14_GPIO, /* center */
|
||||
GPIO19_GPIO, /* left */
|
||||
GPIO20_GPIO, /* right */
|
||||
GPIO21_GPIO, /* down */
|
||||
GPIO22_GPIO, /* up */
|
||||
|
||||
/* MISC */
|
||||
GPIO1_RST, /* reset */
|
||||
GPIO4_GPIO, /* Hotsync button */
|
||||
GPIO9_GPIO, /* power detect */
|
||||
GPIO37_GPIO, /* LCD power */
|
||||
GPIO56_GPIO, /* Backlight power */
|
||||
};
|
||||
|
||||
/******************************************************************************
|
||||
* SD/MMC card controller
|
||||
******************************************************************************/
|
||||
static int palmte2_mci_init(struct device *dev,
|
||||
irq_handler_t palmte2_detect_int, void *data)
|
||||
{
|
||||
int err = 0;
|
||||
|
||||
/* Setup an interrupt for detecting card insert/remove events */
|
||||
err = gpio_request(GPIO_NR_PALMTE2_SD_DETECT_N, "SD IRQ");
|
||||
if (err)
|
||||
goto err;
|
||||
err = gpio_direction_input(GPIO_NR_PALMTE2_SD_DETECT_N);
|
||||
if (err)
|
||||
goto err2;
|
||||
err = request_irq(gpio_to_irq(GPIO_NR_PALMTE2_SD_DETECT_N),
|
||||
palmte2_detect_int, IRQF_DISABLED | IRQF_SAMPLE_RANDOM |
|
||||
IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING,
|
||||
"SD/MMC card detect", data);
|
||||
if (err) {
|
||||
printk(KERN_ERR "%s: cannot request SD/MMC card detect IRQ\n",
|
||||
__func__);
|
||||
goto err2;
|
||||
}
|
||||
|
||||
err = gpio_request(GPIO_NR_PALMTE2_SD_POWER, "SD_POWER");
|
||||
if (err)
|
||||
goto err3;
|
||||
err = gpio_direction_output(GPIO_NR_PALMTE2_SD_POWER, 0);
|
||||
if (err)
|
||||
goto err4;
|
||||
|
||||
err = gpio_request(GPIO_NR_PALMTE2_SD_READONLY, "SD_READONLY");
|
||||
if (err)
|
||||
goto err4;
|
||||
err = gpio_direction_input(GPIO_NR_PALMTE2_SD_READONLY);
|
||||
if (err)
|
||||
goto err5;
|
||||
|
||||
printk(KERN_DEBUG "%s: irq registered\n", __func__);
|
||||
|
||||
return 0;
|
||||
|
||||
err5:
|
||||
gpio_free(GPIO_NR_PALMTE2_SD_READONLY);
|
||||
err4:
|
||||
gpio_free(GPIO_NR_PALMTE2_SD_POWER);
|
||||
err3:
|
||||
free_irq(gpio_to_irq(GPIO_NR_PALMTE2_SD_DETECT_N), data);
|
||||
err2:
|
||||
gpio_free(GPIO_NR_PALMTE2_SD_DETECT_N);
|
||||
err:
|
||||
return err;
|
||||
}
|
||||
|
||||
static void palmte2_mci_exit(struct device *dev, void *data)
|
||||
{
|
||||
gpio_free(GPIO_NR_PALMTE2_SD_READONLY);
|
||||
gpio_free(GPIO_NR_PALMTE2_SD_POWER);
|
||||
free_irq(gpio_to_irq(GPIO_NR_PALMTE2_SD_DETECT_N), data);
|
||||
gpio_free(GPIO_NR_PALMTE2_SD_DETECT_N);
|
||||
}
|
||||
|
||||
static void palmte2_mci_power(struct device *dev, unsigned int vdd)
|
||||
{
|
||||
struct pxamci_platform_data *p_d = dev->platform_data;
|
||||
gpio_set_value(GPIO_NR_PALMTE2_SD_POWER, p_d->ocr_mask & (1 << vdd));
|
||||
}
|
||||
|
||||
static int palmte2_mci_get_ro(struct device *dev)
|
||||
{
|
||||
return gpio_get_value(GPIO_NR_PALMTE2_SD_READONLY);
|
||||
}
|
||||
|
||||
static struct pxamci_platform_data palmte2_mci_platform_data = {
|
||||
.ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
|
||||
.setpower = palmte2_mci_power,
|
||||
.get_ro = palmte2_mci_get_ro,
|
||||
.init = palmte2_mci_init,
|
||||
.exit = palmte2_mci_exit,
|
||||
};
|
||||
|
||||
/******************************************************************************
|
||||
* GPIO keys
|
||||
******************************************************************************/
|
||||
static struct gpio_keys_button palmte2_pxa_buttons[] = {
|
||||
{KEY_F1, GPIO_NR_PALMTE2_KEY_CONTACTS, 1, "Contacts" },
|
||||
{KEY_F2, GPIO_NR_PALMTE2_KEY_CALENDAR, 1, "Calendar" },
|
||||
{KEY_F3, GPIO_NR_PALMTE2_KEY_TASKS, 1, "Tasks" },
|
||||
{KEY_F4, GPIO_NR_PALMTE2_KEY_NOTES, 1, "Notes" },
|
||||
{KEY_ENTER, GPIO_NR_PALMTE2_KEY_CENTER, 1, "Center" },
|
||||
{KEY_LEFT, GPIO_NR_PALMTE2_KEY_LEFT, 1, "Left" },
|
||||
{KEY_RIGHT, GPIO_NR_PALMTE2_KEY_RIGHT, 1, "Right" },
|
||||
{KEY_DOWN, GPIO_NR_PALMTE2_KEY_DOWN, 1, "Down" },
|
||||
{KEY_UP, GPIO_NR_PALMTE2_KEY_UP, 1, "Up" },
|
||||
};
|
||||
|
||||
static struct gpio_keys_platform_data palmte2_pxa_keys_data = {
|
||||
.buttons = palmte2_pxa_buttons,
|
||||
.nbuttons = ARRAY_SIZE(palmte2_pxa_buttons),
|
||||
};
|
||||
|
||||
static struct platform_device palmte2_pxa_keys = {
|
||||
.name = "gpio-keys",
|
||||
.id = -1,
|
||||
.dev = {
|
||||
.platform_data = &palmte2_pxa_keys_data,
|
||||
},
|
||||
};
|
||||
|
||||
/******************************************************************************
|
||||
* Backlight
|
||||
******************************************************************************/
|
||||
static int palmte2_backlight_init(struct device *dev)
|
||||
{
|
||||
int ret;
|
||||
|
||||
ret = gpio_request(GPIO_NR_PALMTE2_BL_POWER, "BL POWER");
|
||||
if (ret)
|
||||
goto err;
|
||||
ret = gpio_direction_output(GPIO_NR_PALMTE2_BL_POWER, 0);
|
||||
if (ret)
|
||||
goto err2;
|
||||
ret = gpio_request(GPIO_NR_PALMTE2_LCD_POWER, "LCD POWER");
|
||||
if (ret)
|
||||
goto err2;
|
||||
ret = gpio_direction_output(GPIO_NR_PALMTE2_LCD_POWER, 0);
|
||||
if (ret)
|
||||
goto err3;
|
||||
|
||||
return 0;
|
||||
err3:
|
||||
gpio_free(GPIO_NR_PALMTE2_LCD_POWER);
|
||||
err2:
|
||||
gpio_free(GPIO_NR_PALMTE2_BL_POWER);
|
||||
err:
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int palmte2_backlight_notify(int brightness)
|
||||
{
|
||||
gpio_set_value(GPIO_NR_PALMTE2_BL_POWER, brightness);
|
||||
gpio_set_value(GPIO_NR_PALMTE2_LCD_POWER, brightness);
|
||||
return brightness;
|
||||
}
|
||||
|
||||
static void palmte2_backlight_exit(struct device *dev)
|
||||
{
|
||||
gpio_free(GPIO_NR_PALMTE2_BL_POWER);
|
||||
gpio_free(GPIO_NR_PALMTE2_LCD_POWER);
|
||||
}
|
||||
|
||||
static struct platform_pwm_backlight_data palmte2_backlight_data = {
|
||||
.pwm_id = 0,
|
||||
.max_brightness = PALMTE2_MAX_INTENSITY,
|
||||
.dft_brightness = PALMTE2_MAX_INTENSITY,
|
||||
.pwm_period_ns = PALMTE2_PERIOD_NS,
|
||||
.init = palmte2_backlight_init,
|
||||
.notify = palmte2_backlight_notify,
|
||||
.exit = palmte2_backlight_exit,
|
||||
};
|
||||
|
||||
static struct platform_device palmte2_backlight = {
|
||||
.name = "pwm-backlight",
|
||||
.dev = {
|
||||
.parent = &pxa25x_device_pwm0.dev,
|
||||
.platform_data = &palmte2_backlight_data,
|
||||
},
|
||||
};
|
||||
|
||||
/******************************************************************************
|
||||
* IrDA
|
||||
******************************************************************************/
|
||||
static int palmte2_irda_startup(struct device *dev)
|
||||
{
|
||||
int err;
|
||||
err = gpio_request(GPIO_NR_PALMTE2_IR_DISABLE, "IR DISABLE");
|
||||
if (err)
|
||||
goto err;
|
||||
err = gpio_direction_output(GPIO_NR_PALMTE2_IR_DISABLE, 1);
|
||||
if (err)
|
||||
gpio_free(GPIO_NR_PALMTE2_IR_DISABLE);
|
||||
err:
|
||||
return err;
|
||||
}
|
||||
|
||||
static void palmte2_irda_shutdown(struct device *dev)
|
||||
{
|
||||
gpio_free(GPIO_NR_PALMTE2_IR_DISABLE);
|
||||
}
|
||||
|
||||
static void palmte2_irda_transceiver_mode(struct device *dev, int mode)
|
||||
{
|
||||
gpio_set_value(GPIO_NR_PALMTE2_IR_DISABLE, mode & IR_OFF);
|
||||
pxa2xx_transceiver_mode(dev, mode);
|
||||
}
|
||||
|
||||
static struct pxaficp_platform_data palmte2_ficp_platform_data = {
|
||||
.startup = palmte2_irda_startup,
|
||||
.shutdown = palmte2_irda_shutdown,
|
||||
.transceiver_cap = IR_SIRMODE | IR_FIRMODE | IR_OFF,
|
||||
.transceiver_mode = palmte2_irda_transceiver_mode,
|
||||
};
|
||||
|
||||
/******************************************************************************
|
||||
* UDC
|
||||
******************************************************************************/
|
||||
static struct pxa2xx_udc_mach_info palmte2_udc_info __initdata = {
|
||||
.gpio_vbus = GPIO_NR_PALMTE2_USB_DETECT_N,
|
||||
.gpio_vbus_inverted = 1,
|
||||
.gpio_pullup = GPIO_NR_PALMTE2_USB_PULLUP,
|
||||
.gpio_pullup_inverted = 0,
|
||||
};
|
||||
|
||||
/******************************************************************************
|
||||
* Power supply
|
||||
******************************************************************************/
|
||||
static int power_supply_init(struct device *dev)
|
||||
{
|
||||
int ret;
|
||||
|
||||
ret = gpio_request(GPIO_NR_PALMTE2_POWER_DETECT, "CABLE_STATE_AC");
|
||||
if (ret)
|
||||
goto err1;
|
||||
ret = gpio_direction_input(GPIO_NR_PALMTE2_POWER_DETECT);
|
||||
if (ret)
|
||||
goto err2;
|
||||
|
||||
return 0;
|
||||
|
||||
err2:
|
||||
gpio_free(GPIO_NR_PALMTE2_POWER_DETECT);
|
||||
err1:
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int palmte2_is_ac_online(void)
|
||||
{
|
||||
return gpio_get_value(GPIO_NR_PALMTE2_POWER_DETECT);
|
||||
}
|
||||
|
||||
static void power_supply_exit(struct device *dev)
|
||||
{
|
||||
gpio_free(GPIO_NR_PALMTE2_POWER_DETECT);
|
||||
}
|
||||
|
||||
static char *palmte2_supplicants[] = {
|
||||
"main-battery",
|
||||
};
|
||||
|
||||
static struct pda_power_pdata power_supply_info = {
|
||||
.init = power_supply_init,
|
||||
.is_ac_online = palmte2_is_ac_online,
|
||||
.exit = power_supply_exit,
|
||||
.supplied_to = palmte2_supplicants,
|
||||
.num_supplicants = ARRAY_SIZE(palmte2_supplicants),
|
||||
};
|
||||
|
||||
static struct platform_device power_supply = {
|
||||
.name = "pda-power",
|
||||
.id = -1,
|
||||
.dev = {
|
||||
.platform_data = &power_supply_info,
|
||||
},
|
||||
};
|
||||
|
||||
/******************************************************************************
|
||||
* WM97xx battery
|
||||
******************************************************************************/
|
||||
static struct wm97xx_batt_info wm97xx_batt_pdata = {
|
||||
.batt_aux = WM97XX_AUX_ID3,
|
||||
.temp_aux = WM97XX_AUX_ID2,
|
||||
.charge_gpio = -1,
|
||||
.max_voltage = PALMTE2_BAT_MAX_VOLTAGE,
|
||||
.min_voltage = PALMTE2_BAT_MIN_VOLTAGE,
|
||||
.batt_mult = 1000,
|
||||
.batt_div = 414,
|
||||
.temp_mult = 1,
|
||||
.temp_div = 1,
|
||||
.batt_tech = POWER_SUPPLY_TECHNOLOGY_LIPO,
|
||||
.batt_name = "main-batt",
|
||||
};
|
||||
|
||||
/******************************************************************************
|
||||
* Framebuffer
|
||||
******************************************************************************/
|
||||
static struct pxafb_mode_info palmte2_lcd_modes[] = {
|
||||
{
|
||||
.pixclock = 77757,
|
||||
.xres = 320,
|
||||
.yres = 320,
|
||||
.bpp = 16,
|
||||
|
||||
.left_margin = 28,
|
||||
.right_margin = 7,
|
||||
.upper_margin = 7,
|
||||
.lower_margin = 5,
|
||||
|
||||
.hsync_len = 4,
|
||||
.vsync_len = 1,
|
||||
},
|
||||
};
|
||||
|
||||
static struct pxafb_mach_info palmte2_lcd_screen = {
|
||||
.modes = palmte2_lcd_modes,
|
||||
.num_modes = ARRAY_SIZE(palmte2_lcd_modes),
|
||||
.lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL,
|
||||
};
|
||||
|
||||
/******************************************************************************
|
||||
* Machine init
|
||||
******************************************************************************/
|
||||
static struct platform_device *devices[] __initdata = {
|
||||
#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
|
||||
&palmte2_pxa_keys,
|
||||
#endif
|
||||
&palmte2_backlight,
|
||||
&power_supply,
|
||||
};
|
||||
|
||||
/* setup udc GPIOs initial state */
|
||||
static void __init palmte2_udc_init(void)
|
||||
{
|
||||
if (!gpio_request(GPIO_NR_PALMTE2_USB_PULLUP, "UDC Vbus")) {
|
||||
gpio_direction_output(GPIO_NR_PALMTE2_USB_PULLUP, 1);
|
||||
gpio_free(GPIO_NR_PALMTE2_USB_PULLUP);
|
||||
}
|
||||
}
|
||||
|
||||
static void __init palmte2_init(void)
|
||||
{
|
||||
pxa2xx_mfp_config(ARRAY_AND_SIZE(palmte2_pin_config));
|
||||
|
||||
set_pxa_fb_info(&palmte2_lcd_screen);
|
||||
pxa_set_mci_info(&palmte2_mci_platform_data);
|
||||
palmte2_udc_init();
|
||||
pxa_set_udc_info(&palmte2_udc_info);
|
||||
pxa_set_ac97_info(NULL);
|
||||
pxa_set_ficp_info(&palmte2_ficp_platform_data);
|
||||
wm97xx_bat_set_pdata(&wm97xx_batt_pdata);
|
||||
|
||||
platform_add_devices(devices, ARRAY_SIZE(devices));
|
||||
}
|
||||
|
||||
MACHINE_START(PALMTE2, "Palm Tungsten|E2")
|
||||
.phys_io = 0x40000000,
|
||||
.io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
|
||||
.boot_params = 0xa0000100,
|
||||
.map_io = pxa_map_io,
|
||||
.init_irq = pxa25x_init_irq,
|
||||
.timer = &pxa_timer,
|
||||
.init_machine = palmte2_init
|
||||
MACHINE_END
|
||||
|
|
@ -93,10 +93,10 @@ static unsigned long palmtx_pin_config[] __initdata = {
|
|||
GPIO116_GPIO, /* wifi ready */
|
||||
|
||||
/* MATRIX KEYPAD */
|
||||
GPIO100_KP_MKIN_0,
|
||||
GPIO101_KP_MKIN_1,
|
||||
GPIO102_KP_MKIN_2,
|
||||
GPIO97_KP_MKIN_3,
|
||||
GPIO100_KP_MKIN_0 | WAKEUP_ON_LEVEL_HIGH,
|
||||
GPIO101_KP_MKIN_1 | WAKEUP_ON_LEVEL_HIGH,
|
||||
GPIO102_KP_MKIN_2 | WAKEUP_ON_LEVEL_HIGH,
|
||||
GPIO97_KP_MKIN_3 | WAKEUP_ON_LEVEL_HIGH,
|
||||
GPIO103_KP_MKOUT_0,
|
||||
GPIO104_KP_MKOUT_1,
|
||||
GPIO105_KP_MKOUT_2,
|
||||
|
|
@ -458,6 +458,33 @@ static struct pxafb_mach_info palmtx_lcd_screen = {
|
|||
.lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL,
|
||||
};
|
||||
|
||||
/******************************************************************************
|
||||
* Power management - standby
|
||||
******************************************************************************/
|
||||
#ifdef CONFIG_PM
|
||||
static u32 *addr __initdata;
|
||||
static u32 resume[3] __initdata = {
|
||||
0xe3a00101, /* mov r0, #0x40000000 */
|
||||
0xe380060f, /* orr r0, r0, #0x00f00000 */
|
||||
0xe590f008, /* ldr pc, [r0, #0x08] */
|
||||
};
|
||||
|
||||
static int __init palmtx_pm_init(void)
|
||||
{
|
||||
int i;
|
||||
|
||||
/* this is where the bootloader jumps */
|
||||
addr = phys_to_virt(PALMTX_STR_BASE);
|
||||
|
||||
for (i = 0; i < 3; i++)
|
||||
addr[i] = resume[i];
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
device_initcall(palmtx_pm_init);
|
||||
#endif
|
||||
|
||||
/******************************************************************************
|
||||
* Machine init
|
||||
******************************************************************************/
|
||||
|
|
|
|||
|
|
@ -45,6 +45,7 @@
|
|||
#include <mach/udc.h>
|
||||
#include <mach/tosa_bt.h>
|
||||
#include <mach/pxa2xx_spi.h>
|
||||
#include <mach/audio.h>
|
||||
|
||||
#include <asm/mach/arch.h>
|
||||
#include <mach/tosa.h>
|
||||
|
|
@ -914,6 +915,7 @@ static void __init tosa_init(void)
|
|||
pxa_set_udc_info(&udc_info);
|
||||
pxa_set_ficp_info(&tosa_ficp_platform_data);
|
||||
pxa_set_i2c_info(NULL);
|
||||
pxa_set_ac97_info(NULL);
|
||||
platform_scoop_config = &tosa_pcmcia_config;
|
||||
|
||||
pxa2xx_set_spi_info(2, &pxa_ssp_master_info);
|
||||
|
|
|
|||
|
|
@ -409,8 +409,7 @@ static struct platform_device bast_sio = {
|
|||
static struct s3c2410_platform_i2c __initdata bast_i2c_info = {
|
||||
.flags = 0,
|
||||
.slave_addr = 0x10,
|
||||
.bus_freq = 100*1000,
|
||||
.max_freq = 130*1000,
|
||||
.frequency = 100*1000,
|
||||
};
|
||||
|
||||
/* Asix AX88796 10/100 ethernet controller */
|
||||
|
|
|
|||
|
|
@ -340,8 +340,7 @@ static struct platform_device *n35_devices[] __initdata = {
|
|||
static struct s3c2410_platform_i2c n30_i2ccfg = {
|
||||
.flags = 0,
|
||||
.slave_addr = 0x10,
|
||||
.bus_freq = 10*1000,
|
||||
.max_freq = 10*1000,
|
||||
.frequency = 10*1000,
|
||||
};
|
||||
|
||||
/* Lots of hardcoded stuff, but it sets up the hardware in a useful
|
||||
|
|
|
|||
|
|
@ -453,8 +453,7 @@ static struct spi_board_info __initdata jive_spi_devs[] = {
|
|||
/* I2C bus and device configuration. */
|
||||
|
||||
static struct s3c2410_platform_i2c jive_i2c_cfg __initdata = {
|
||||
.max_freq = 80 * 1000,
|
||||
.bus_freq = 50 * 1000,
|
||||
.frequency = 80 * 1000,
|
||||
.flags = S3C_IICFLG_FILTER,
|
||||
.sda_delay = 2,
|
||||
};
|
||||
|
|
|
|||
|
|
@ -828,6 +828,17 @@ void __init reserve_node_zero(pg_data_t *pgdat)
|
|||
BOOTMEM_DEFAULT);
|
||||
}
|
||||
|
||||
if (machine_is_palmld() || machine_is_palmtx()) {
|
||||
reserve_bootmem_node(pgdat, 0xa0000000, 0x1000,
|
||||
BOOTMEM_EXCLUSIVE);
|
||||
reserve_bootmem_node(pgdat, 0xa0200000, 0x1000,
|
||||
BOOTMEM_EXCLUSIVE);
|
||||
}
|
||||
|
||||
if (machine_is_palmt5())
|
||||
reserve_bootmem_node(pgdat, 0xa0200000, 0x1000,
|
||||
BOOTMEM_EXCLUSIVE);
|
||||
|
||||
#ifdef CONFIG_SA1111
|
||||
/*
|
||||
* Because of the SA1111 DMA bug, we want to preserve our
|
||||
|
|
|
|||
|
|
@ -119,7 +119,7 @@ static struct resource iop3xx_aau_resources[] = {
|
|||
}
|
||||
};
|
||||
|
||||
static u64 iop3xx_adma_dmamask = DMA_32BIT_MASK;
|
||||
static u64 iop3xx_adma_dmamask = DMA_BIT_MASK(32);
|
||||
|
||||
static struct iop_adma_platform_data iop3xx_dma_0_data = {
|
||||
.hw_id = DMA0_ID,
|
||||
|
|
@ -143,7 +143,7 @@ struct platform_device iop3xx_dma_0_channel = {
|
|||
.resource = iop3xx_dma_0_resources,
|
||||
.dev = {
|
||||
.dma_mask = &iop3xx_adma_dmamask,
|
||||
.coherent_dma_mask = DMA_64BIT_MASK,
|
||||
.coherent_dma_mask = DMA_BIT_MASK(64),
|
||||
.platform_data = (void *) &iop3xx_dma_0_data,
|
||||
},
|
||||
};
|
||||
|
|
@ -155,7 +155,7 @@ struct platform_device iop3xx_dma_1_channel = {
|
|||
.resource = iop3xx_dma_1_resources,
|
||||
.dev = {
|
||||
.dma_mask = &iop3xx_adma_dmamask,
|
||||
.coherent_dma_mask = DMA_64BIT_MASK,
|
||||
.coherent_dma_mask = DMA_BIT_MASK(64),
|
||||
.platform_data = (void *) &iop3xx_dma_1_data,
|
||||
},
|
||||
};
|
||||
|
|
@ -167,7 +167,7 @@ struct platform_device iop3xx_aau_channel = {
|
|||
.resource = iop3xx_aau_resources,
|
||||
.dev = {
|
||||
.dma_mask = &iop3xx_adma_dmamask,
|
||||
.coherent_dma_mask = DMA_64BIT_MASK,
|
||||
.coherent_dma_mask = DMA_BIT_MASK(64),
|
||||
.platform_data = (void *) &iop3xx_aau_data,
|
||||
},
|
||||
};
|
||||
|
|
|
|||
25
arch/arm/plat-mxc/include/mach/i2c.h
Normal file
25
arch/arm/plat-mxc/include/mach/i2c.h
Normal file
|
|
@ -0,0 +1,25 @@
|
|||
/*
|
||||
* i2c.h - i.MX I2C driver header file
|
||||
*
|
||||
* Copyright (c) 2008, Darius Augulis <augulis.darius@gmail.com>
|
||||
*
|
||||
* This file is released under the GPLv2
|
||||
*/
|
||||
|
||||
#ifndef __ASM_ARCH_I2C_H_
|
||||
#define __ASM_ARCH_I2C_H_
|
||||
|
||||
/**
|
||||
* struct imxi2c_platform_data - structure of platform data for MXC I2C driver
|
||||
* @init: Initialise gpio's and other board specific things
|
||||
* @exit: Free everything initialised by @init
|
||||
* @bitrate: Bus speed measured in Hz
|
||||
*
|
||||
**/
|
||||
struct imxi2c_platform_data {
|
||||
int (*init)(struct device *dev);
|
||||
void (*exit)(struct device *dev);
|
||||
int bitrate;
|
||||
};
|
||||
|
||||
#endif /* __ASM_ARCH_I2C_H_ */
|
||||
|
|
@ -24,4 +24,12 @@
|
|||
#define PHYS_OFFSET UL(0x80000000)
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_MX1_VIDEO)
|
||||
/*
|
||||
* Increase size of DMA-consistent memory region.
|
||||
* This is required for i.MX camera driver to capture at least four VGA frames.
|
||||
*/
|
||||
#define CONSISTENT_DMA_SIZE SZ_4M
|
||||
#endif /* CONFIG_MX1_VIDEO */
|
||||
|
||||
#endif /* __ASM_ARCH_MXC_MEMORY_H__ */
|
||||
|
|
|
|||
35
arch/arm/plat-mxc/include/mach/mx1_camera.h
Normal file
35
arch/arm/plat-mxc/include/mach/mx1_camera.h
Normal file
|
|
@ -0,0 +1,35 @@
|
|||
/*
|
||||
* mx1_camera.h - i.MX1/i.MXL camera driver header file
|
||||
*
|
||||
* Copyright (c) 2008, Paulius Zaleckas <paulius.zaleckas@teltonika.lt>
|
||||
* Copyright (C) 2009, Darius Augulis <augulis.darius@gmail.com>
|
||||
*
|
||||
* Based on PXA camera.h file:
|
||||
* Copyright (C) 2003, Intel Corporation
|
||||
* Copyright (C) 2008, Guennadi Liakhovetski <kernel@pengutronix.de>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#ifndef __ASM_ARCH_CAMERA_H_
|
||||
#define __ASM_ARCH_CAMERA_H_
|
||||
|
||||
#define MX1_CAMERA_DATA_HIGH 1
|
||||
#define MX1_CAMERA_PCLK_RISING 2
|
||||
#define MX1_CAMERA_VSYNC_HIGH 4
|
||||
|
||||
extern unsigned char mx1_camera_sof_fiq_start, mx1_camera_sof_fiq_end;
|
||||
|
||||
/**
|
||||
* struct mx1_camera_pdata - i.MX1/i.MXL camera platform data
|
||||
* @mclk_10khz: master clock frequency in 10kHz units
|
||||
* @flags: MX1 camera platform flags
|
||||
*/
|
||||
struct mx1_camera_pdata {
|
||||
unsigned long mclk_10khz;
|
||||
unsigned long flags;
|
||||
};
|
||||
|
||||
#endif /* __ASM_ARCH_CAMERA_H_ */
|
||||
|
|
@ -1,6 +1,6 @@
|
|||
/* linux/arch/arm/plat-s3c/dev-i2c0.c
|
||||
*
|
||||
* Copyright 2008 Simtec Electronics
|
||||
* Copyright 2008,2009 Simtec Electronics
|
||||
* Ben Dooks <ben@simtec.co.uk>
|
||||
* http://armlinux.simtec.co.uk/
|
||||
*
|
||||
|
|
@ -50,9 +50,8 @@ struct platform_device s3c_device_i2c0 = {
|
|||
static struct s3c2410_platform_i2c default_i2c_data0 __initdata = {
|
||||
.flags = 0,
|
||||
.slave_addr = 0x10,
|
||||
.bus_freq = 100*1000,
|
||||
.max_freq = 400*1000,
|
||||
.sda_delay = S3C2410_IICLC_SDA_DELAY5 | S3C2410_IICLC_FILTER_ON,
|
||||
.frequency = 100*1000,
|
||||
.sda_delay = 100,
|
||||
};
|
||||
|
||||
void __init s3c_i2c0_set_platdata(struct s3c2410_platform_i2c *pd)
|
||||
|
|
|
|||
|
|
@ -1,6 +1,6 @@
|
|||
/* linux/arch/arm/plat-s3c/dev-i2c1.c
|
||||
*
|
||||
* Copyright 2008 Simtec Electronics
|
||||
* Copyright 2008,2009 Simtec Electronics
|
||||
* Ben Dooks <ben@simtec.co.uk>
|
||||
* http://armlinux.simtec.co.uk/
|
||||
*
|
||||
|
|
@ -47,9 +47,8 @@ static struct s3c2410_platform_i2c default_i2c_data1 __initdata = {
|
|||
.flags = 0,
|
||||
.bus_num = 1,
|
||||
.slave_addr = 0x10,
|
||||
.bus_freq = 100*1000,
|
||||
.max_freq = 400*1000,
|
||||
.sda_delay = S3C2410_IICLC_SDA_DELAY5 | S3C2410_IICLC_FILTER_ON,
|
||||
.frequency = 100*1000,
|
||||
.sda_delay = 100,
|
||||
};
|
||||
|
||||
void __init s3c_i2c1_set_platdata(struct s3c2410_platform_i2c *pd)
|
||||
|
|
|
|||
|
|
@ -1,9 +1,9 @@
|
|||
/* arch/arm/mach-s3c2410/include/mach/iic.h
|
||||
/* arch/arm/plat-s3c/include/plat/iic.h
|
||||
*
|
||||
* Copyright (c) 2004 Simtec Electronics
|
||||
* Copyright 2004,2009 Simtec Electronics
|
||||
* Ben Dooks <ben@simtec.co.uk>
|
||||
*
|
||||
* S3C2410 - I2C Controller platfrom_device info
|
||||
* S3C - I2C Controller platform_device info
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
|
|
@ -15,19 +15,24 @@
|
|||
|
||||
#define S3C_IICFLG_FILTER (1<<0) /* enable s3c2440 filter */
|
||||
|
||||
/* Notes:
|
||||
* 1) All frequencies are expressed in Hz
|
||||
* 2) A value of zero is `do not care`
|
||||
*/
|
||||
|
||||
/**
|
||||
* struct s3c2410_platform_i2c - Platform data for s3c I2C.
|
||||
* @bus_num: The bus number to use (if possible).
|
||||
* @flags: Any flags for the I2C bus (E.g. S3C_IICFLK_FILTER).
|
||||
* @slave_addr: The I2C address for the slave device (if enabled).
|
||||
* @frequency: The desired frequency in Hz of the bus. This is
|
||||
* guaranteed to not be exceeded. If the caller does
|
||||
* not care, use zero and the driver will select a
|
||||
* useful default.
|
||||
* @sda_delay: The delay (in ns) applied to SDA edges.
|
||||
* @cfg_gpio: A callback to configure the pins for I2C operation.
|
||||
*/
|
||||
struct s3c2410_platform_i2c {
|
||||
int bus_num; /* bus number to use */
|
||||
int bus_num;
|
||||
unsigned int flags;
|
||||
unsigned int slave_addr; /* slave address for controller */
|
||||
unsigned long bus_freq; /* standard bus frequency */
|
||||
unsigned long max_freq; /* max frequency for the bus */
|
||||
unsigned long min_freq; /* min frequency for the bus */
|
||||
unsigned int sda_delay; /* pclks (s3c2440 only) */
|
||||
unsigned int slave_addr;
|
||||
unsigned long frequency;
|
||||
unsigned int sda_delay;
|
||||
|
||||
void (*cfg_gpio)(struct platform_device *dev);
|
||||
};
|
||||
|
|
|
|||
|
|
@ -280,13 +280,13 @@ static struct resource hh_fpga0_resource[] = {
|
|||
},
|
||||
};
|
||||
|
||||
static u64 hh_fpga0_dma_mask = DMA_32BIT_MASK;
|
||||
static u64 hh_fpga0_dma_mask = DMA_BIT_MASK(32);
|
||||
static struct platform_device hh_fpga0_device = {
|
||||
.name = "hh_fpga",
|
||||
.id = 0,
|
||||
.dev = {
|
||||
.dma_mask = &hh_fpga0_dma_mask,
|
||||
.coherent_dma_mask = DMA_32BIT_MASK,
|
||||
.coherent_dma_mask = DMA_BIT_MASK(32),
|
||||
},
|
||||
.resource = hh_fpga0_resource,
|
||||
.num_resources = ARRAY_SIZE(hh_fpga0_resource),
|
||||
|
|
|
|||
|
|
@ -60,26 +60,26 @@
|
|||
* don't ... tc, smc, pio, rtc, watchdog, pwm, ps2, and more.
|
||||
*/
|
||||
#define DEFINE_DEV(_name, _id) \
|
||||
static u64 _name##_id##_dma_mask = DMA_32BIT_MASK; \
|
||||
static u64 _name##_id##_dma_mask = DMA_BIT_MASK(32); \
|
||||
static struct platform_device _name##_id##_device = { \
|
||||
.name = #_name, \
|
||||
.id = _id, \
|
||||
.dev = { \
|
||||
.dma_mask = &_name##_id##_dma_mask, \
|
||||
.coherent_dma_mask = DMA_32BIT_MASK, \
|
||||
.coherent_dma_mask = DMA_BIT_MASK(32), \
|
||||
}, \
|
||||
.resource = _name##_id##_resource, \
|
||||
.num_resources = ARRAY_SIZE(_name##_id##_resource), \
|
||||
}
|
||||
#define DEFINE_DEV_DATA(_name, _id) \
|
||||
static u64 _name##_id##_dma_mask = DMA_32BIT_MASK; \
|
||||
static u64 _name##_id##_dma_mask = DMA_BIT_MASK(32); \
|
||||
static struct platform_device _name##_id##_device = { \
|
||||
.name = #_name, \
|
||||
.id = _id, \
|
||||
.dev = { \
|
||||
.dma_mask = &_name##_id##_dma_mask, \
|
||||
.platform_data = &_name##_id##_data, \
|
||||
.coherent_dma_mask = DMA_32BIT_MASK, \
|
||||
.coherent_dma_mask = DMA_BIT_MASK(32), \
|
||||
}, \
|
||||
.resource = _name##_id##_resource, \
|
||||
.num_resources = ARRAY_SIZE(_name##_id##_resource), \
|
||||
|
|
|
|||
|
|
@ -11,6 +11,8 @@
|
|||
#ifndef _SPI_CHANNEL_H_
|
||||
#define _SPI_CHANNEL_H_
|
||||
|
||||
#define MIN_SPI_BAUD_VAL 2
|
||||
|
||||
#define SPI_READ 0
|
||||
#define SPI_WRITE 1
|
||||
|
||||
|
|
@ -122,6 +124,9 @@ struct bfin5xx_spi_chip {
|
|||
u8 bits_per_word;
|
||||
u8 cs_change_per_word;
|
||||
u16 cs_chg_udelay; /* Some devices require 16-bit delays */
|
||||
u32 cs_gpio;
|
||||
/* Value to send if no TX value is supplied, usually 0x0 or 0xFFFF */
|
||||
u16 idle_tx_val;
|
||||
};
|
||||
|
||||
#endif /* _SPI_CHANNEL_H_ */
|
||||
|
|
|
|||
|
|
@ -53,9 +53,9 @@
|
|||
#define UART_SET_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) | DLAB); SSYNC(); } while (0)
|
||||
#define UART_CLEAR_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) & ~DLAB); SSYNC(); } while (0)
|
||||
|
||||
#define UART_GET_CTS(x) gpio_get_value(x->cts_pin)
|
||||
#define UART_SET_RTS(x) gpio_set_value(x->rts_pin, 1)
|
||||
#define UART_CLEAR_RTS(x) gpio_set_value(x->rts_pin, 0)
|
||||
#define UART_GET_CTS(x) (!gpio_get_value(x->cts_pin))
|
||||
#define UART_DISABLE_RTS(x) gpio_set_value(x->rts_pin, 1)
|
||||
#define UART_ENABLE_RTS(x) gpio_set_value(x->rts_pin, 0)
|
||||
#define UART_ENABLE_INTS(x, v) UART_PUT_IER(x, v)
|
||||
#define UART_DISABLE_INTS(x) UART_PUT_IER(x, 0)
|
||||
|
||||
|
|
@ -87,6 +87,7 @@
|
|||
struct bfin_serial_port {
|
||||
struct uart_port port;
|
||||
unsigned int old_status;
|
||||
int status_irq;
|
||||
unsigned int lsr;
|
||||
#ifdef CONFIG_SERIAL_BFIN_DMA
|
||||
int tx_done;
|
||||
|
|
@ -125,6 +126,7 @@ static inline void UART_CLEAR_LSR(struct bfin_serial_port *uart)
|
|||
struct bfin_serial_res {
|
||||
unsigned long uart_base_addr;
|
||||
int uart_irq;
|
||||
int uart_status_irq;
|
||||
#ifdef CONFIG_SERIAL_BFIN_DMA
|
||||
unsigned int uart_tx_dma_channel;
|
||||
unsigned int uart_rx_dma_channel;
|
||||
|
|
@ -140,6 +142,7 @@ struct bfin_serial_res bfin_serial_resource[] = {
|
|||
{
|
||||
0xFFC00400,
|
||||
IRQ_UART0_RX,
|
||||
IRQ_UART0_ERROR,
|
||||
#ifdef CONFIG_SERIAL_BFIN_DMA
|
||||
CH_UART0_TX,
|
||||
CH_UART0_RX,
|
||||
|
|
@ -154,6 +157,7 @@ struct bfin_serial_res bfin_serial_resource[] = {
|
|||
{
|
||||
0xFFC02000,
|
||||
IRQ_UART1_RX,
|
||||
IRQ_UART1_ERROR,
|
||||
#ifdef CONFIG_SERIAL_BFIN_DMA
|
||||
CH_UART1_TX,
|
||||
CH_UART1_RX,
|
||||
|
|
|
|||
|
|
@ -53,9 +53,9 @@
|
|||
#define UART_SET_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) | DLAB); SSYNC(); } while (0)
|
||||
#define UART_CLEAR_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) & ~DLAB); SSYNC(); } while (0)
|
||||
|
||||
#define UART_GET_CTS(x) gpio_get_value(x->cts_pin)
|
||||
#define UART_SET_RTS(x) gpio_set_value(x->rts_pin, 1)
|
||||
#define UART_CLEAR_RTS(x) gpio_set_value(x->rts_pin, 0)
|
||||
#define UART_GET_CTS(x) (!gpio_get_value(x->cts_pin))
|
||||
#define UART_DISABLE_RTS(x) gpio_set_value(x->rts_pin, 1)
|
||||
#define UART_ENABLE_RTS(x) gpio_set_value(x->rts_pin, 0)
|
||||
#define UART_ENABLE_INTS(x, v) UART_PUT_IER(x, v)
|
||||
#define UART_DISABLE_INTS(x) UART_PUT_IER(x, 0)
|
||||
|
||||
|
|
@ -87,6 +87,7 @@
|
|||
struct bfin_serial_port {
|
||||
struct uart_port port;
|
||||
unsigned int old_status;
|
||||
int status_irq;
|
||||
unsigned int lsr;
|
||||
#ifdef CONFIG_SERIAL_BFIN_DMA
|
||||
int tx_done;
|
||||
|
|
@ -125,6 +126,7 @@ static inline void UART_CLEAR_LSR(struct bfin_serial_port *uart)
|
|||
struct bfin_serial_res {
|
||||
unsigned long uart_base_addr;
|
||||
int uart_irq;
|
||||
int uart_status_irq;
|
||||
#ifdef CONFIG_SERIAL_BFIN_DMA
|
||||
unsigned int uart_tx_dma_channel;
|
||||
unsigned int uart_rx_dma_channel;
|
||||
|
|
@ -140,6 +142,7 @@ struct bfin_serial_res bfin_serial_resource[] = {
|
|||
{
|
||||
0xFFC00400,
|
||||
IRQ_UART0_RX,
|
||||
IRQ_UART0_ERROR,
|
||||
#ifdef CONFIG_SERIAL_BFIN_DMA
|
||||
CH_UART0_TX,
|
||||
CH_UART0_RX,
|
||||
|
|
@ -154,6 +157,7 @@ struct bfin_serial_res bfin_serial_resource[] = {
|
|||
{
|
||||
0xFFC02000,
|
||||
IRQ_UART1_RX,
|
||||
IRQ_UART1_ERROR,
|
||||
#ifdef CONFIG_SERIAL_BFIN_DMA
|
||||
CH_UART1_TX,
|
||||
CH_UART1_RX,
|
||||
|
|
@ -167,29 +171,3 @@ struct bfin_serial_res bfin_serial_resource[] = {
|
|||
};
|
||||
|
||||
#define DRIVER_NAME "bfin-uart"
|
||||
|
||||
static void bfin_serial_hw_init(struct bfin_serial_port *uart)
|
||||
{
|
||||
|
||||
#ifdef CONFIG_SERIAL_BFIN_UART0
|
||||
peripheral_request(P_UART0_TX, DRIVER_NAME);
|
||||
peripheral_request(P_UART0_RX, DRIVER_NAME);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_SERIAL_BFIN_UART1
|
||||
peripheral_request(P_UART1_TX, DRIVER_NAME);
|
||||
peripheral_request(P_UART1_RX, DRIVER_NAME);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_SERIAL_BFIN_CTSRTS
|
||||
if (uart->cts_pin >= 0) {
|
||||
gpio_request(uart->cts_pin, DRIVER_NAME);
|
||||
gpio_direction_input(uart->cts_pin);
|
||||
}
|
||||
|
||||
if (uart->rts_pin >= 0) {
|
||||
gpio_request(uart->rts_pin, DRIVER_NAME);
|
||||
gpio_direction_output(uart->rts_pin, 0);
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
|
|
|||
|
|
@ -53,9 +53,9 @@
|
|||
#define UART_SET_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) | DLAB); SSYNC(); } while (0)
|
||||
#define UART_CLEAR_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) & ~DLAB); SSYNC(); } while (0)
|
||||
|
||||
#define UART_GET_CTS(x) gpio_get_value(x->cts_pin)
|
||||
#define UART_SET_RTS(x) gpio_set_value(x->rts_pin, 1)
|
||||
#define UART_CLEAR_RTS(x) gpio_set_value(x->rts_pin, 0)
|
||||
#define UART_GET_CTS(x) (!gpio_get_value(x->cts_pin))
|
||||
#define UART_DISABLE_RTS(x) gpio_set_value(x->rts_pin, 1)
|
||||
#define UART_ENABLE_RTS(x) gpio_set_value(x->rts_pin, 0)
|
||||
#define UART_ENABLE_INTS(x, v) UART_PUT_IER(x, v)
|
||||
#define UART_DISABLE_INTS(x) UART_PUT_IER(x, 0)
|
||||
|
||||
|
|
@ -74,6 +74,7 @@
|
|||
struct bfin_serial_port {
|
||||
struct uart_port port;
|
||||
unsigned int old_status;
|
||||
int status_irq;
|
||||
unsigned int lsr;
|
||||
#ifdef CONFIG_SERIAL_BFIN_DMA
|
||||
int tx_done;
|
||||
|
|
@ -116,6 +117,7 @@ static inline void UART_CLEAR_LSR(struct bfin_serial_port *uart)
|
|||
struct bfin_serial_res {
|
||||
unsigned long uart_base_addr;
|
||||
int uart_irq;
|
||||
int uart_status_irq;
|
||||
#ifdef CONFIG_SERIAL_BFIN_DMA
|
||||
unsigned int uart_tx_dma_channel;
|
||||
unsigned int uart_rx_dma_channel;
|
||||
|
|
@ -130,6 +132,7 @@ struct bfin_serial_res bfin_serial_resource[] = {
|
|||
{
|
||||
0xFFC00400,
|
||||
IRQ_UART_RX,
|
||||
IRQ_UART_ERROR,
|
||||
#ifdef CONFIG_SERIAL_BFIN_DMA
|
||||
CH_UART_TX,
|
||||
CH_UART_RX,
|
||||
|
|
@ -142,23 +145,3 @@ struct bfin_serial_res bfin_serial_resource[] = {
|
|||
};
|
||||
|
||||
#define DRIVER_NAME "bfin-uart"
|
||||
|
||||
static void bfin_serial_hw_init(struct bfin_serial_port *uart)
|
||||
{
|
||||
|
||||
#ifdef CONFIG_SERIAL_BFIN_UART0
|
||||
peripheral_request(P_UART0_TX, DRIVER_NAME);
|
||||
peripheral_request(P_UART0_RX, DRIVER_NAME);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_SERIAL_BFIN_CTSRTS
|
||||
if (uart->cts_pin >= 0) {
|
||||
gpio_request(uart->cts_pin, DRIVER_NAME);
|
||||
gpio_direction_input(uart->cts_pin);
|
||||
}
|
||||
if (uart->rts_pin >= 0) {
|
||||
gpio_request(uart->rts_pin, DRIVER_NAME);
|
||||
gpio_direction_output(uart->rts_pin, 0);
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
|
|
|||
|
|
@ -53,9 +53,9 @@
|
|||
#define UART_SET_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) | DLAB); SSYNC(); } while (0)
|
||||
#define UART_CLEAR_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) & ~DLAB); SSYNC(); } while (0)
|
||||
|
||||
#define UART_GET_CTS(x) gpio_get_value(x->cts_pin)
|
||||
#define UART_SET_RTS(x) gpio_set_value(x->rts_pin, 1)
|
||||
#define UART_CLEAR_RTS(x) gpio_set_value(x->rts_pin, 0)
|
||||
#define UART_GET_CTS(x) (!gpio_get_value(x->cts_pin))
|
||||
#define UART_DISABLE_RTS(x) gpio_set_value(x->rts_pin, 1)
|
||||
#define UART_ENABLE_RTS(x) gpio_set_value(x->rts_pin, 0)
|
||||
#define UART_ENABLE_INTS(x, v) UART_PUT_IER(x, v)
|
||||
#define UART_DISABLE_INTS(x) UART_PUT_IER(x, 0)
|
||||
|
||||
|
|
@ -87,6 +87,7 @@
|
|||
struct bfin_serial_port {
|
||||
struct uart_port port;
|
||||
unsigned int old_status;
|
||||
int status_irq;
|
||||
unsigned int lsr;
|
||||
#ifdef CONFIG_SERIAL_BFIN_DMA
|
||||
int tx_done;
|
||||
|
|
@ -99,7 +100,6 @@ struct bfin_serial_port {
|
|||
struct work_struct tx_dma_workqueue;
|
||||
#endif
|
||||
#ifdef CONFIG_SERIAL_BFIN_CTSRTS
|
||||
struct timer_list cts_timer;
|
||||
int cts_pin;
|
||||
int rts_pin;
|
||||
#endif
|
||||
|
|
@ -125,6 +125,7 @@ static inline void UART_CLEAR_LSR(struct bfin_serial_port *uart)
|
|||
struct bfin_serial_res {
|
||||
unsigned long uart_base_addr;
|
||||
int uart_irq;
|
||||
int uart_status_irq;
|
||||
#ifdef CONFIG_SERIAL_BFIN_DMA
|
||||
unsigned int uart_tx_dma_channel;
|
||||
unsigned int uart_rx_dma_channel;
|
||||
|
|
@ -140,6 +141,7 @@ struct bfin_serial_res bfin_serial_resource[] = {
|
|||
{
|
||||
0xFFC00400,
|
||||
IRQ_UART0_RX,
|
||||
IRQ_UART0_ERROR,
|
||||
#ifdef CONFIG_SERIAL_BFIN_DMA
|
||||
CH_UART0_TX,
|
||||
CH_UART0_RX,
|
||||
|
|
@ -154,6 +156,7 @@ struct bfin_serial_res bfin_serial_resource[] = {
|
|||
{
|
||||
0xFFC02000,
|
||||
IRQ_UART1_RX,
|
||||
IRQ_UART1_ERROR,
|
||||
#ifdef CONFIG_SERIAL_BFIN_DMA
|
||||
CH_UART1_TX,
|
||||
CH_UART1_RX,
|
||||
|
|
@ -167,29 +170,3 @@ struct bfin_serial_res bfin_serial_resource[] = {
|
|||
};
|
||||
|
||||
#define DRIVER_NAME "bfin-uart"
|
||||
|
||||
static void bfin_serial_hw_init(struct bfin_serial_port *uart)
|
||||
{
|
||||
|
||||
#ifdef CONFIG_SERIAL_BFIN_UART0
|
||||
peripheral_request(P_UART0_TX, DRIVER_NAME);
|
||||
peripheral_request(P_UART0_RX, DRIVER_NAME);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_SERIAL_BFIN_UART1
|
||||
peripheral_request(P_UART1_TX, DRIVER_NAME);
|
||||
peripheral_request(P_UART1_RX, DRIVER_NAME);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_SERIAL_BFIN_CTSRTS
|
||||
if (uart->cts_pin >= 0) {
|
||||
gpio_request(uart->cts_pin, DRIVER_NAME);
|
||||
gpio_direction_input(uart->cts_pin);
|
||||
}
|
||||
|
||||
if (uart->rts_pin >= 0) {
|
||||
gpio_request(uart->rts_pin, DRIVER_NAME);
|
||||
gpio_direction_output(uart->rts_pin, 0);
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
|
|
|||
|
|
@ -53,9 +53,9 @@
|
|||
#define UART_SET_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) | DLAB); SSYNC(); } while (0)
|
||||
#define UART_CLEAR_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) & ~DLAB); SSYNC(); } while (0)
|
||||
|
||||
#define UART_GET_CTS(x) gpio_get_value(x->cts_pin)
|
||||
#define UART_SET_RTS(x) gpio_set_value(x->rts_pin, 1)
|
||||
#define UART_CLEAR_RTS(x) gpio_set_value(x->rts_pin, 0)
|
||||
#define UART_GET_CTS(x) (!gpio_get_value(x->cts_pin))
|
||||
#define UART_DISABLE_RTS(x) gpio_set_value(x->rts_pin, 1)
|
||||
#define UART_ENABLE_RTS(x) gpio_set_value(x->rts_pin, 0)
|
||||
#define UART_ENABLE_INTS(x, v) UART_PUT_IER(x, v)
|
||||
#define UART_DISABLE_INTS(x) UART_PUT_IER(x, 0)
|
||||
|
||||
|
|
@ -87,6 +87,7 @@
|
|||
struct bfin_serial_port {
|
||||
struct uart_port port;
|
||||
unsigned int old_status;
|
||||
int status_irq;
|
||||
unsigned int lsr;
|
||||
#ifdef CONFIG_SERIAL_BFIN_DMA
|
||||
int tx_done;
|
||||
|
|
@ -125,6 +126,7 @@ static inline void UART_CLEAR_LSR(struct bfin_serial_port *uart)
|
|||
struct bfin_serial_res {
|
||||
unsigned long uart_base_addr;
|
||||
int uart_irq;
|
||||
int uart_status_irq;
|
||||
#ifdef CONFIG_SERIAL_BFIN_DMA
|
||||
unsigned int uart_tx_dma_channel;
|
||||
unsigned int uart_rx_dma_channel;
|
||||
|
|
@ -140,6 +142,7 @@ struct bfin_serial_res bfin_serial_resource[] = {
|
|||
{
|
||||
0xFFC00400,
|
||||
IRQ_UART0_RX,
|
||||
IRQ_UART0_ERROR,
|
||||
#ifdef CONFIG_SERIAL_BFIN_DMA
|
||||
CH_UART0_TX,
|
||||
CH_UART0_RX,
|
||||
|
|
@ -154,6 +157,7 @@ struct bfin_serial_res bfin_serial_resource[] = {
|
|||
{
|
||||
0xFFC02000,
|
||||
IRQ_UART1_RX,
|
||||
IRQ_UART1_ERROR,
|
||||
#ifdef CONFIG_SERIAL_BFIN_DMA
|
||||
CH_UART1_TX,
|
||||
CH_UART1_RX,
|
||||
|
|
|
|||
|
|
@ -46,41 +46,27 @@
|
|||
#define UART_PUT_CHAR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_THR),v)
|
||||
#define UART_PUT_DLL(uart,v) bfin_write16(((uart)->port.membase + OFFSET_DLL),v)
|
||||
#define UART_SET_IER(uart,v) bfin_write16(((uart)->port.membase + OFFSET_IER_SET),v)
|
||||
#define UART_CLEAR_IER(uart,v) bfin_write16(((uart)->port.membase + OFFSET_IER_CLEAR),v)
|
||||
#define UART_CLEAR_IER(uart,v) bfin_write16(((uart)->port.membase + OFFSET_IER_CLEAR),v)
|
||||
#define UART_PUT_DLH(uart,v) bfin_write16(((uart)->port.membase + OFFSET_DLH),v)
|
||||
#define UART_PUT_LSR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_LSR),v)
|
||||
#define UART_PUT_LCR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_LCR),v)
|
||||
#define UART_CLEAR_LSR(uart) bfin_write16(((uart)->port.membase + OFFSET_LSR), -1)
|
||||
#define UART_PUT_GCTL(uart,v) bfin_write16(((uart)->port.membase + OFFSET_GCTL),v)
|
||||
#define UART_PUT_MCR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_MCR),v)
|
||||
#define UART_CLEAR_SCTS(uart) bfin_write16(((uart)->port.membase + OFFSET_MSR),SCTS)
|
||||
|
||||
#define UART_SET_DLAB(uart) /* MMRs not muxed on BF54x */
|
||||
#define UART_CLEAR_DLAB(uart) /* MMRs not muxed on BF54x */
|
||||
|
||||
#define UART_GET_CTS(x) (UART_GET_MSR(x) & CTS)
|
||||
#define UART_SET_RTS(x) (UART_PUT_MCR(x, UART_GET_MCR(x) | MRTS))
|
||||
#define UART_CLEAR_RTS(x) (UART_PUT_MCR(x, UART_GET_MCR(x) & ~MRTS))
|
||||
#define UART_DISABLE_RTS(x) UART_PUT_MCR(x, UART_GET_MCR(x) & ~(ARTS|MRTS))
|
||||
#define UART_ENABLE_RTS(x) UART_PUT_MCR(x, UART_GET_MCR(x) | MRTS | ARTS)
|
||||
#define UART_ENABLE_INTS(x, v) UART_SET_IER(x, v)
|
||||
#define UART_DISABLE_INTS(x) UART_CLEAR_IER(x, 0xF)
|
||||
|
||||
#if defined(CONFIG_BFIN_UART0_CTSRTS) || defined(CONFIG_BFIN_UART2_CTSRTS)
|
||||
# define CONFIG_SERIAL_BFIN_CTSRTS
|
||||
|
||||
# ifndef CONFIG_UART0_CTS_PIN
|
||||
# define CONFIG_UART0_CTS_PIN -1
|
||||
# endif
|
||||
|
||||
# ifndef CONFIG_UART0_RTS_PIN
|
||||
# define CONFIG_UART0_RTS_PIN -1
|
||||
# endif
|
||||
|
||||
# ifndef CONFIG_UART2_CTS_PIN
|
||||
# define CONFIG_UART2_CTS_PIN -1
|
||||
# endif
|
||||
|
||||
# ifndef CONFIG_UART2_RTS_PIN
|
||||
# define CONFIG_UART2_RTS_PIN -1
|
||||
# endif
|
||||
#if defined(CONFIG_BFIN_UART0_CTSRTS) || defined(CONFIG_BFIN_UART1_CTSRTS) || \
|
||||
defined(CONFIG_BFIN_UART2_CTSRTS) || defined(CONFIG_BFIN_UART3_CTSRTS)
|
||||
# define CONFIG_SERIAL_BFIN_HARD_CTSRTS
|
||||
#endif
|
||||
|
||||
#define BFIN_UART_TX_FIFO_SIZE 2
|
||||
|
|
@ -91,6 +77,7 @@
|
|||
struct bfin_serial_port {
|
||||
struct uart_port port;
|
||||
unsigned int old_status;
|
||||
int status_irq;
|
||||
#ifdef CONFIG_SERIAL_BFIN_DMA
|
||||
int tx_done;
|
||||
int tx_count;
|
||||
|
|
@ -101,23 +88,24 @@ struct bfin_serial_port {
|
|||
unsigned int rx_dma_channel;
|
||||
struct work_struct tx_dma_workqueue;
|
||||
#endif
|
||||
#ifdef CONFIG_SERIAL_BFIN_CTSRTS
|
||||
struct timer_list cts_timer;
|
||||
int cts_pin;
|
||||
int rts_pin;
|
||||
#ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
|
||||
int scts;
|
||||
int cts_pin;
|
||||
int rts_pin;
|
||||
#endif
|
||||
};
|
||||
|
||||
struct bfin_serial_res {
|
||||
unsigned long uart_base_addr;
|
||||
int uart_irq;
|
||||
int uart_status_irq;
|
||||
#ifdef CONFIG_SERIAL_BFIN_DMA
|
||||
unsigned int uart_tx_dma_channel;
|
||||
unsigned int uart_rx_dma_channel;
|
||||
#endif
|
||||
#ifdef CONFIG_SERIAL_BFIN_CTSRTS
|
||||
int uart_cts_pin;
|
||||
int uart_rts_pin;
|
||||
#ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
|
||||
int uart_cts_pin;
|
||||
int uart_rts_pin;
|
||||
#endif
|
||||
};
|
||||
|
||||
|
|
@ -126,13 +114,14 @@ struct bfin_serial_res bfin_serial_resource[] = {
|
|||
{
|
||||
0xFFC00400,
|
||||
IRQ_UART0_RX,
|
||||
IRQ_UART0_ERROR,
|
||||
#ifdef CONFIG_SERIAL_BFIN_DMA
|
||||
CH_UART0_TX,
|
||||
CH_UART0_RX,
|
||||
#endif
|
||||
#ifdef CONFIG_SERIAL_BFIN_CTSRTS
|
||||
CONFIG_UART0_CTS_PIN,
|
||||
CONFIG_UART0_RTS_PIN,
|
||||
#ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
|
||||
0,
|
||||
0,
|
||||
#endif
|
||||
},
|
||||
#endif
|
||||
|
|
@ -140,13 +129,14 @@ struct bfin_serial_res bfin_serial_resource[] = {
|
|||
{
|
||||
0xFFC02000,
|
||||
IRQ_UART1_RX,
|
||||
IRQ_UART1_ERROR,
|
||||
#ifdef CONFIG_SERIAL_BFIN_DMA
|
||||
CH_UART1_TX,
|
||||
CH_UART1_RX,
|
||||
#endif
|
||||
#ifdef CONFIG_SERIAL_BFIN_CTSRTS
|
||||
0,
|
||||
0,
|
||||
#ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
|
||||
GPIO_PE10,
|
||||
GPIO_PE9,
|
||||
#endif
|
||||
},
|
||||
#endif
|
||||
|
|
@ -154,13 +144,14 @@ struct bfin_serial_res bfin_serial_resource[] = {
|
|||
{
|
||||
0xFFC02100,
|
||||
IRQ_UART2_RX,
|
||||
IRQ_UART2_ERROR,
|
||||
#ifdef CONFIG_SERIAL_BFIN_DMA
|
||||
CH_UART2_TX,
|
||||
CH_UART2_RX,
|
||||
#endif
|
||||
#ifdef CONFIG_SERIAL_BFIN_CTSRTS
|
||||
CONFIG_UART2_CTS_PIN,
|
||||
CONFIG_UART2_RTS_PIN,
|
||||
#ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
|
||||
0,
|
||||
0,
|
||||
#endif
|
||||
},
|
||||
#endif
|
||||
|
|
@ -168,61 +159,17 @@ struct bfin_serial_res bfin_serial_resource[] = {
|
|||
{
|
||||
0xFFC03100,
|
||||
IRQ_UART3_RX,
|
||||
IRQ_UART3_ERROR,
|
||||
#ifdef CONFIG_SERIAL_BFIN_DMA
|
||||
CH_UART3_TX,
|
||||
CH_UART3_RX,
|
||||
#endif
|
||||
#ifdef CONFIG_SERIAL_BFIN_CTSRTS
|
||||
0,
|
||||
0,
|
||||
#ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
|
||||
GPIO_PB3,
|
||||
GPIO_PB2,
|
||||
#endif
|
||||
},
|
||||
#endif
|
||||
};
|
||||
|
||||
#define DRIVER_NAME "bfin-uart"
|
||||
|
||||
static void bfin_serial_hw_init(struct bfin_serial_port *uart)
|
||||
{
|
||||
#ifdef CONFIG_SERIAL_BFIN_UART0
|
||||
peripheral_request(P_UART0_TX, DRIVER_NAME);
|
||||
peripheral_request(P_UART0_RX, DRIVER_NAME);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_SERIAL_BFIN_UART1
|
||||
peripheral_request(P_UART1_TX, DRIVER_NAME);
|
||||
peripheral_request(P_UART1_RX, DRIVER_NAME);
|
||||
|
||||
#ifdef CONFIG_BFIN_UART1_CTSRTS
|
||||
peripheral_request(P_UART1_RTS, DRIVER_NAME);
|
||||
peripheral_request(P_UART1_CTS, DRIVER_NAME);
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_SERIAL_BFIN_UART2
|
||||
peripheral_request(P_UART2_TX, DRIVER_NAME);
|
||||
peripheral_request(P_UART2_RX, DRIVER_NAME);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_SERIAL_BFIN_UART3
|
||||
peripheral_request(P_UART3_TX, DRIVER_NAME);
|
||||
peripheral_request(P_UART3_RX, DRIVER_NAME);
|
||||
|
||||
#ifdef CONFIG_BFIN_UART3_CTSRTS
|
||||
peripheral_request(P_UART3_RTS, DRIVER_NAME);
|
||||
peripheral_request(P_UART3_CTS, DRIVER_NAME);
|
||||
#endif
|
||||
#endif
|
||||
SSYNC();
|
||||
#ifdef CONFIG_SERIAL_BFIN_CTSRTS
|
||||
if (uart->cts_pin >= 0) {
|
||||
gpio_request(uart->cts_pin, DRIVER_NAME);
|
||||
gpio_direction_input(uart->cts_pin);
|
||||
}
|
||||
|
||||
if (uart->rts_pin >= 0) {
|
||||
gpio_request(uart->rts_pin, DRIVER_NAME);
|
||||
gpio_direction_output(uart->rts_pin, 0);
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
|
|
|||
|
|
@ -53,9 +53,9 @@
|
|||
#define UART_SET_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) | DLAB); SSYNC(); } while (0)
|
||||
#define UART_CLEAR_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) & ~DLAB); SSYNC(); } while (0)
|
||||
|
||||
#define UART_GET_CTS(x) gpio_get_value(x->cts_pin)
|
||||
#define UART_SET_RTS(x) gpio_set_value(x->rts_pin, 1)
|
||||
#define UART_CLEAR_RTS(x) gpio_set_value(x->rts_pin, 0)
|
||||
#define UART_GET_CTS(x) (!gpio_get_value(x->cts_pin))
|
||||
#define UART_DISABLE_RTS(x) gpio_set_value(x->rts_pin, 1)
|
||||
#define UART_ENABLE_RTS(x) gpio_set_value(x->rts_pin, 0)
|
||||
#define UART_ENABLE_INTS(x, v) UART_PUT_IER(x, v)
|
||||
#define UART_DISABLE_INTS(x) UART_PUT_IER(x, 0)
|
||||
|
||||
|
|
@ -74,6 +74,7 @@
|
|||
struct bfin_serial_port {
|
||||
struct uart_port port;
|
||||
unsigned int old_status;
|
||||
int status_irq;
|
||||
unsigned int lsr;
|
||||
#ifdef CONFIG_SERIAL_BFIN_DMA
|
||||
int tx_done;
|
||||
|
|
@ -116,6 +117,7 @@ static inline void UART_CLEAR_LSR(struct bfin_serial_port *uart)
|
|||
struct bfin_serial_res {
|
||||
unsigned long uart_base_addr;
|
||||
int uart_irq;
|
||||
int uart_status_irq;
|
||||
#ifdef CONFIG_SERIAL_BFIN_DMA
|
||||
unsigned int uart_tx_dma_channel;
|
||||
unsigned int uart_rx_dma_channel;
|
||||
|
|
@ -130,6 +132,7 @@ struct bfin_serial_res bfin_serial_resource[] = {
|
|||
{
|
||||
0xFFC00400,
|
||||
IRQ_UART_RX,
|
||||
IRQ_UART_ERROR,
|
||||
#ifdef CONFIG_SERIAL_BFIN_DMA
|
||||
CH_UART_TX,
|
||||
CH_UART_RX,
|
||||
|
|
@ -142,23 +145,3 @@ struct bfin_serial_res bfin_serial_resource[] = {
|
|||
};
|
||||
|
||||
#define DRIVER_NAME "bfin-uart"
|
||||
|
||||
static void bfin_serial_hw_init(struct bfin_serial_port *uart)
|
||||
{
|
||||
|
||||
#ifdef CONFIG_SERIAL_BFIN_UART0
|
||||
peripheral_request(P_UART0_TX, DRIVER_NAME);
|
||||
peripheral_request(P_UART0_RX, DRIVER_NAME);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_SERIAL_BFIN_CTSRTS
|
||||
if (uart->cts_pin >= 0) {
|
||||
gpio_request(uart->cts_pin, DRIVER_NAME);
|
||||
gpio_direction_input(uart->cts_pin);
|
||||
}
|
||||
if (uart->rts_pin >= 0) {
|
||||
gpio_request(uart->rts_pin, DRIVER_NAME);
|
||||
gpio_direction_output(uart->rts_pin, 0);
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
|
|
|||
|
|
@ -74,8 +74,9 @@
|
|||
#define TIOCSHAYESESP 0x545F /* Set Hayes ESP configuration */
|
||||
#define FIOQSIZE 0x5460
|
||||
|
||||
#define TIOCSERSETRS485 0x5461 /* enable rs-485 */
|
||||
#define TIOCSERWRRS485 0x5462 /* write rs-485 */
|
||||
#define TIOCSERSETRS485 0x5461 /* enable rs-485 (deprecated) */
|
||||
#define TIOCSERWRRS485 0x5462 /* write rs-485 */
|
||||
#define TIOCSRS485 0x5463 /* enable rs-485 */
|
||||
|
||||
/* Used for packet mode */
|
||||
#define TIOCPKT_DATA 0
|
||||
|
|
|
|||
|
|
@ -1,15 +1,13 @@
|
|||
/* RS-485 structures */
|
||||
|
||||
/* RS-485 support */
|
||||
/* Used with ioctl() TIOCSERSETRS485 */
|
||||
/* Used with ioctl() TIOCSERSETRS485 for backward compatibility!
|
||||
* XXX: Do not use it for new code!
|
||||
*/
|
||||
struct rs485_control {
|
||||
unsigned short rts_on_send;
|
||||
unsigned short rts_after_sent;
|
||||
unsigned long delay_rts_before_send;
|
||||
unsigned short enabled;
|
||||
#ifdef __KERNEL__
|
||||
int disable_serial_loopback;
|
||||
#endif
|
||||
};
|
||||
|
||||
/* Used with ioctl() TIOCSERWRRS485 */
|
||||
|
|
|
|||
|
|
@ -4,6 +4,7 @@
|
|||
#include <asm/termbits.h>
|
||||
#include <asm/ioctls.h>
|
||||
#include <asm/rs485.h>
|
||||
#include <linux/serial.h>
|
||||
|
||||
struct winsize {
|
||||
unsigned short ws_row;
|
||||
|
|
|
|||
|
|
@ -308,11 +308,13 @@
|
|||
#define __NR_dup3 1316
|
||||
#define __NR_pipe2 1317
|
||||
#define __NR_inotify_init1 1318
|
||||
#define __NR_preadv 1319
|
||||
#define __NR_pwritev 1320
|
||||
|
||||
#ifdef __KERNEL__
|
||||
|
||||
|
||||
#define NR_syscalls 295 /* length of syscall table */
|
||||
#define NR_syscalls 297 /* length of syscall table */
|
||||
|
||||
/*
|
||||
* The following defines stop scripts/checksyscalls.sh from complaining about
|
||||
|
|
|
|||
|
|
@ -1803,6 +1803,8 @@ sys_call_table:
|
|||
data8 sys_dup3
|
||||
data8 sys_pipe2
|
||||
data8 sys_inotify_init1
|
||||
data8 sys_preadv
|
||||
data8 sys_pwritev // 1320
|
||||
|
||||
.org sys_call_table + 8*NR_syscalls // guard against failures to increase NR_syscalls
|
||||
#endif /* __IA64_ASM_PARAVIRTUALIZED_NATIVE */
|
||||
|
|
|
|||
|
|
@ -37,7 +37,7 @@ int force_iommu __read_mostly;
|
|||
to i386. */
|
||||
struct device fallback_dev = {
|
||||
.init_name = "fallback device",
|
||||
.coherent_dma_mask = DMA_32BIT_MASK,
|
||||
.coherent_dma_mask = DMA_BIT_MASK(32),
|
||||
.dma_mask = &fallback_dev.coherent_dma_mask,
|
||||
};
|
||||
|
||||
|
|
@ -75,7 +75,7 @@ int iommu_dma_supported(struct device *dev, u64 mask)
|
|||
/* Copied from i386. Doesn't make much sense, because it will
|
||||
only work for pci_alloc_coherent.
|
||||
The caller just has to use GFP_DMA in this case. */
|
||||
if (mask < DMA_24BIT_MASK)
|
||||
if (mask < DMA_BIT_MASK(24))
|
||||
return 0;
|
||||
|
||||
/* Tell the device to use SAC when IOMMU force is on. This
|
||||
|
|
@ -90,7 +90,7 @@ int iommu_dma_supported(struct device *dev, u64 mask)
|
|||
SAC for these. Assume all masks <= 40 bits are of this
|
||||
type. Normally this doesn't make any difference, but gives
|
||||
more gentle handling of IOMMU overflow. */
|
||||
if (iommu_sac_force && (mask >= DMA_40BIT_MASK)) {
|
||||
if (iommu_sac_force && (mask >= DMA_BIT_MASK(40))) {
|
||||
dev_info(dev, "Force SAC with mask %lx\n", mask);
|
||||
return 0;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -349,7 +349,7 @@ static int sn_dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
|
|||
|
||||
u64 sn_dma_get_required_mask(struct device *dev)
|
||||
{
|
||||
return DMA_64BIT_MASK;
|
||||
return DMA_BIT_MASK(64);
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(sn_dma_get_required_mask);
|
||||
|
||||
|
|
|
|||
|
|
@ -80,14 +80,14 @@ static struct resource au1xxx_usb_ohci_resources[] = {
|
|||
};
|
||||
|
||||
/* The dmamask must be set for OHCI to work */
|
||||
static u64 ohci_dmamask = DMA_32BIT_MASK;
|
||||
static u64 ohci_dmamask = DMA_BIT_MASK(32);
|
||||
|
||||
static struct platform_device au1xxx_usb_ohci_device = {
|
||||
.name = "au1xxx-ohci",
|
||||
.id = 0,
|
||||
.dev = {
|
||||
.dma_mask = &ohci_dmamask,
|
||||
.coherent_dma_mask = DMA_32BIT_MASK,
|
||||
.coherent_dma_mask = DMA_BIT_MASK(32),
|
||||
},
|
||||
.num_resources = ARRAY_SIZE(au1xxx_usb_ohci_resources),
|
||||
.resource = au1xxx_usb_ohci_resources,
|
||||
|
|
@ -109,14 +109,14 @@ static struct resource au1100_lcd_resources[] = {
|
|||
}
|
||||
};
|
||||
|
||||
static u64 au1100_lcd_dmamask = DMA_32BIT_MASK;
|
||||
static u64 au1100_lcd_dmamask = DMA_BIT_MASK(32);
|
||||
|
||||
static struct platform_device au1100_lcd_device = {
|
||||
.name = "au1100-lcd",
|
||||
.id = 0,
|
||||
.dev = {
|
||||
.dma_mask = &au1100_lcd_dmamask,
|
||||
.coherent_dma_mask = DMA_32BIT_MASK,
|
||||
.coherent_dma_mask = DMA_BIT_MASK(32),
|
||||
},
|
||||
.num_resources = ARRAY_SIZE(au1100_lcd_resources),
|
||||
.resource = au1100_lcd_resources,
|
||||
|
|
@ -138,14 +138,14 @@ static struct resource au1xxx_usb_ehci_resources[] = {
|
|||
},
|
||||
};
|
||||
|
||||
static u64 ehci_dmamask = DMA_32BIT_MASK;
|
||||
static u64 ehci_dmamask = DMA_BIT_MASK(32);
|
||||
|
||||
static struct platform_device au1xxx_usb_ehci_device = {
|
||||
.name = "au1xxx-ehci",
|
||||
.id = 0,
|
||||
.dev = {
|
||||
.dma_mask = &ehci_dmamask,
|
||||
.coherent_dma_mask = DMA_32BIT_MASK,
|
||||
.coherent_dma_mask = DMA_BIT_MASK(32),
|
||||
},
|
||||
.num_resources = ARRAY_SIZE(au1xxx_usb_ehci_resources),
|
||||
.resource = au1xxx_usb_ehci_resources,
|
||||
|
|
@ -165,14 +165,14 @@ static struct resource au1xxx_usb_gdt_resources[] = {
|
|||
},
|
||||
};
|
||||
|
||||
static u64 udc_dmamask = DMA_32BIT_MASK;
|
||||
static u64 udc_dmamask = DMA_BIT_MASK(32);
|
||||
|
||||
static struct platform_device au1xxx_usb_gdt_device = {
|
||||
.name = "au1xxx-udc",
|
||||
.id = 0,
|
||||
.dev = {
|
||||
.dma_mask = &udc_dmamask,
|
||||
.coherent_dma_mask = DMA_32BIT_MASK,
|
||||
.coherent_dma_mask = DMA_BIT_MASK(32),
|
||||
},
|
||||
.num_resources = ARRAY_SIZE(au1xxx_usb_gdt_resources),
|
||||
.resource = au1xxx_usb_gdt_resources,
|
||||
|
|
@ -192,14 +192,14 @@ static struct resource au1xxx_usb_otg_resources[] = {
|
|||
},
|
||||
};
|
||||
|
||||
static u64 uoc_dmamask = DMA_32BIT_MASK;
|
||||
static u64 uoc_dmamask = DMA_BIT_MASK(32);
|
||||
|
||||
static struct platform_device au1xxx_usb_otg_device = {
|
||||
.name = "au1xxx-uoc",
|
||||
.id = 0,
|
||||
.dev = {
|
||||
.dma_mask = &uoc_dmamask,
|
||||
.coherent_dma_mask = DMA_32BIT_MASK,
|
||||
.coherent_dma_mask = DMA_BIT_MASK(32),
|
||||
},
|
||||
.num_resources = ARRAY_SIZE(au1xxx_usb_otg_resources),
|
||||
.resource = au1xxx_usb_otg_resources,
|
||||
|
|
@ -218,20 +218,20 @@ static struct resource au1200_lcd_resources[] = {
|
|||
}
|
||||
};
|
||||
|
||||
static u64 au1200_lcd_dmamask = DMA_32BIT_MASK;
|
||||
static u64 au1200_lcd_dmamask = DMA_BIT_MASK(32);
|
||||
|
||||
static struct platform_device au1200_lcd_device = {
|
||||
.name = "au1200-lcd",
|
||||
.id = 0,
|
||||
.dev = {
|
||||
.dma_mask = &au1200_lcd_dmamask,
|
||||
.coherent_dma_mask = DMA_32BIT_MASK,
|
||||
.coherent_dma_mask = DMA_BIT_MASK(32),
|
||||
},
|
||||
.num_resources = ARRAY_SIZE(au1200_lcd_resources),
|
||||
.resource = au1200_lcd_resources,
|
||||
};
|
||||
|
||||
static u64 au1xxx_mmc_dmamask = DMA_32BIT_MASK;
|
||||
static u64 au1xxx_mmc_dmamask = DMA_BIT_MASK(32);
|
||||
|
||||
extern struct au1xmmc_platform_data au1xmmc_platdata[2];
|
||||
|
||||
|
|
@ -263,7 +263,7 @@ static struct platform_device au1200_mmc0_device = {
|
|||
.id = 0,
|
||||
.dev = {
|
||||
.dma_mask = &au1xxx_mmc_dmamask,
|
||||
.coherent_dma_mask = DMA_32BIT_MASK,
|
||||
.coherent_dma_mask = DMA_BIT_MASK(32),
|
||||
.platform_data = &au1xmmc_platdata[0],
|
||||
},
|
||||
.num_resources = ARRAY_SIZE(au1200_mmc0_resources),
|
||||
|
|
@ -299,7 +299,7 @@ static struct platform_device au1200_mmc1_device = {
|
|||
.id = 1,
|
||||
.dev = {
|
||||
.dma_mask = &au1xxx_mmc_dmamask,
|
||||
.coherent_dma_mask = DMA_32BIT_MASK,
|
||||
.coherent_dma_mask = DMA_BIT_MASK(32),
|
||||
.platform_data = &au1xmmc_platdata[1],
|
||||
},
|
||||
.num_resources = ARRAY_SIZE(au1200_mmc1_resources),
|
||||
|
|
|
|||
|
|
@ -119,14 +119,14 @@ static struct resource ide_resources[] = {
|
|||
}
|
||||
};
|
||||
|
||||
static u64 ide_dmamask = DMA_32BIT_MASK;
|
||||
static u64 ide_dmamask = DMA_BIT_MASK(32);
|
||||
|
||||
static struct platform_device ide_device = {
|
||||
.name = "au1200-ide",
|
||||
.id = 0,
|
||||
.dev = {
|
||||
.dma_mask = &ide_dmamask,
|
||||
.coherent_dma_mask = DMA_32BIT_MASK,
|
||||
.coherent_dma_mask = DMA_BIT_MASK(32),
|
||||
},
|
||||
.num_resources = ARRAY_SIZE(ide_resources),
|
||||
.resource = ide_resources
|
||||
|
|
|
|||
|
|
@ -42,7 +42,7 @@
|
|||
#include <irq-mapping.h>
|
||||
#include <pnx833x.h>
|
||||
|
||||
static u64 uart_dmamask = DMA_32BIT_MASK;
|
||||
static u64 uart_dmamask = DMA_BIT_MASK(32);
|
||||
|
||||
static struct resource pnx833x_uart_resources[] = {
|
||||
[0] = {
|
||||
|
|
@ -101,14 +101,14 @@ static struct platform_device pnx833x_uart_device = {
|
|||
.id = -1,
|
||||
.dev = {
|
||||
.dma_mask = &uart_dmamask,
|
||||
.coherent_dma_mask = DMA_32BIT_MASK,
|
||||
.coherent_dma_mask = DMA_BIT_MASK(32),
|
||||
.platform_data = pnx8xxx_ports,
|
||||
},
|
||||
.num_resources = ARRAY_SIZE(pnx833x_uart_resources),
|
||||
.resource = pnx833x_uart_resources,
|
||||
};
|
||||
|
||||
static u64 ehci_dmamask = DMA_32BIT_MASK;
|
||||
static u64 ehci_dmamask = DMA_BIT_MASK(32);
|
||||
|
||||
static struct resource pnx833x_usb_ehci_resources[] = {
|
||||
[0] = {
|
||||
|
|
@ -128,7 +128,7 @@ static struct platform_device pnx833x_usb_ehci_device = {
|
|||
.id = -1,
|
||||
.dev = {
|
||||
.dma_mask = &ehci_dmamask,
|
||||
.coherent_dma_mask = DMA_32BIT_MASK,
|
||||
.coherent_dma_mask = DMA_BIT_MASK(32),
|
||||
},
|
||||
.num_resources = ARRAY_SIZE(pnx833x_usb_ehci_resources),
|
||||
.resource = pnx833x_usb_ehci_resources,
|
||||
|
|
@ -198,7 +198,7 @@ static struct platform_device pnx833x_i2c1_device = {
|
|||
};
|
||||
#endif
|
||||
|
||||
static u64 ethernet_dmamask = DMA_32BIT_MASK;
|
||||
static u64 ethernet_dmamask = DMA_BIT_MASK(32);
|
||||
|
||||
static struct resource pnx833x_ethernet_resources[] = {
|
||||
[0] = {
|
||||
|
|
@ -218,7 +218,7 @@ static struct platform_device pnx833x_ethernet_device = {
|
|||
.id = -1,
|
||||
.dev = {
|
||||
.dma_mask = ðernet_dmamask,
|
||||
.coherent_dma_mask = DMA_32BIT_MASK,
|
||||
.coherent_dma_mask = DMA_BIT_MASK(32),
|
||||
},
|
||||
.num_resources = ARRAY_SIZE(pnx833x_ethernet_resources),
|
||||
.resource = pnx833x_ethernet_resources,
|
||||
|
|
|
|||
|
|
@ -92,16 +92,16 @@ struct pnx8xxx_port pnx8xxx_ports[] = {
|
|||
};
|
||||
|
||||
/* The dmamask must be set for OHCI to work */
|
||||
static u64 ohci_dmamask = DMA_32BIT_MASK;
|
||||
static u64 ohci_dmamask = DMA_BIT_MASK(32);
|
||||
|
||||
static u64 uart_dmamask = DMA_32BIT_MASK;
|
||||
static u64 uart_dmamask = DMA_BIT_MASK(32);
|
||||
|
||||
static struct platform_device pnx8550_usb_ohci_device = {
|
||||
.name = "pnx8550-ohci",
|
||||
.id = -1,
|
||||
.dev = {
|
||||
.dma_mask = &ohci_dmamask,
|
||||
.coherent_dma_mask = DMA_32BIT_MASK,
|
||||
.coherent_dma_mask = DMA_BIT_MASK(32),
|
||||
},
|
||||
.num_resources = ARRAY_SIZE(pnx8550_usb_ohci_resources),
|
||||
.resource = pnx8550_usb_ohci_resources,
|
||||
|
|
@ -112,7 +112,7 @@ static struct platform_device pnx8550_uart_device = {
|
|||
.id = -1,
|
||||
.dev = {
|
||||
.dma_mask = &uart_dmamask,
|
||||
.coherent_dma_mask = DMA_32BIT_MASK,
|
||||
.coherent_dma_mask = DMA_BIT_MASK(32),
|
||||
.platform_data = pnx8xxx_ports,
|
||||
},
|
||||
.num_resources = ARRAY_SIZE(pnx8550_uart_resources),
|
||||
|
|
|
|||
|
|
@ -49,14 +49,14 @@ static struct resource msp_usbhost_resources [] = {
|
|||
},
|
||||
};
|
||||
|
||||
static u64 msp_usbhost_dma_mask = DMA_32BIT_MASK;
|
||||
static u64 msp_usbhost_dma_mask = DMA_BIT_MASK(32);
|
||||
|
||||
static struct platform_device msp_usbhost_device = {
|
||||
.name = "pmcmsp-ehci",
|
||||
.id = 0,
|
||||
.dev = {
|
||||
.dma_mask = &msp_usbhost_dma_mask,
|
||||
.coherent_dma_mask = DMA_32BIT_MASK,
|
||||
.coherent_dma_mask = DMA_BIT_MASK(32),
|
||||
},
|
||||
.num_resources = ARRAY_SIZE(msp_usbhost_resources),
|
||||
.resource = msp_usbhost_resources,
|
||||
|
|
@ -77,14 +77,14 @@ static struct resource msp_usbdev_resources [] = {
|
|||
},
|
||||
};
|
||||
|
||||
static u64 msp_usbdev_dma_mask = DMA_32BIT_MASK;
|
||||
static u64 msp_usbdev_dma_mask = DMA_BIT_MASK(32);
|
||||
|
||||
static struct platform_device msp_usbdev_device = {
|
||||
.name = "msp71xx_udc",
|
||||
.id = 0,
|
||||
.dev = {
|
||||
.dma_mask = &msp_usbdev_dma_mask,
|
||||
.coherent_dma_mask = DMA_32BIT_MASK,
|
||||
.coherent_dma_mask = DMA_BIT_MASK(32),
|
||||
},
|
||||
.num_resources = ARRAY_SIZE(msp_usbdev_resources),
|
||||
.resource = msp_usbdev_resources,
|
||||
|
|
|
|||
|
|
@ -370,5 +370,3 @@ source "security/Kconfig"
|
|||
source "crypto/Kconfig"
|
||||
|
||||
source "lib/Kconfig"
|
||||
|
||||
source "arch/mn10300/oprofile/Kconfig"
|
||||
|
|
|
|||
|
|
@ -140,7 +140,7 @@ void __init init_IRQ(void)
|
|||
int irq;
|
||||
|
||||
for (irq = 0; irq < NR_IRQS; irq++)
|
||||
if (irq_desc[irq].chip == &no_irq_type)
|
||||
if (irq_desc[irq].chip == &no_irq_chip)
|
||||
/* due to the PIC latching interrupt requests, even
|
||||
* when the IRQ is disabled, IRQ_PENDING is superfluous
|
||||
* and we can use handle_level_irq() for edge-triggered
|
||||
|
|
|
|||
|
|
@ -1,23 +0,0 @@
|
|||
|
||||
menu "Profiling support"
|
||||
depends on EXPERIMENTAL
|
||||
|
||||
config PROFILING
|
||||
bool "Profiling support (EXPERIMENTAL)"
|
||||
help
|
||||
Say Y here to enable the extended profiling support mechanisms used
|
||||
by profilers such as OProfile.
|
||||
|
||||
|
||||
config OPROFILE
|
||||
tristate "OProfile system profiling (EXPERIMENTAL)"
|
||||
depends on PROFILING
|
||||
help
|
||||
OProfile is a profiling system capable of profiling the
|
||||
whole system, include the kernel, kernel modules, libraries,
|
||||
and applications.
|
||||
|
||||
If unsure, say N.
|
||||
|
||||
endmenu
|
||||
|
||||
|
|
@ -316,7 +316,7 @@ config ARCH_ENABLE_MEMORY_HOTREMOVE
|
|||
|
||||
config KEXEC
|
||||
bool "kexec system call (EXPERIMENTAL)"
|
||||
depends on BOOK3S && EXPERIMENTAL
|
||||
depends on PPC_BOOK3S && EXPERIMENTAL
|
||||
help
|
||||
kexec is a system call that implements the ability to shutdown your
|
||||
current kernel, and to start another kernel. It is like a reboot
|
||||
|
|
@ -775,6 +775,7 @@ config LOWMEM_CAM_NUM_BOOL
|
|||
Say N here unless you know what you are doing.
|
||||
|
||||
config LOWMEM_CAM_NUM
|
||||
depends on FSL_BOOKE
|
||||
int "Number of CAMs to use to map low memory" if LOWMEM_CAM_NUM_BOOL
|
||||
default 3
|
||||
|
||||
|
|
|
|||
|
|
@ -57,14 +57,14 @@
|
|||
bus-frequency = <0>; /* Fixed by bootwrapper */
|
||||
|
||||
memory-controller@2000 {
|
||||
compatible = "fsl,8540-memory-controller";
|
||||
compatible = "fsl,mpc8540-memory-controller";
|
||||
reg = <0x2000 0x1000>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <0x12 0x2>;
|
||||
};
|
||||
|
||||
L2: l2-cache-controller@20000 {
|
||||
compatible = "fsl,8540-l2-cache-controller";
|
||||
compatible = "fsl,mpc8540-l2-cache-controller";
|
||||
reg = <0x20000 0x1000>;
|
||||
cache-line-size = <0x20>; /* 32 bytes */
|
||||
cache-size = <0x40000>; /* L2, 256K */
|
||||
|
|
|
|||
Some files were not shown because too many files have changed in this diff Show more
Loading…
Reference in a new issue