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ARM: S5PV310: Add L2 cache init function in cpu.c

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This patch adds L2 cache initialization code in cpu.c of ARCH_S5PV310.
It includes TAG and Data latency, Prefetch, and Power configurations.

Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Changhwan Youn <chaos.youn@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This commit is contained in:
Kyungmin Park 2010-10-21 15:22:36 +09:00 committed by Kukjin Kim
parent 57c1f87136
commit 1cf0eb7997
1 changed files with 23 additions and 0 deletions
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23
arch/arm/mach-s5pv310/cpu.c
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@ -15,6 +15,7 @@
#include <asm/mach/irq.h>
#include <asm/proc-fns.h>
#include <asm/hardware/cache-l2x0.h>
#include <plat/cpu.h>
#include <plat/clock.h>
@ -148,6 +149,28 @@ static int __init s5pv310_core_init(void)
core_initcall(s5pv310_core_init);
#ifdef CONFIG_CACHE_L2X0
static int __init s5pv310_l2x0_cache_init(void)
{
/* TAG, Data Latency Control: 2cycle */
__raw_writel(0x110, S5P_VA_L2CC + L2X0_TAG_LATENCY_CTRL);
__raw_writel(0x110, S5P_VA_L2CC + L2X0_DATA_LATENCY_CTRL);
/* L2X0 Prefetch Control */
__raw_writel(0x30000007, S5P_VA_L2CC + L2X0_PREFETCH_CTRL);
/* L2X0 Power Control */
__raw_writel(L2X0_DYNAMIC_CLK_GATING_EN | L2X0_STNDBY_MODE_EN,
S5P_VA_L2CC + L2X0_POWER_CTRL);
l2x0_init(S5P_VA_L2CC, 0x7C070001, 0xC200ffff);
return 0;
}
early_initcall(s5pv310_l2x0_cache_init);
#endif
int __init s5pv310_init(void)
{
printk(KERN_INFO "S5PV310: Initializing architecture\n");