fsl_pq_mdio: Add Suport for etsec2.0 devices.
This patch adds mdio support for etsec2.0 devices. Modified the fsl_pq_mdio structure to include the new mdio members. Signed-off-by: Sandeep Gopalpet <Sandeep.Kumar@freescale.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -3,8 +3,9 @@
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* Provides Bus interface for MIIM regs
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*
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* Author: Andy Fleming <afleming@freescale.com>
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* Modifier: Sandeep Gopalpet <sandeep.kumar@freescale.com>
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*
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* Copyright (c) 2002-2004,2008 Freescale Semiconductor, Inc.
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* Copyright 2002-2004, 2008-2009 Freescale Semiconductor, Inc.
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*
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* Based on gianfar_mii.c and ucc_geth_mii.c (Li Yang, Kim Phillips)
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*
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@ -189,19 +190,29 @@ static int fsl_pq_mdio_find_free(struct mii_bus *new_bus)
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#if defined(CONFIG_GIANFAR) || defined(CONFIG_GIANFAR_MODULE)
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static u32 __iomem *get_gfar_tbipa(struct fsl_pq_mdio __iomem *regs)
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static u32 __iomem *get_gfar_tbipa(struct fsl_pq_mdio __iomem *regs, struct device_node *np)
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{
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struct gfar __iomem *enet_regs;
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u32 __iomem *ioremap_tbipa;
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u64 addr, size;
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/*
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* This is mildly evil, but so is our hardware for doing this.
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* Also, we have to cast back to struct gfar because of
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* definition weirdness done in gianfar.h.
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*/
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enet_regs = (struct gfar __iomem *)
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((char __iomem *)regs - offsetof(struct gfar, gfar_mii_regs));
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if(of_device_is_compatible(np, "fsl,gianfar-mdio") ||
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of_device_is_compatible(np, "fsl,gianfar-tbi") ||
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of_device_is_compatible(np, "gianfar")) {
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enet_regs = (struct gfar __iomem *)regs;
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return &enet_regs->tbipa;
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} else if (of_device_is_compatible(np, "fsl,etsec2-mdio") ||
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of_device_is_compatible(np, "fsl,etsec2-tbi")) {
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addr = of_translate_address(np, of_get_address(np, 1, &size, NULL));
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ioremap_tbipa = ioremap(addr, size);
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return ioremap_tbipa;
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} else
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return NULL;
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}
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#endif
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@ -250,11 +261,11 @@ static int fsl_pq_mdio_probe(struct of_device *ofdev,
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{
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struct device_node *np = ofdev->node;
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struct device_node *tbi;
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struct fsl_pq_mdio __iomem *regs;
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struct fsl_pq_mdio __iomem *regs = NULL;
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u32 __iomem *tbipa;
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struct mii_bus *new_bus;
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int tbiaddr = -1;
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u64 addr, size;
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u64 addr = 0, size = 0, ioremap_miimcfg = 0;
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int err = 0;
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new_bus = mdiobus_alloc();
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@ -268,8 +279,22 @@ static int fsl_pq_mdio_probe(struct of_device *ofdev,
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fsl_pq_mdio_bus_name(new_bus->id, np);
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/* Set the PHY base address */
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if (of_device_is_compatible(np,"fsl,gianfar-mdio") ||
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of_device_is_compatible(np, "fsl,gianfar-tbi") ||
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of_device_is_compatible(np, "fsl,ucc-mdio") ||
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of_device_is_compatible(np,"ucc_geth_phy" )) {
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addr = of_translate_address(np, of_get_address(np, 0, &size, NULL));
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ioremap_miimcfg = container_of(addr, struct fsl_pq_mdio, miimcfg);
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regs = ioremap(ioremap_miimcfg, size +
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offsetof(struct fsl_pq_mdio, miimcfg));
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} else if (of_device_is_compatible(np,"fsl,etsec2-mdio") ||
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of_device_is_compatible(np, "fsl,etsec2-tbi")) {
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addr = of_translate_address(np, of_get_address(np, 0, &size, NULL));
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regs = ioremap(addr, size);
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} else {
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err = -EINVAL;
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goto err_free_bus;
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}
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if (NULL == regs) {
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err = -ENOMEM;
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@ -290,9 +315,15 @@ static int fsl_pq_mdio_probe(struct of_device *ofdev,
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if (of_device_is_compatible(np, "fsl,gianfar-mdio") ||
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of_device_is_compatible(np, "fsl,gianfar-tbi") ||
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of_device_is_compatible(np, "fsl,etsec2-mdio") ||
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of_device_is_compatible(np, "fsl,etsec2-tbi") ||
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of_device_is_compatible(np, "gianfar")) {
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#if defined(CONFIG_GIANFAR) || defined(CONFIG_GIANFAR_MODULE)
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tbipa = get_gfar_tbipa(regs);
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tbipa = get_gfar_tbipa(regs, np);
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if (!tbipa) {
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err = -EINVAL;
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goto err_free_irqs;
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}
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#else
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err = -ENODEV;
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goto err_free_irqs;
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@ -405,6 +436,12 @@ static struct of_device_id fsl_pq_mdio_match[] = {
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{
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.compatible = "fsl,gianfar-mdio",
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},
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{
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.compatible = "fsl,etsec2-tbi",
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},
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{
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.compatible = "fsl,etsec2-mdio",
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},
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{},
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};
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MODULE_DEVICE_TABLE(of, fsl_pq_mdio_match);
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@ -3,8 +3,9 @@
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* Driver for the MDIO bus controller on Freescale PowerQUICC processors
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*
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* Author: Andy Fleming
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* Modifier: Sandeep Gopalpet
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*
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* Copyright (c) 2002-2004,2008 Freescale Semiconductor, Inc.
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* Copyright 2002-2004, 2008-2009 Freescale Semiconductor, Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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@ -23,6 +24,12 @@
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#define MII_READ_COMMAND 0x00000001
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struct fsl_pq_mdio {
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u8 res1[16];
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u32 ieventm; /* MDIO Interrupt event register (for etsec2)*/
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u32 imaskm; /* MDIO Interrupt mask register (for etsec2)*/
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u8 res2[4];
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u32 emapm; /* MDIO Event mapping register (for etsec2)*/
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u8 res3[1280];
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u32 miimcfg; /* MII management configuration reg */
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u32 miimcom; /* MII management command reg */
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u32 miimadd; /* MII management address reg */
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@ -31,9 +38,9 @@ struct fsl_pq_mdio {
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u32 miimind; /* MII management indication reg */
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u8 reserved[28]; /* Space holder */
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u32 utbipar; /* TBI phy address reg (only on UCC) */
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u8 res4[2728];
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} __attribute__ ((packed));
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int fsl_pq_mdio_read(struct mii_bus *bus, int mii_id, int regnum);
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int fsl_pq_mdio_write(struct mii_bus *bus, int mii_id, int regnum, u16 value);
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int fsl_pq_local_mdio_write(struct fsl_pq_mdio __iomem *regs, int mii_id,
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