sparc: sun4m SMP: fix wrong shift instruction in IPI handler
This shift instruction appears to be shifting in the wrong direction. Without this change, my SparcStation-20MP hangs just after bringing up the second CPU: Entering SMP Mode... Starting CPU 2 at f02b4e90 Brought up 2 CPUs Total of 2 processors activated (99.52 BogoMIPS). *** stuck *** Signed-off-by: Will Simoneau <simoneau@ele.uri.edu> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -293,7 +293,7 @@ maybe_smp4m_msg:
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WRITE_PAUSE
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wr %l4, PSR_ET, %psr
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WRITE_PAUSE
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sll %o3, 28, %o2 ! shift for simpler checks below
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srl %o3, 28, %o2 ! shift for simpler checks below
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maybe_smp4m_msg_check_single:
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andcc %o2, 0x1, %g0
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beq,a maybe_smp4m_msg_check_mask
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