drm/radeon/kms/atom: unify i2c gpio table handling
Split the quirks and i2c_rec assignment into separate functions used by both radeon_lookup_i2c_gpio() and radeon_atombios_i2c_init(). This avoids duplicating code and cases where quirks were only added to one of the functions. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: Jean Delvare <khali@linux-fr.org> Signed-off-by: Dave Airlie <airlied@redhat.com>
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@ -62,6 +62,87 @@ union atom_supported_devices {
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struct _ATOM_SUPPORTED_DEVICES_INFO_2d1 info_2d1;
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};
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static void radeon_lookup_i2c_gpio_quirks(struct radeon_device *rdev,
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ATOM_GPIO_I2C_ASSIGMENT *gpio,
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u8 index)
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{
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/* r4xx mask is technically not used by the hw, so patch in the legacy mask bits */
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if ((rdev->family == CHIP_R420) ||
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(rdev->family == CHIP_R423) ||
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(rdev->family == CHIP_RV410)) {
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if ((le16_to_cpu(gpio->usClkMaskRegisterIndex) == 0x0018) ||
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(le16_to_cpu(gpio->usClkMaskRegisterIndex) == 0x0019) ||
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(le16_to_cpu(gpio->usClkMaskRegisterIndex) == 0x001a)) {
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gpio->ucClkMaskShift = 0x19;
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gpio->ucDataMaskShift = 0x18;
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}
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}
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/* some evergreen boards have bad data for this entry */
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if (ASIC_IS_DCE4(rdev)) {
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if ((index == 7) &&
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(le16_to_cpu(gpio->usClkMaskRegisterIndex) == 0x1936) &&
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(gpio->sucI2cId.ucAccess == 0)) {
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gpio->sucI2cId.ucAccess = 0x97;
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gpio->ucDataMaskShift = 8;
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gpio->ucDataEnShift = 8;
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gpio->ucDataY_Shift = 8;
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gpio->ucDataA_Shift = 8;
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}
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}
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/* some DCE3 boards have bad data for this entry */
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if (ASIC_IS_DCE3(rdev)) {
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if ((index == 4) &&
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(le16_to_cpu(gpio->usClkMaskRegisterIndex) == 0x1fda) &&
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(gpio->sucI2cId.ucAccess == 0x94))
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gpio->sucI2cId.ucAccess = 0x14;
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}
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}
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static struct radeon_i2c_bus_rec radeon_get_bus_rec_for_i2c_gpio(ATOM_GPIO_I2C_ASSIGMENT *gpio)
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{
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struct radeon_i2c_bus_rec i2c;
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memset(&i2c, 0, sizeof(struct radeon_i2c_bus_rec));
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i2c.mask_clk_reg = le16_to_cpu(gpio->usClkMaskRegisterIndex) * 4;
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i2c.mask_data_reg = le16_to_cpu(gpio->usDataMaskRegisterIndex) * 4;
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i2c.en_clk_reg = le16_to_cpu(gpio->usClkEnRegisterIndex) * 4;
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i2c.en_data_reg = le16_to_cpu(gpio->usDataEnRegisterIndex) * 4;
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i2c.y_clk_reg = le16_to_cpu(gpio->usClkY_RegisterIndex) * 4;
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i2c.y_data_reg = le16_to_cpu(gpio->usDataY_RegisterIndex) * 4;
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i2c.a_clk_reg = le16_to_cpu(gpio->usClkA_RegisterIndex) * 4;
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i2c.a_data_reg = le16_to_cpu(gpio->usDataA_RegisterIndex) * 4;
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i2c.mask_clk_mask = (1 << gpio->ucClkMaskShift);
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i2c.mask_data_mask = (1 << gpio->ucDataMaskShift);
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i2c.en_clk_mask = (1 << gpio->ucClkEnShift);
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i2c.en_data_mask = (1 << gpio->ucDataEnShift);
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i2c.y_clk_mask = (1 << gpio->ucClkY_Shift);
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i2c.y_data_mask = (1 << gpio->ucDataY_Shift);
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i2c.a_clk_mask = (1 << gpio->ucClkA_Shift);
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i2c.a_data_mask = (1 << gpio->ucDataA_Shift);
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if (gpio->sucI2cId.sbfAccess.bfHW_Capable)
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i2c.hw_capable = true;
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else
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i2c.hw_capable = false;
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if (gpio->sucI2cId.ucAccess == 0xa0)
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i2c.mm_i2c = true;
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else
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i2c.mm_i2c = false;
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i2c.i2c_id = gpio->sucI2cId.ucAccess;
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if (i2c.mask_clk_reg)
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i2c.valid = true;
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else
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i2c.valid = false;
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return i2c;
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}
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static struct radeon_i2c_bus_rec radeon_lookup_i2c_gpio(struct radeon_device *rdev,
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uint8_t id)
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{
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@ -85,71 +166,10 @@ static struct radeon_i2c_bus_rec radeon_lookup_i2c_gpio(struct radeon_device *rd
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for (i = 0; i < num_indices; i++) {
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gpio = &i2c_info->asGPIO_Info[i];
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/* r4xx mask is technically not used by the hw, so patch in the legacy mask bits */
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if ((rdev->family == CHIP_R420) ||
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(rdev->family == CHIP_R423) ||
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(rdev->family == CHIP_RV410)) {
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if ((le16_to_cpu(gpio->usClkMaskRegisterIndex) == 0x0018) ||
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(le16_to_cpu(gpio->usClkMaskRegisterIndex) == 0x0019) ||
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(le16_to_cpu(gpio->usClkMaskRegisterIndex) == 0x001a)) {
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gpio->ucClkMaskShift = 0x19;
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gpio->ucDataMaskShift = 0x18;
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}
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}
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/* some evergreen boards have bad data for this entry */
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if (ASIC_IS_DCE4(rdev)) {
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if ((i == 7) &&
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(le16_to_cpu(gpio->usClkMaskRegisterIndex) == 0x1936) &&
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(gpio->sucI2cId.ucAccess == 0)) {
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gpio->sucI2cId.ucAccess = 0x97;
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gpio->ucDataMaskShift = 8;
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gpio->ucDataEnShift = 8;
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gpio->ucDataY_Shift = 8;
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gpio->ucDataA_Shift = 8;
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}
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}
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/* some DCE3 boards have bad data for this entry */
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if (ASIC_IS_DCE3(rdev)) {
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if ((i == 4) &&
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(le16_to_cpu(gpio->usClkMaskRegisterIndex) == 0x1fda) &&
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(gpio->sucI2cId.ucAccess == 0x94))
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gpio->sucI2cId.ucAccess = 0x14;
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}
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radeon_lookup_i2c_gpio_quirks(rdev, gpio, i);
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if (gpio->sucI2cId.ucAccess == id) {
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i2c.mask_clk_reg = le16_to_cpu(gpio->usClkMaskRegisterIndex) * 4;
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i2c.mask_data_reg = le16_to_cpu(gpio->usDataMaskRegisterIndex) * 4;
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i2c.en_clk_reg = le16_to_cpu(gpio->usClkEnRegisterIndex) * 4;
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i2c.en_data_reg = le16_to_cpu(gpio->usDataEnRegisterIndex) * 4;
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i2c.y_clk_reg = le16_to_cpu(gpio->usClkY_RegisterIndex) * 4;
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i2c.y_data_reg = le16_to_cpu(gpio->usDataY_RegisterIndex) * 4;
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i2c.a_clk_reg = le16_to_cpu(gpio->usClkA_RegisterIndex) * 4;
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i2c.a_data_reg = le16_to_cpu(gpio->usDataA_RegisterIndex) * 4;
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i2c.mask_clk_mask = (1 << gpio->ucClkMaskShift);
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i2c.mask_data_mask = (1 << gpio->ucDataMaskShift);
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i2c.en_clk_mask = (1 << gpio->ucClkEnShift);
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i2c.en_data_mask = (1 << gpio->ucDataEnShift);
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i2c.y_clk_mask = (1 << gpio->ucClkY_Shift);
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i2c.y_data_mask = (1 << gpio->ucDataY_Shift);
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i2c.a_clk_mask = (1 << gpio->ucClkA_Shift);
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i2c.a_data_mask = (1 << gpio->ucDataA_Shift);
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if (gpio->sucI2cId.sbfAccess.bfHW_Capable)
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i2c.hw_capable = true;
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else
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i2c.hw_capable = false;
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if (gpio->sucI2cId.ucAccess == 0xa0)
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i2c.mm_i2c = true;
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else
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i2c.mm_i2c = false;
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i2c.i2c_id = gpio->sucI2cId.ucAccess;
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if (i2c.mask_clk_reg)
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i2c.valid = true;
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i2c = radeon_get_bus_rec_for_i2c_gpio(gpio);
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break;
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}
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}
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@ -169,8 +189,6 @@ void radeon_atombios_i2c_init(struct radeon_device *rdev)
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int i, num_indices;
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char stmp[32];
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memset(&i2c, 0, sizeof(struct radeon_i2c_bus_rec));
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if (atom_parse_data_header(ctx, index, &size, NULL, NULL, &data_offset)) {
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i2c_info = (struct _ATOM_GPIO_I2C_INFO *)(ctx->bios + data_offset);
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@ -179,72 +197,12 @@ void radeon_atombios_i2c_init(struct radeon_device *rdev)
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for (i = 0; i < num_indices; i++) {
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gpio = &i2c_info->asGPIO_Info[i];
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i2c.valid = false;
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/* r4xx mask is technically not used by the hw, so patch in the legacy mask bits */
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if ((rdev->family == CHIP_R420) ||
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(rdev->family == CHIP_R423) ||
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(rdev->family == CHIP_RV410)) {
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if ((le16_to_cpu(gpio->usClkMaskRegisterIndex) == 0x0018) ||
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(le16_to_cpu(gpio->usClkMaskRegisterIndex) == 0x0019) ||
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(le16_to_cpu(gpio->usClkMaskRegisterIndex) == 0x001a)) {
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gpio->ucClkMaskShift = 0x19;
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gpio->ucDataMaskShift = 0x18;
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}
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}
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radeon_lookup_i2c_gpio_quirks(rdev, gpio, i);
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/* some evergreen boards have bad data for this entry */
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if (ASIC_IS_DCE4(rdev)) {
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if ((i == 7) &&
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(le16_to_cpu(gpio->usClkMaskRegisterIndex) == 0x1936) &&
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(gpio->sucI2cId.ucAccess == 0)) {
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gpio->sucI2cId.ucAccess = 0x97;
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gpio->ucDataMaskShift = 8;
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gpio->ucDataEnShift = 8;
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gpio->ucDataY_Shift = 8;
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gpio->ucDataA_Shift = 8;
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}
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}
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i2c = radeon_get_bus_rec_for_i2c_gpio(gpio);
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/* some DCE3 boards have bad data for this entry */
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if (ASIC_IS_DCE3(rdev)) {
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if ((i == 4) &&
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(le16_to_cpu(gpio->usClkMaskRegisterIndex) == 0x1fda) &&
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(gpio->sucI2cId.ucAccess == 0x94))
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gpio->sucI2cId.ucAccess = 0x14;
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}
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i2c.mask_clk_reg = le16_to_cpu(gpio->usClkMaskRegisterIndex) * 4;
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i2c.mask_data_reg = le16_to_cpu(gpio->usDataMaskRegisterIndex) * 4;
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i2c.en_clk_reg = le16_to_cpu(gpio->usClkEnRegisterIndex) * 4;
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i2c.en_data_reg = le16_to_cpu(gpio->usDataEnRegisterIndex) * 4;
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i2c.y_clk_reg = le16_to_cpu(gpio->usClkY_RegisterIndex) * 4;
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i2c.y_data_reg = le16_to_cpu(gpio->usDataY_RegisterIndex) * 4;
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i2c.a_clk_reg = le16_to_cpu(gpio->usClkA_RegisterIndex) * 4;
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i2c.a_data_reg = le16_to_cpu(gpio->usDataA_RegisterIndex) * 4;
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i2c.mask_clk_mask = (1 << gpio->ucClkMaskShift);
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i2c.mask_data_mask = (1 << gpio->ucDataMaskShift);
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i2c.en_clk_mask = (1 << gpio->ucClkEnShift);
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i2c.en_data_mask = (1 << gpio->ucDataEnShift);
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i2c.y_clk_mask = (1 << gpio->ucClkY_Shift);
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i2c.y_data_mask = (1 << gpio->ucDataY_Shift);
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i2c.a_clk_mask = (1 << gpio->ucClkA_Shift);
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i2c.a_data_mask = (1 << gpio->ucDataA_Shift);
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if (gpio->sucI2cId.sbfAccess.bfHW_Capable)
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i2c.hw_capable = true;
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else
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i2c.hw_capable = false;
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if (gpio->sucI2cId.ucAccess == 0xa0)
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i2c.mm_i2c = true;
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else
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i2c.mm_i2c = false;
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i2c.i2c_id = gpio->sucI2cId.ucAccess;
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if (i2c.mask_clk_reg) {
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i2c.valid = true;
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if (i2c.valid) {
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sprintf(stmp, "0x%x", i2c.i2c_id);
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rdev->i2c_bus[i] = radeon_i2c_create(rdev->ddev, &i2c, stmp);
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}
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