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MIPS: TXx9: Microoptimize interrupt handlers 

The IOC interrupt status register on RBTX49XX only have 8 bits.  Use
8-bit version of __fls() to optimize interrupt handlers.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
wifi-calibration
Atsushi Nemoto 2008-09-01 22:22:37 +09:00 committed by Ralf Baechle
parent f6d9831bb1
commit 21e77df215
3 changed files with 25 additions and 7 deletions
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6
arch/mips/txx9/rbtx4927/irq.c
View File

@ -133,9 +133,9 @@ static int toshiba_rbtx4927_irq_nested(int sw_irq)
u8 level3;
level3 = readb(rbtx4927_imstat_addr) & 0x1f;
if (level3)
sw_irq = RBTX4927_IRQ_IOC + fls(level3) - 1;
return sw_irq;
if (unlikely(!level3))
return -1;
return RBTX4927_IRQ_IOC + __fls8(level3);
}
static void __init toshiba_rbtx4927_irq_ioc_init(void)

8
arch/mips/txx9/rbtx4938/irq.c
View File

@ -85,10 +85,10 @@ static int toshiba_rbtx4938_irq_nested(int sw_irq)
u8 level3;
level3 = readb(rbtx4938_imstat_addr);
if (level3)
/* must use fls so onboard ATA has priority */
sw_irq = RBTX4938_IRQ_IOC + fls(level3) - 1;
return sw_irq;
if (unlikely(!level3))
return -1;
/* must use fls so onboard ATA has priority */
return RBTX4938_IRQ_IOC + __fls8(level3);
}
static void __init

18
include/asm-mips/txx9/generic.h
View File

@ -64,4 +64,22 @@ struct physmap_flash_data;
void txx9_physmap_flash_init(int no, unsigned long addr, unsigned long size,
const struct physmap_flash_data *pdata);
/* 8 bit version of __fls(): find first bit set (returns 0..7) */
static inline unsigned int __fls8(unsigned char x)
{
int r = 7;
if (!(x & 0xf0)) {
r -= 4;
x <<= 4;
}
if (!(x & 0xc0)) {
r -= 2;
x <<= 2;
}
if (!(x & 0x80))
r -= 1;
return r;
}
#endif /* __ASM_TXX9_GENERIC_H */