powerpc/booke64: Add LRAT error exception handler
LRAT (Logical to Real Address Translation) present in MMU v2 provides hardware translation from a logical page number (LPN) to a real page number (RPN) when tlbwe is executed by a guest or when a page table translation occurs from a guest virtual address. Add LRAT error exception handler to Booke3E 64-bit kernel and the basic KVM handler to avoid build breakage. This is a prerequisite for KVM LRAT support that will follow. Signed-off-by: Mihai Caraman <mihai.caraman@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
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@ -74,6 +74,7 @@
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#define BOOKE_INTERRUPT_GUEST_DBELL_CRIT 39
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#define BOOKE_INTERRUPT_HV_SYSCALL 40
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#define BOOKE_INTERRUPT_HV_PRIV 41
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#define BOOKE_INTERRUPT_LRAT_ERROR 42
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/* book3s */
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@ -101,6 +101,7 @@
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#define SPRN_IVOR39 0x1B1 /* Interrupt Vector Offset Register 39 */
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#define SPRN_IVOR40 0x1B2 /* Interrupt Vector Offset Register 40 */
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#define SPRN_IVOR41 0x1B3 /* Interrupt Vector Offset Register 41 */
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#define SPRN_IVOR42 0x1B4 /* Interrupt Vector Offset Register 42 */
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#define SPRN_GIVOR2 0x1B8 /* Guest IVOR2 */
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#define SPRN_GIVOR3 0x1B9 /* Guest IVOR3 */
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#define SPRN_GIVOR4 0x1BA /* Guest IVOR4 */
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@ -57,6 +57,12 @@ _GLOBAL(__setup_cpu_e6500)
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mflr r6
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#ifdef CONFIG_PPC64
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bl .setup_altivec_ivors
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/* Touch IVOR42 only if the CPU supports E.HV category */
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mfspr r10,SPRN_MMUCFG
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rlwinm. r10,r10,0,MMUCFG_LPIDSIZE
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beq 1f
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bl .setup_lrat_ivor
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1:
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#endif
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bl __setup_cpu_e5500
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mtlr r6
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@ -119,6 +125,12 @@ _GLOBAL(__setup_cpu_e5500)
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_GLOBAL(__restore_cpu_e6500)
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mflr r5
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bl .setup_altivec_ivors
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/* Touch IVOR42 only if the CPU supports E.HV category */
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mfspr r10,SPRN_MMUCFG
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rlwinm. r10,r10,0,MMUCFG_LPIDSIZE
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beq 1f
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bl .setup_lrat_ivor
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1:
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bl __restore_cpu_e5500
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mtlr r5
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blr
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@ -308,6 +308,7 @@ interrupt_base_book3e: /* fake trap */
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EXCEPTION_STUB(0x2e0, guest_doorbell_crit)
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EXCEPTION_STUB(0x300, hypercall)
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EXCEPTION_STUB(0x320, ehpriv)
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EXCEPTION_STUB(0x340, lrat_error)
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.globl interrupt_end_book3e
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interrupt_end_book3e:
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@ -677,6 +678,17 @@ kernel_dbg_exc:
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bl .unknown_exception
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b .ret_from_except
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/* LRAT Error interrupt */
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START_EXCEPTION(lrat_error);
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NORMAL_EXCEPTION_PROLOG(0x340, BOOKE_INTERRUPT_LRAT_ERROR,
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PROLOG_ADDITION_NONE)
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EXCEPTION_COMMON(0x340, PACA_EXGEN, INTS_KEEP)
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addi r3,r1,STACK_FRAME_OVERHEAD
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bl .save_nvgprs
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INTS_RESTORE_HARD
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bl .unknown_exception
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b .ret_from_except
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/*
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* An interrupt came in while soft-disabled; We mark paca->irq_happened
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* accordingly and if the interrupt is level sensitive, we hard disable
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@ -859,6 +871,7 @@ BAD_STACK_TRAMPOLINE(0x2e0)
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BAD_STACK_TRAMPOLINE(0x300)
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BAD_STACK_TRAMPOLINE(0x310)
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BAD_STACK_TRAMPOLINE(0x320)
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BAD_STACK_TRAMPOLINE(0x340)
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BAD_STACK_TRAMPOLINE(0x400)
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BAD_STACK_TRAMPOLINE(0x500)
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BAD_STACK_TRAMPOLINE(0x600)
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@ -1414,3 +1427,7 @@ _GLOBAL(setup_ehv_ivors)
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SET_IVOR(38, 0x2c0) /* Guest Processor Doorbell */
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SET_IVOR(39, 0x2e0) /* Guest Processor Doorbell Crit/MC */
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blr
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_GLOBAL(setup_lrat_ivor)
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SET_IVOR(42, 0x340) /* LRAT Error */
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blr
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@ -319,6 +319,8 @@ kvm_handler BOOKE_INTERRUPT_DEBUG, EX_PARAMS(DBG), \
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SPRN_DSRR0, SPRN_DSRR1, 0
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kvm_handler BOOKE_INTERRUPT_DEBUG, EX_PARAMS(CRIT), \
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SPRN_CSRR0, SPRN_CSRR1, 0
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kvm_handler BOOKE_INTERRUPT_LRAT_ERROR, EX_PARAMS(GEN), \
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SPRN_SRR0, SPRN_SRR1, (NEED_EMU | NEED_DEAR | NEED_ESR)
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#else
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/*
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* For input register values, see arch/powerpc/include/asm/kvm_booke_hv_asm.h
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