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powerpc/44x: Enable DYNAMIC_MEMSTART for 440x

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DYNAMIC_MEMSTART(old RELOCATABLE) was restricted only to PPC_47x variants
of 44x. This patch enables DYNAMIC_MEMSTART for 440x based chipsets.

Signed-off-by: Suzuki K. Poulose <suzuki@in.ibm.com>
Cc: Josh Boyer <jwboyer@gmail.com>
Cc: Kumar Gala <galak@kernel.crashing.org>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: linux ppc dev <linuxppc-dev@lists.ozlabs.org>
Signed-off-by: Josh Boyer <jwboyer@gmail.com>
This commit is contained in:
Suzuki Poulose 2011-12-14 22:57:57 +00:00 committed by Josh Boyer
parent 0f890c8d20
commit 2391324545
2 changed files with 13 additions and 1 deletions
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2
arch/powerpc/Kconfig
View file

@ -833,7 +833,7 @@ config LOWMEM_CAM_NUM
config DYNAMIC_MEMSTART
bool "Enable page aligned dynamic load address for kernel (EXPERIMENTAL)"
depends on EXPERIMENTAL && ADVANCED_OPTIONS && FLATMEM && (FSL_BOOKE || PPC_47x)
depends on EXPERIMENTAL && ADVANCED_OPTIONS && FLATMEM && (FSL_BOOKE || 44x)
select NONSTATIC_KERNEL
help
This option enables the kernel to be loaded at any page aligned

12
arch/powerpc/kernel/head_44x.S
View file

@ -804,12 +804,24 @@ skpinv: addi r4,r4,1 /* Increment */
/*
* Configure and load pinned entry into TLB slot 63.
*/
#ifdef CONFIG_DYNAMIC_MEMSTART
/* Read the XLAT entry for our current mapping */
tlbre r25,r23,PPC44x_TLB_XLAT
lis r3,KERNELBASE@h
ori r3,r3,KERNELBASE@l
/* Use our current RPN entry */
mr r4,r25
#else
lis r3,PAGE_OFFSET@h
ori r3,r3,PAGE_OFFSET@l
/* Kernel is at the base of RAM */
li r4, 0 /* Load the kernel physical address */
#endif
/* Load the kernel PID = 0 */
li r0,0