irq_domain/microblaze: Convert microblaze to use irq_domains
This patch converts Microblaze to use the irq_domain remapper and get away from hard coding the offset between hwirq number and the linux irq number space. This also paves the way for multiple interrupt controllers. v2: Don't enable SPARSE_IRQ and keep NR_IRQS set to 33 Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Michal Simek <monstr@monstr.eu> Cc: Rob Herring <rob.herring@calxeda.com> Cc: John Williams <john.williams@petalogix.com> Cc: John Linn <john.linn@xilinx.com>5bit-waveforms
Grant Likely
parent
ff8c3ab816
commit
2462bacd03
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@ -14,6 +14,7 @@ config MICROBLAZE
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select TRACING_SUPPORT
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select OF
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select OF_EARLY_FLATTREE
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select IRQ_DOMAIN
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select HAVE_GENERIC_HARDIRQS
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select GENERIC_IRQ_PROBE
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select GENERIC_IRQ_SHOW
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@ -1,17 +1 @@
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/*
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* Copyright (C) 2006 Atmark Techno, Inc.
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#ifndef _ASM_MICROBLAZE_HARDIRQ_H
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#define _ASM_MICROBLAZE_HARDIRQ_H
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/* should be defined in each interrupt controller driver */
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extern unsigned int get_irq(struct pt_regs *regs);
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#include <asm-generic/hardirq.h>
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#endif /* _ASM_MICROBLAZE_HARDIRQ_H */
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@ -9,49 +9,13 @@
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#ifndef _ASM_MICROBLAZE_IRQ_H
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#define _ASM_MICROBLAZE_IRQ_H
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/*
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* Linux IRQ# is currently offset by one to map to the hardware
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* irq number. So hardware IRQ0 maps to Linux irq 1.
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*/
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#define NO_IRQ_OFFSET 1
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#define IRQ_OFFSET NO_IRQ_OFFSET
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#define NR_IRQS (32 + IRQ_OFFSET)
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#define NR_IRQS (32 + 1)
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#include <asm-generic/irq.h>
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/* This type is the placeholder for a hardware interrupt number. It has to
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* be big enough to enclose whatever representation is used by a given
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* platform.
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*/
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typedef unsigned long irq_hw_number_t;
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extern unsigned int nr_irq;
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struct pt_regs;
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extern void do_IRQ(struct pt_regs *regs);
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/** FIXME - not implement
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* irq_dispose_mapping - Unmap an interrupt
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* @virq: linux virq number of the interrupt to unmap
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*/
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static inline void irq_dispose_mapping(unsigned int virq)
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{
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return;
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}
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struct irq_domain;
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/**
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* irq_create_mapping - Map a hardware interrupt into linux virq space
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* @host: host owning this hardware interrupt or NULL for default host
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* @hwirq: hardware irq number in that host space
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*
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* Only one mapping per hardware interrupt is permitted. Returns a linux
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* virq number.
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* If the sense/trigger is to be specified, set_irq_type() should be called
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* on the number returned from that call.
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*/
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extern unsigned int irq_create_mapping(struct irq_domain *host,
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irq_hw_number_t hwirq);
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/* should be defined in each interrupt controller driver */
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extern unsigned int get_irq(void);
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#endif /* _ASM_MICROBLAZE_IRQ_H */
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@ -9,6 +9,7 @@
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*/
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#include <linux/init.h>
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#include <linux/irqdomain.h>
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#include <linux/irq.h>
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#include <asm/page.h>
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#include <linux/io.h>
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@ -25,8 +26,6 @@ static unsigned int intc_baseaddr;
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#define INTC_BASE intc_baseaddr
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#endif
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unsigned int nr_irq;
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/* No one else should require these constants, so define them locally here. */
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#define ISR 0x00 /* Interrupt Status Register */
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#define IPR 0x04 /* Interrupt Pending Register */
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@ -84,24 +83,45 @@ static struct irq_chip intc_dev = {
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.irq_mask_ack = intc_mask_ack,
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};
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unsigned int get_irq(struct pt_regs *regs)
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{
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int irq;
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static struct irq_domain *root_domain;
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/*
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* NOTE: This function is the one that needs to be improved in
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* order to handle multiple interrupt controllers. It currently
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* is hardcoded to check for interrupts only on the first INTC.
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*/
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irq = in_be32(INTC_BASE + IVR) + NO_IRQ_OFFSET;
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pr_debug("get_irq: %d\n", irq);
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unsigned int get_irq(void)
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{
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unsigned int hwirq, irq = -1;
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hwirq = in_be32(INTC_BASE + IVR);
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if (hwirq != -1U)
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irq = irq_find_mapping(root_domain, hwirq);
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pr_debug("get_irq: hwirq=%d, irq=%d\n", hwirq, irq);
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return irq;
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}
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int xintc_map(struct irq_domain *d, unsigned int irq, irq_hw_number_t hw)
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{
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u32 intr_mask = (u32)d->host_data;
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if (intr_mask & (1 << hw)) {
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irq_set_chip_and_handler_name(irq, &intc_dev,
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handle_edge_irq, "edge");
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irq_clear_status_flags(irq, IRQ_LEVEL);
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} else {
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irq_set_chip_and_handler_name(irq, &intc_dev,
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handle_level_irq, "level");
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irq_set_status_flags(irq, IRQ_LEVEL);
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}
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return 0;
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}
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static const struct irq_domain_ops xintc_irq_domain_ops = {
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.xlate = irq_domain_xlate_onetwocell,
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.map = xintc_map,
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};
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void __init init_IRQ(void)
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{
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u32 i, intr_mask;
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u32 nr_irq, intr_mask;
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struct device_node *intc = NULL;
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#ifdef CONFIG_SELFMOD_INTC
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unsigned int intc_baseaddr = 0;
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@ -146,16 +166,9 @@ void __init init_IRQ(void)
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/* Turn on the Master Enable. */
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out_be32(intc_baseaddr + MER, MER_HIE | MER_ME);
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for (i = IRQ_OFFSET; i < (nr_irq + IRQ_OFFSET); ++i) {
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if (intr_mask & (0x00000001 << (i - IRQ_OFFSET))) {
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irq_set_chip_and_handler_name(i, &intc_dev,
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handle_edge_irq, "edge");
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irq_clear_status_flags(i, IRQ_LEVEL);
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} else {
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irq_set_chip_and_handler_name(i, &intc_dev,
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handle_level_irq, "level");
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irq_set_status_flags(i, IRQ_LEVEL);
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}
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irq_get_irq_data(i)->hwirq = i - IRQ_OFFSET;
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}
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/* Yeah, okay, casting the intr_mask to a void* is butt-ugly, but I'm
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* lazy and Michal can clean it up to something nicer when he tests
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* and commits this patch. ~~gcl */
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root_domain = irq_domain_add_linear(intc, nr_irq, &xintc_irq_domain_ops,
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(void *)intr_mask);
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}
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@ -31,14 +31,13 @@ void __irq_entry do_IRQ(struct pt_regs *regs)
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trace_hardirqs_off();
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irq_enter();
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irq = get_irq(regs);
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irq = get_irq();
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next_irq:
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BUG_ON(!irq);
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/* Substract 1 because of get_irq */
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generic_handle_irq(irq + IRQ_OFFSET - NO_IRQ_OFFSET);
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generic_handle_irq(irq);
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irq = get_irq(regs);
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if (irq) {
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irq = get_irq();
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if (irq != -1U) {
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pr_debug("next irq: %d\n", irq);
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++concurrent_irq;
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goto next_irq;
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@ -48,18 +47,3 @@ next_irq:
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set_irq_regs(old_regs);
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trace_hardirqs_on();
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}
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/* MS: There is no any advance mapping mechanism. We are using simple 32bit
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intc without any cascades or any connection that's why mapping is 1:1 */
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unsigned int irq_create_mapping(struct irq_domain *host, irq_hw_number_t hwirq)
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{
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return hwirq + IRQ_OFFSET;
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}
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EXPORT_SYMBOL_GPL(irq_create_mapping);
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unsigned int irq_create_of_mapping(struct device_node *controller,
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const u32 *intspec, unsigned int intsize)
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{
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return intspec[0] + IRQ_OFFSET;
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}
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EXPORT_SYMBOL_GPL(irq_create_of_mapping);
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