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usb: dwc3: core: fix cached revision on our structure

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All our revision macros are defined with the entire
32-bits which we read from GSNPSID register, so we
must cache all 32-bits properly rather than masking
the top 16-bits.

This will fix all revision checks we have on current
driver.

Signed-off-by: Felipe Balbi <balbi@ti.com>
This commit is contained in:
Felipe Balbi 2011-12-14 21:59:30 +02:00
parent ccc080c77c
commit 248b122b13
1 changed files with 1 additions and 1 deletions
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2
drivers/usb/dwc3/core.c
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@ -264,7 +264,7 @@ static int __devinit dwc3_core_init(struct dwc3 *dwc)
ret = -ENODEV;
goto err0;
}
dwc->revision = reg & DWC3_GSNPSREV_MASK;
dwc->revision = reg;
dwc3_core_soft_reset(dwc);