Merge git://www.linux-watchdog.org/linux-watchdog
Pull watchdog updates from Wim Van Sebroeck: - New watchdog driver for Allwinner A10/A13 - some devm_ioremap_resource simplifications - a s3c2410_wdt change that removes the global variables * git://www.linux-watchdog.org/linux-watchdog: watchdog: s3c2410_wdt: simplify use of devm_ioremap_resource watchdog: simplify platform_get_resource_byname/devm_ioremap_resource watchdog: ts72xx_wdt: simplify use of devm_ioremap_resource watchdog: nuc900_wdt.c: simplify use of devm_ioremap_resource watchdog: sunxi: New watchdog driver for Allwinner A10/A13 watchdog: s3c2410_wdt: remove the global variableswifi-calibration
Linus Torvalds
commit
24ba40588f
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@ -290,6 +290,16 @@ config ORION_WATCHDOG
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To compile this driver as a module, choose M here: the
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module will be called orion_wdt.
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config SUNXI_WATCHDOG
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tristate "Allwinner SoCs watchdog support"
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depends on ARCH_SUNXI
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select WATCHDOG_CORE
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help
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Say Y here to include support for the watchdog timer
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in Allwinner SoCs.
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To compile this driver as a module, choose M here: the
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module will be called sunxi_wdt.
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config COH901327_WATCHDOG
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bool "ST-Ericsson COH 901 327 watchdog"
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depends on ARCH_U300
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@ -46,6 +46,7 @@ obj-$(CONFIG_PNX4008_WATCHDOG) += pnx4008_wdt.o
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obj-$(CONFIG_IOP_WATCHDOG) += iop_wdt.o
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obj-$(CONFIG_DAVINCI_WATCHDOG) += davinci_wdt.o
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obj-$(CONFIG_ORION_WATCHDOG) += orion_wdt.o
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obj-$(CONFIG_SUNXI_WATCHDOG) += sunxi_wdt.o
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obj-$(CONFIG_COH901327_WATCHDOG) += coh901327_wdt.o
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obj-$(CONFIG_STMP3XXX_RTC_WATCHDOG) += stmp3xxx_rtc_wdt.o
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obj-$(CONFIG_NUC900_WATCHDOG) += nuc900_wdt.o
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@ -280,11 +280,6 @@ static int ar7_wdt_probe(struct platform_device *pdev)
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ar7_regs_wdt =
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platform_get_resource_byname(pdev, IORESOURCE_MEM, "regs");
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if (!ar7_regs_wdt) {
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pr_err("could not get registers resource\n");
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return -ENODEV;
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}
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ar7_wdt = devm_ioremap_resource(&pdev->dev, ar7_regs_wdt);
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if (IS_ERR(ar7_wdt))
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return PTR_ERR(ar7_wdt);
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@ -256,11 +256,6 @@ static int nuc900wdt_probe(struct platform_device *pdev)
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spin_lock_init(&nuc900_wdt->wdt_lock);
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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if (res == NULL) {
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dev_err(&pdev->dev, "no memory resource specified\n");
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return -ENOENT;
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}
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nuc900_wdt->wdt_base = devm_ioremap_resource(&pdev->dev, res);
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if (IS_ERR(nuc900_wdt->wdt_base))
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return PTR_ERR(nuc900_wdt->wdt_base);
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@ -84,13 +84,17 @@ MODULE_PARM_DESC(soft_noboot, "Watchdog action, set to 1 to ignore reboots, "
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"0 to reboot (default 0)");
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MODULE_PARM_DESC(debug, "Watchdog debug, set to >1 for debug (default 0)");
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static struct device *wdt_dev; /* platform device attached to */
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static struct resource *wdt_mem;
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static struct resource *wdt_irq;
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static struct clk *wdt_clock;
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static void __iomem *wdt_base;
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static unsigned int wdt_count;
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static DEFINE_SPINLOCK(wdt_lock);
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struct s3c2410_wdt {
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struct device *dev;
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struct clk *clock;
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void __iomem *reg_base;
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unsigned int count;
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spinlock_t lock;
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unsigned long wtcon_save;
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unsigned long wtdat_save;
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struct watchdog_device wdt_device;
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struct notifier_block freq_transition;
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};
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/* watchdog control routines */
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@ -102,29 +106,38 @@ do { \
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/* functions */
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static inline struct s3c2410_wdt *freq_to_wdt(struct notifier_block *nb)
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{
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return container_of(nb, struct s3c2410_wdt, freq_transition);
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}
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static int s3c2410wdt_keepalive(struct watchdog_device *wdd)
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{
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spin_lock(&wdt_lock);
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writel(wdt_count, wdt_base + S3C2410_WTCNT);
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spin_unlock(&wdt_lock);
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struct s3c2410_wdt *wdt = watchdog_get_drvdata(wdd);
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spin_lock(&wdt->lock);
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writel(wdt->count, wdt->reg_base + S3C2410_WTCNT);
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spin_unlock(&wdt->lock);
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return 0;
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}
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static void __s3c2410wdt_stop(void)
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static void __s3c2410wdt_stop(struct s3c2410_wdt *wdt)
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{
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unsigned long wtcon;
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wtcon = readl(wdt_base + S3C2410_WTCON);
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wtcon = readl(wdt->reg_base + S3C2410_WTCON);
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wtcon &= ~(S3C2410_WTCON_ENABLE | S3C2410_WTCON_RSTEN);
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writel(wtcon, wdt_base + S3C2410_WTCON);
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writel(wtcon, wdt->reg_base + S3C2410_WTCON);
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}
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static int s3c2410wdt_stop(struct watchdog_device *wdd)
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{
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spin_lock(&wdt_lock);
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__s3c2410wdt_stop();
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spin_unlock(&wdt_lock);
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struct s3c2410_wdt *wdt = watchdog_get_drvdata(wdd);
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spin_lock(&wdt->lock);
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__s3c2410wdt_stop(wdt);
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spin_unlock(&wdt->lock);
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return 0;
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}
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@ -132,12 +145,13 @@ static int s3c2410wdt_stop(struct watchdog_device *wdd)
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static int s3c2410wdt_start(struct watchdog_device *wdd)
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{
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unsigned long wtcon;
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struct s3c2410_wdt *wdt = watchdog_get_drvdata(wdd);
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spin_lock(&wdt_lock);
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spin_lock(&wdt->lock);
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__s3c2410wdt_stop();
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__s3c2410wdt_stop(wdt);
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wtcon = readl(wdt_base + S3C2410_WTCON);
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wtcon = readl(wdt->reg_base + S3C2410_WTCON);
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wtcon |= S3C2410_WTCON_ENABLE | S3C2410_WTCON_DIV128;
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if (soft_noboot) {
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@ -148,25 +162,26 @@ static int s3c2410wdt_start(struct watchdog_device *wdd)
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wtcon |= S3C2410_WTCON_RSTEN;
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}
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DBG("%s: wdt_count=0x%08x, wtcon=%08lx\n",
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__func__, wdt_count, wtcon);
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DBG("%s: count=0x%08x, wtcon=%08lx\n",
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__func__, wdt->count, wtcon);
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writel(wdt_count, wdt_base + S3C2410_WTDAT);
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writel(wdt_count, wdt_base + S3C2410_WTCNT);
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writel(wtcon, wdt_base + S3C2410_WTCON);
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spin_unlock(&wdt_lock);
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writel(wdt->count, wdt->reg_base + S3C2410_WTDAT);
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writel(wdt->count, wdt->reg_base + S3C2410_WTCNT);
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writel(wtcon, wdt->reg_base + S3C2410_WTCON);
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spin_unlock(&wdt->lock);
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return 0;
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}
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static inline int s3c2410wdt_is_running(void)
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static inline int s3c2410wdt_is_running(struct s3c2410_wdt *wdt)
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{
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return readl(wdt_base + S3C2410_WTCON) & S3C2410_WTCON_ENABLE;
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return readl(wdt->reg_base + S3C2410_WTCON) & S3C2410_WTCON_ENABLE;
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}
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static int s3c2410wdt_set_heartbeat(struct watchdog_device *wdd, unsigned timeout)
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{
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unsigned long freq = clk_get_rate(wdt_clock);
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struct s3c2410_wdt *wdt = watchdog_get_drvdata(wdd);
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unsigned long freq = clk_get_rate(wdt->clock);
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unsigned int count;
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unsigned int divisor = 1;
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unsigned long wtcon;
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@ -192,7 +207,7 @@ static int s3c2410wdt_set_heartbeat(struct watchdog_device *wdd, unsigned timeou
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}
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if ((count / divisor) >= 0x10000) {
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dev_err(wdt_dev, "timeout %d too big\n", timeout);
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dev_err(wdt->dev, "timeout %d too big\n", timeout);
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return -EINVAL;
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}
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}
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@ -201,15 +216,15 @@ static int s3c2410wdt_set_heartbeat(struct watchdog_device *wdd, unsigned timeou
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__func__, timeout, divisor, count, count/divisor);
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count /= divisor;
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wdt_count = count;
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wdt->count = count;
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/* update the pre-scaler */
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wtcon = readl(wdt_base + S3C2410_WTCON);
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wtcon = readl(wdt->reg_base + S3C2410_WTCON);
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wtcon &= ~S3C2410_WTCON_PRESCALE_MASK;
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wtcon |= S3C2410_WTCON_PRESCALE(divisor-1);
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writel(count, wdt_base + S3C2410_WTDAT);
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writel(wtcon, wdt_base + S3C2410_WTCON);
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writel(count, wdt->reg_base + S3C2410_WTDAT);
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writel(wtcon, wdt->reg_base + S3C2410_WTCON);
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wdd->timeout = (count * divisor) / freq;
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@ -242,21 +257,23 @@ static struct watchdog_device s3c2410_wdd = {
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static irqreturn_t s3c2410wdt_irq(int irqno, void *param)
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{
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dev_info(wdt_dev, "watchdog timer expired (irq)\n");
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struct s3c2410_wdt *wdt = platform_get_drvdata(param);
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s3c2410wdt_keepalive(&s3c2410_wdd);
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dev_info(wdt->dev, "watchdog timer expired (irq)\n");
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s3c2410wdt_keepalive(&wdt->wdt_device);
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return IRQ_HANDLED;
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}
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#ifdef CONFIG_CPU_FREQ
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static int s3c2410wdt_cpufreq_transition(struct notifier_block *nb,
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unsigned long val, void *data)
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{
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int ret;
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struct s3c2410_wdt *wdt = freq_to_wdt(nb);
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if (!s3c2410wdt_is_running())
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if (!s3c2410wdt_is_running(wdt))
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goto done;
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if (val == CPUFREQ_PRECHANGE) {
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@ -265,14 +282,15 @@ static int s3c2410wdt_cpufreq_transition(struct notifier_block *nb,
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* the watchdog is running.
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*/
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s3c2410wdt_keepalive(&s3c2410_wdd);
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s3c2410wdt_keepalive(&wdt->wdt_device);
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} else if (val == CPUFREQ_POSTCHANGE) {
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s3c2410wdt_stop(&s3c2410_wdd);
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s3c2410wdt_stop(&wdt->wdt_device);
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ret = s3c2410wdt_set_heartbeat(&s3c2410_wdd, s3c2410_wdd.timeout);
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ret = s3c2410wdt_set_heartbeat(&wdt->wdt_device,
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wdt->wdt_device.timeout);
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if (ret >= 0)
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s3c2410wdt_start(&s3c2410_wdd);
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s3c2410wdt_start(&wdt->wdt_device);
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else
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goto err;
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}
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@ -281,34 +299,35 @@ done:
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return 0;
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err:
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dev_err(wdt_dev, "cannot set new value for timeout %d\n",
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s3c2410_wdd.timeout);
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dev_err(wdt->dev, "cannot set new value for timeout %d\n",
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wdt->wdt_device.timeout);
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return ret;
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}
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static struct notifier_block s3c2410wdt_cpufreq_transition_nb = {
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.notifier_call = s3c2410wdt_cpufreq_transition,
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};
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static inline int s3c2410wdt_cpufreq_register(void)
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static inline int s3c2410wdt_cpufreq_register(struct s3c2410_wdt *wdt)
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{
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return cpufreq_register_notifier(&s3c2410wdt_cpufreq_transition_nb,
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wdt->freq_transition.notifier_call = s3c2410wdt_cpufreq_transition;
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return cpufreq_register_notifier(&wdt->freq_transition,
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CPUFREQ_TRANSITION_NOTIFIER);
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}
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static inline void s3c2410wdt_cpufreq_deregister(void)
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static inline void s3c2410wdt_cpufreq_deregister(struct s3c2410_wdt *wdt)
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{
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cpufreq_unregister_notifier(&s3c2410wdt_cpufreq_transition_nb,
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wdt->freq_transition.notifier_call = s3c2410wdt_cpufreq_transition;
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cpufreq_unregister_notifier(&wdt->freq_transition,
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CPUFREQ_TRANSITION_NOTIFIER);
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}
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#else
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static inline int s3c2410wdt_cpufreq_register(void)
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static inline int s3c2410wdt_cpufreq_register(struct s3c2410_wdt *wdt)
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{
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return 0;
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}
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static inline void s3c2410wdt_cpufreq_deregister(void)
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static inline void s3c2410wdt_cpufreq_deregister(struct s3c2410_wdt *wdt)
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{
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}
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#endif
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@ -316,6 +335,9 @@ static inline void s3c2410wdt_cpufreq_deregister(void)
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static int s3c2410wdt_probe(struct platform_device *pdev)
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{
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struct device *dev;
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struct s3c2410_wdt *wdt;
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struct resource *wdt_mem;
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struct resource *wdt_irq;
|
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unsigned int wtcon;
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int started = 0;
|
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int ret;
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|
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@ -323,13 +345,14 @@ static int s3c2410wdt_probe(struct platform_device *pdev)
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DBG("%s: probe=%p\n", __func__, pdev);
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dev = &pdev->dev;
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wdt_dev = &pdev->dev;
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wdt_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||||
if (wdt_mem == NULL) {
|
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dev_err(dev, "no memory resource specified\n");
|
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return -ENOENT;
|
||||
}
|
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wdt = devm_kzalloc(dev, sizeof(*wdt), GFP_KERNEL);
|
||||
if (!wdt)
|
||||
return -ENOMEM;
|
||||
|
||||
wdt->dev = &pdev->dev;
|
||||
spin_lock_init(&wdt->lock);
|
||||
wdt->wdt_device = s3c2410_wdd;
|
||||
|
||||
wdt_irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
|
||||
if (wdt_irq == NULL) {
|
||||
|
|
@ -339,35 +362,40 @@ static int s3c2410wdt_probe(struct platform_device *pdev)
|
|||
}
|
||||
|
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/* get the memory region for the watchdog timer */
|
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wdt_base = devm_ioremap_resource(dev, wdt_mem);
|
||||
if (IS_ERR(wdt_base)) {
|
||||
ret = PTR_ERR(wdt_base);
|
||||
wdt_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||||
wdt->reg_base = devm_ioremap_resource(dev, wdt_mem);
|
||||
if (IS_ERR(wdt->reg_base)) {
|
||||
ret = PTR_ERR(wdt->reg_base);
|
||||
goto err;
|
||||
}
|
||||
|
||||
DBG("probe: mapped wdt_base=%p\n", wdt_base);
|
||||
DBG("probe: mapped reg_base=%p\n", wdt->reg_base);
|
||||
|
||||
wdt_clock = devm_clk_get(dev, "watchdog");
|
||||
if (IS_ERR(wdt_clock)) {
|
||||
wdt->clock = devm_clk_get(dev, "watchdog");
|
||||
if (IS_ERR(wdt->clock)) {
|
||||
dev_err(dev, "failed to find watchdog clock source\n");
|
||||
ret = PTR_ERR(wdt_clock);
|
||||
ret = PTR_ERR(wdt->clock);
|
||||
goto err;
|
||||
}
|
||||
|
||||
clk_prepare_enable(wdt_clock);
|
||||
clk_prepare_enable(wdt->clock);
|
||||
|
||||
ret = s3c2410wdt_cpufreq_register();
|
||||
ret = s3c2410wdt_cpufreq_register(wdt);
|
||||
if (ret < 0) {
|
||||
dev_err(dev, "failed to register cpufreq\n");
|
||||
goto err_clk;
|
||||
}
|
||||
|
||||
watchdog_set_drvdata(&wdt->wdt_device, wdt);
|
||||
|
||||
/* see if we can actually set the requested timer margin, and if
|
||||
* not, try the default value */
|
||||
|
||||
watchdog_init_timeout(&s3c2410_wdd, tmr_margin, &pdev->dev);
|
||||
if (s3c2410wdt_set_heartbeat(&s3c2410_wdd, s3c2410_wdd.timeout)) {
|
||||
started = s3c2410wdt_set_heartbeat(&s3c2410_wdd,
|
||||
watchdog_init_timeout(&wdt->wdt_device, tmr_margin, &pdev->dev);
|
||||
ret = s3c2410wdt_set_heartbeat(&wdt->wdt_device,
|
||||
wdt->wdt_device.timeout);
|
||||
if (ret) {
|
||||
started = s3c2410wdt_set_heartbeat(&wdt->wdt_device,
|
||||
CONFIG_S3C2410_WATCHDOG_DEFAULT_TIME);
|
||||
|
||||
if (started == 0)
|
||||
|
|
@ -386,9 +414,9 @@ static int s3c2410wdt_probe(struct platform_device *pdev)
|
|||
goto err_cpufreq;
|
||||
}
|
||||
|
||||
watchdog_set_nowayout(&s3c2410_wdd, nowayout);
|
||||
watchdog_set_nowayout(&wdt->wdt_device, nowayout);
|
||||
|
||||
ret = watchdog_register_device(&s3c2410_wdd);
|
||||
ret = watchdog_register_device(&wdt->wdt_device);
|
||||
if (ret) {
|
||||
dev_err(dev, "cannot register watchdog (%d)\n", ret);
|
||||
goto err_cpufreq;
|
||||
|
|
@ -396,18 +424,20 @@ static int s3c2410wdt_probe(struct platform_device *pdev)
|
|||
|
||||
if (tmr_atboot && started == 0) {
|
||||
dev_info(dev, "starting watchdog timer\n");
|
||||
s3c2410wdt_start(&s3c2410_wdd);
|
||||
s3c2410wdt_start(&wdt->wdt_device);
|
||||
} else if (!tmr_atboot) {
|
||||
/* if we're not enabling the watchdog, then ensure it is
|
||||
* disabled if it has been left running from the bootloader
|
||||
* or other source */
|
||||
|
||||
s3c2410wdt_stop(&s3c2410_wdd);
|
||||
s3c2410wdt_stop(&wdt->wdt_device);
|
||||
}
|
||||
|
||||
platform_set_drvdata(pdev, wdt);
|
||||
|
||||
/* print out a statement of readiness */
|
||||
|
||||
wtcon = readl(wdt_base + S3C2410_WTCON);
|
||||
wtcon = readl(wdt->reg_base + S3C2410_WTCON);
|
||||
|
||||
dev_info(dev, "watchdog %sactive, reset %sabled, irq %sabled\n",
|
||||
(wtcon & S3C2410_WTCON_ENABLE) ? "" : "in",
|
||||
|
|
@ -417,64 +447,64 @@ static int s3c2410wdt_probe(struct platform_device *pdev)
|
|||
return 0;
|
||||
|
||||
err_cpufreq:
|
||||
s3c2410wdt_cpufreq_deregister();
|
||||
s3c2410wdt_cpufreq_deregister(wdt);
|
||||
|
||||
err_clk:
|
||||
clk_disable_unprepare(wdt_clock);
|
||||
wdt_clock = NULL;
|
||||
clk_disable_unprepare(wdt->clock);
|
||||
wdt->clock = NULL;
|
||||
|
||||
err:
|
||||
wdt_irq = NULL;
|
||||
wdt_mem = NULL;
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int s3c2410wdt_remove(struct platform_device *dev)
|
||||
{
|
||||
watchdog_unregister_device(&s3c2410_wdd);
|
||||
struct s3c2410_wdt *wdt = platform_get_drvdata(dev);
|
||||
|
||||
s3c2410wdt_cpufreq_deregister();
|
||||
watchdog_unregister_device(&wdt->wdt_device);
|
||||
|
||||
clk_disable_unprepare(wdt_clock);
|
||||
wdt_clock = NULL;
|
||||
s3c2410wdt_cpufreq_deregister(wdt);
|
||||
|
||||
clk_disable_unprepare(wdt->clock);
|
||||
wdt->clock = NULL;
|
||||
|
||||
wdt_irq = NULL;
|
||||
wdt_mem = NULL;
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void s3c2410wdt_shutdown(struct platform_device *dev)
|
||||
{
|
||||
s3c2410wdt_stop(&s3c2410_wdd);
|
||||
struct s3c2410_wdt *wdt = platform_get_drvdata(dev);
|
||||
|
||||
s3c2410wdt_stop(&wdt->wdt_device);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_PM_SLEEP
|
||||
|
||||
static unsigned long wtcon_save;
|
||||
static unsigned long wtdat_save;
|
||||
|
||||
static int s3c2410wdt_suspend(struct device *dev)
|
||||
{
|
||||
struct s3c2410_wdt *wdt = dev_get_drvdata(dev);
|
||||
|
||||
/* Save watchdog state, and turn it off. */
|
||||
wtcon_save = readl(wdt_base + S3C2410_WTCON);
|
||||
wtdat_save = readl(wdt_base + S3C2410_WTDAT);
|
||||
wdt->wtcon_save = readl(wdt->reg_base + S3C2410_WTCON);
|
||||
wdt->wtdat_save = readl(wdt->reg_base + S3C2410_WTDAT);
|
||||
|
||||
/* Note that WTCNT doesn't need to be saved. */
|
||||
s3c2410wdt_stop(&s3c2410_wdd);
|
||||
s3c2410wdt_stop(&wdt->wdt_device);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int s3c2410wdt_resume(struct device *dev)
|
||||
{
|
||||
/* Restore watchdog state. */
|
||||
struct s3c2410_wdt *wdt = dev_get_drvdata(dev);
|
||||
|
||||
writel(wtdat_save, wdt_base + S3C2410_WTDAT);
|
||||
writel(wtdat_save, wdt_base + S3C2410_WTCNT); /* Reset count */
|
||||
writel(wtcon_save, wdt_base + S3C2410_WTCON);
|
||||
/* Restore watchdog state. */
|
||||
writel(wdt->wtdat_save, wdt->reg_base + S3C2410_WTDAT);
|
||||
writel(wdt->wtdat_save, wdt->reg_base + S3C2410_WTCNT);/* Reset count */
|
||||
writel(wdt->wtcon_save, wdt->reg_base + S3C2410_WTCON);
|
||||
|
||||
dev_info(dev, "watchdog %sabled\n",
|
||||
(wtcon_save & S3C2410_WTCON_ENABLE) ? "en" : "dis");
|
||||
(wdt->wtcon_save & S3C2410_WTCON_ENABLE) ? "en" : "dis");
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -0,0 +1,237 @@
|
|||
/*
|
||||
* sunxi Watchdog Driver
|
||||
*
|
||||
* Copyright (c) 2013 Carlo Caione
|
||||
* 2012 Henrik Nordstrom
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
* as published by the Free Software Foundation; either version
|
||||
* 2 of the License, or (at your option) any later version.
|
||||
*
|
||||
* Based on xen_wdt.c
|
||||
* (c) Copyright 2010 Novell, Inc.
|
||||
*/
|
||||
|
||||
#include <linux/clk.h>
|
||||
#include <linux/err.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/io.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/moduleparam.h>
|
||||
#include <linux/of.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/types.h>
|
||||
#include <linux/watchdog.h>
|
||||
|
||||
#define WDT_MAX_TIMEOUT 16
|
||||
#define WDT_MIN_TIMEOUT 1
|
||||
#define WDT_MODE_TIMEOUT(n) ((n) << 3)
|
||||
#define WDT_TIMEOUT_MASK WDT_MODE_TIMEOUT(0x0F)
|
||||
|
||||
#define WDT_CTRL 0x00
|
||||
#define WDT_CTRL_RELOAD ((1 << 0) | (0x0a57 << 1))
|
||||
|
||||
#define WDT_MODE 0x04
|
||||
#define WDT_MODE_EN (1 << 0)
|
||||
#define WDT_MODE_RST_EN (1 << 1)
|
||||
|
||||
#define DRV_NAME "sunxi-wdt"
|
||||
#define DRV_VERSION "1.0"
|
||||
|
||||
static bool nowayout = WATCHDOG_NOWAYOUT;
|
||||
static unsigned int timeout = WDT_MAX_TIMEOUT;
|
||||
|
||||
struct sunxi_wdt_dev {
|
||||
struct watchdog_device wdt_dev;
|
||||
void __iomem *wdt_base;
|
||||
};
|
||||
|
||||
/*
|
||||
* wdt_timeout_map maps the watchdog timer interval value in seconds to
|
||||
* the value of the register WDT_MODE bit 3:6
|
||||
*
|
||||
* [timeout seconds] = register value
|
||||
*
|
||||
*/
|
||||
|
||||
static const int wdt_timeout_map[] = {
|
||||
[1] = 0b0001, /* 1s */
|
||||
[2] = 0b0010, /* 2s */
|
||||
[3] = 0b0011, /* 3s */
|
||||
[4] = 0b0100, /* 4s */
|
||||
[5] = 0b0101, /* 5s */
|
||||
[6] = 0b0110, /* 6s */
|
||||
[8] = 0b0111, /* 8s */
|
||||
[10] = 0b1000, /* 10s */
|
||||
[12] = 0b1001, /* 12s */
|
||||
[14] = 0b1010, /* 14s */
|
||||
[16] = 0b1011, /* 16s */
|
||||
};
|
||||
|
||||
static int sunxi_wdt_ping(struct watchdog_device *wdt_dev)
|
||||
{
|
||||
struct sunxi_wdt_dev *sunxi_wdt = watchdog_get_drvdata(wdt_dev);
|
||||
void __iomem *wdt_base = sunxi_wdt->wdt_base;
|
||||
|
||||
iowrite32(WDT_CTRL_RELOAD, wdt_base + WDT_CTRL);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int sunxi_wdt_set_timeout(struct watchdog_device *wdt_dev,
|
||||
unsigned int timeout)
|
||||
{
|
||||
struct sunxi_wdt_dev *sunxi_wdt = watchdog_get_drvdata(wdt_dev);
|
||||
void __iomem *wdt_base = sunxi_wdt->wdt_base;
|
||||
u32 reg;
|
||||
|
||||
if (wdt_timeout_map[timeout] == 0)
|
||||
timeout++;
|
||||
|
||||
sunxi_wdt->wdt_dev.timeout = timeout;
|
||||
|
||||
reg = ioread32(wdt_base + WDT_MODE);
|
||||
reg &= ~WDT_TIMEOUT_MASK;
|
||||
reg |= WDT_MODE_TIMEOUT(wdt_timeout_map[timeout]);
|
||||
iowrite32(reg, wdt_base + WDT_MODE);
|
||||
|
||||
sunxi_wdt_ping(wdt_dev);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int sunxi_wdt_stop(struct watchdog_device *wdt_dev)
|
||||
{
|
||||
struct sunxi_wdt_dev *sunxi_wdt = watchdog_get_drvdata(wdt_dev);
|
||||
void __iomem *wdt_base = sunxi_wdt->wdt_base;
|
||||
|
||||
iowrite32(0, wdt_base + WDT_MODE);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int sunxi_wdt_start(struct watchdog_device *wdt_dev)
|
||||
{
|
||||
u32 reg;
|
||||
struct sunxi_wdt_dev *sunxi_wdt = watchdog_get_drvdata(wdt_dev);
|
||||
void __iomem *wdt_base = sunxi_wdt->wdt_base;
|
||||
int ret;
|
||||
|
||||
ret = sunxi_wdt_set_timeout(&sunxi_wdt->wdt_dev,
|
||||
sunxi_wdt->wdt_dev.timeout);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
reg = ioread32(wdt_base + WDT_MODE);
|
||||
reg |= (WDT_MODE_RST_EN | WDT_MODE_EN);
|
||||
iowrite32(reg, wdt_base + WDT_MODE);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct watchdog_info sunxi_wdt_info = {
|
||||
.identity = DRV_NAME,
|
||||
.options = WDIOF_SETTIMEOUT |
|
||||
WDIOF_KEEPALIVEPING |
|
||||
WDIOF_MAGICCLOSE,
|
||||
};
|
||||
|
||||
static const struct watchdog_ops sunxi_wdt_ops = {
|
||||
.owner = THIS_MODULE,
|
||||
.start = sunxi_wdt_start,
|
||||
.stop = sunxi_wdt_stop,
|
||||
.ping = sunxi_wdt_ping,
|
||||
.set_timeout = sunxi_wdt_set_timeout,
|
||||
};
|
||||
|
||||
static int __init sunxi_wdt_probe(struct platform_device *pdev)
|
||||
{
|
||||
struct sunxi_wdt_dev *sunxi_wdt;
|
||||
struct resource *res;
|
||||
int err;
|
||||
|
||||
sunxi_wdt = devm_kzalloc(&pdev->dev, sizeof(*sunxi_wdt), GFP_KERNEL);
|
||||
if (!sunxi_wdt)
|
||||
return -EINVAL;
|
||||
|
||||
platform_set_drvdata(pdev, sunxi_wdt);
|
||||
|
||||
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||||
sunxi_wdt->wdt_base = devm_ioremap_resource(&pdev->dev, res);
|
||||
if (IS_ERR(sunxi_wdt->wdt_base))
|
||||
return PTR_ERR(sunxi_wdt->wdt_base);
|
||||
|
||||
sunxi_wdt->wdt_dev.info = &sunxi_wdt_info;
|
||||
sunxi_wdt->wdt_dev.ops = &sunxi_wdt_ops;
|
||||
sunxi_wdt->wdt_dev.timeout = WDT_MAX_TIMEOUT;
|
||||
sunxi_wdt->wdt_dev.max_timeout = WDT_MAX_TIMEOUT;
|
||||
sunxi_wdt->wdt_dev.min_timeout = WDT_MIN_TIMEOUT;
|
||||
sunxi_wdt->wdt_dev.parent = &pdev->dev;
|
||||
|
||||
watchdog_init_timeout(&sunxi_wdt->wdt_dev, timeout, &pdev->dev);
|
||||
watchdog_set_nowayout(&sunxi_wdt->wdt_dev, nowayout);
|
||||
|
||||
watchdog_set_drvdata(&sunxi_wdt->wdt_dev, sunxi_wdt);
|
||||
|
||||
sunxi_wdt_stop(&sunxi_wdt->wdt_dev);
|
||||
|
||||
err = watchdog_register_device(&sunxi_wdt->wdt_dev);
|
||||
if (unlikely(err))
|
||||
return err;
|
||||
|
||||
dev_info(&pdev->dev, "Watchdog enabled (timeout=%d sec, nowayout=%d)",
|
||||
sunxi_wdt->wdt_dev.timeout, nowayout);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int __exit sunxi_wdt_remove(struct platform_device *pdev)
|
||||
{
|
||||
struct sunxi_wdt_dev *sunxi_wdt = platform_get_drvdata(pdev);
|
||||
|
||||
watchdog_unregister_device(&sunxi_wdt->wdt_dev);
|
||||
watchdog_set_drvdata(&sunxi_wdt->wdt_dev, NULL);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void sunxi_wdt_shutdown(struct platform_device *pdev)
|
||||
{
|
||||
struct sunxi_wdt_dev *sunxi_wdt = platform_get_drvdata(pdev);
|
||||
|
||||
sunxi_wdt_stop(&sunxi_wdt->wdt_dev);
|
||||
}
|
||||
|
||||
static const struct of_device_id sunxi_wdt_dt_ids[] = {
|
||||
{ .compatible = "allwinner,sun4i-wdt" },
|
||||
{ /* sentinel */ }
|
||||
};
|
||||
MODULE_DEVICE_TABLE(of, sunxi_wdt_dt_ids);
|
||||
|
||||
static struct platform_driver sunxi_wdt_driver = {
|
||||
.probe = sunxi_wdt_probe,
|
||||
.remove = sunxi_wdt_remove,
|
||||
.shutdown = sunxi_wdt_shutdown,
|
||||
.driver = {
|
||||
.owner = THIS_MODULE,
|
||||
.name = DRV_NAME,
|
||||
.of_match_table = of_match_ptr(sunxi_wdt_dt_ids)
|
||||
},
|
||||
};
|
||||
|
||||
module_platform_driver(sunxi_wdt_driver);
|
||||
|
||||
module_param(timeout, uint, 0);
|
||||
MODULE_PARM_DESC(timeout, "Watchdog heartbeat in seconds");
|
||||
|
||||
module_param(nowayout, bool, 0);
|
||||
MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started "
|
||||
"(default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
|
||||
|
||||
MODULE_LICENSE("GPL");
|
||||
MODULE_AUTHOR("Carlo Caione <carlo.caione@gmail.com>");
|
||||
MODULE_AUTHOR("Henrik Nordstrom <henrik@henriknordstrom.net>");
|
||||
MODULE_DESCRIPTION("sunxi WatchDog Timer Driver");
|
||||
MODULE_VERSION(DRV_VERSION);
|
||||
|
|
@ -403,21 +403,11 @@ static int ts72xx_wdt_probe(struct platform_device *pdev)
|
|||
}
|
||||
|
||||
r1 = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||||
if (!r1) {
|
||||
dev_err(&pdev->dev, "failed to get memory resource\n");
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
wdt->control_reg = devm_ioremap_resource(&pdev->dev, r1);
|
||||
if (IS_ERR(wdt->control_reg))
|
||||
return PTR_ERR(wdt->control_reg);
|
||||
|
||||
r2 = platform_get_resource(pdev, IORESOURCE_MEM, 1);
|
||||
if (!r2) {
|
||||
dev_err(&pdev->dev, "failed to get memory resource\n");
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
wdt->feed_reg = devm_ioremap_resource(&pdev->dev, r2);
|
||||
if (IS_ERR(wdt->feed_reg))
|
||||
return PTR_ERR(wdt->feed_reg);
|
||||
|
|
|
|||
Loading…
Reference in New Issue