serial: timbuart: make sure last byte is sent when port is closed
Fix a problem in early versions of the FPGA IP. In certain situations the IP reports that the FIFO is empty, but a byte is still clocked out. If a flush is done at that point the currently clocked byte is canceled. This causes incompatibilities with the upper layers when a port is closed, it waits until the FIFO is empty and then closes the port. During close the FIFO is flushed -> the last byte is not sent properly. Now the FIFO is only flushed if it is reported to be non-empty. Which makes the currently clocked out byte to finish. [akpm@linux-foundation.org: fix build] Signed-off-by: Richard Röjfors <richard.rojfors@pelagicore.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
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4405199623
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24cd73a394
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@ -68,12 +68,22 @@ static void timbuart_start_tx(struct uart_port *port)
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tasklet_schedule(&uart->tasklet);
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}
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static unsigned int timbuart_tx_empty(struct uart_port *port)
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{
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u32 isr = ioread32(port->membase + TIMBUART_ISR);
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return (isr & TXBE) ? TIOCSER_TEMT : 0;
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}
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static void timbuart_flush_buffer(struct uart_port *port)
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{
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u8 ctl = ioread8(port->membase + TIMBUART_CTRL) | TIMBUART_CTRL_FLSHTX;
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if (!timbuart_tx_empty(port)) {
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u8 ctl = ioread8(port->membase + TIMBUART_CTRL) |
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TIMBUART_CTRL_FLSHTX;
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iowrite8(ctl, port->membase + TIMBUART_CTRL);
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iowrite32(TXBF, port->membase + TIMBUART_ISR);
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iowrite8(ctl, port->membase + TIMBUART_CTRL);
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iowrite32(TXBF, port->membase + TIMBUART_ISR);
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}
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}
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static void timbuart_rx_chars(struct uart_port *port)
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@ -195,13 +205,6 @@ void timbuart_tasklet(unsigned long arg)
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dev_dbg(uart->port.dev, "%s leaving\n", __func__);
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}
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static unsigned int timbuart_tx_empty(struct uart_port *port)
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{
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u32 isr = ioread32(port->membase + TIMBUART_ISR);
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return (isr & TXBE) ? TIOCSER_TEMT : 0;
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}
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static unsigned int timbuart_get_mctrl(struct uart_port *port)
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{
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u8 cts = ioread8(port->membase + TIMBUART_CTRL);
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