MLK-18660-1 include: define the pd and lpcg of the lsio mu

In order to replace the M4_MU# by the LSIO MU in the
RPMSG usage.
Define the PD and LPCG address of the LSIO MU for iMX8.

Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>

include/dt-bindings/clock/imx8qm-clock.h

@@ -844,6 +844,11 @@
 #define IMX8QM_HDMI_RX_HD_CORE_SEL			786
 #define IMX8QM_HDMI_RX_DIG_PLL_CLK			787
 
-#define IMX8QM_CLK_END					788
+#define IMX8QM_LSIO_MU5A_IPG_S_CLK			788
+#define IMX8QM_LSIO_MU5A_IPG_CLK			789
+#define IMX8QM_LSIO_MU6A_IPG_S_CLK			790
+#define IMX8QM_LSIO_MU6A_IPG_CLK			791
+
+#define IMX8QM_CLK_END					792
 
 #endif /* __DT_BINDINGS_CLOCK_IMX8QM_H */

include/dt-bindings/clock/imx8qxp-clock.h

@@ -586,5 +586,8 @@
 #define IMX8QXP_MIPI0_PWM_CLK					526
 #define IMX8QXP_MIPI1_PWM_CLK					527
 
-#define IMX8QXP_CLK_END						528
+#define IMX8QXP_LSIO_MU5A_IPG_S_CLK		528
+#define IMX8QXP_LSIO_MU5A_IPG_CLK		529
+
+#define IMX8QXP_CLK_END						530
 #endif /* __DT_BINDINGS_CLOCK_IMX8QXP_H */

include/dt-bindings/soc/imx8_pd.h

@@ -102,6 +102,8 @@
 #define PD_LSIO_PWM_5               lsio_pwm5
 #define PD_LSIO_PWM_6               lsio_pwm6
 #define PD_LSIO_PWM_7               lsio_pwm7
+#define PD_LSIO_MU5A                lsio_mu5a
+#define PD_LSIO_MU6A                lsio_mu6a
 
 #define PD_CONN                     connectivity_power_domain
 #define PD_CONN_SDHC_0              conn_sdhc0

include/soc/imx8/imx8qm/lpcg.h

@@ -35,6 +35,15 @@
 #define		GPT_4_LPCG		0x5D580000
 #define		OCRAM_LPCG		0x5D590000
 #define		KPP_LPCG		0x5D5A0000
+#define		MU_5A_LPCG		0x5D600000
+#define		MU_6A_LPCG		0x5D610000
+#define		MU_7A_LPCG		0x5D620000
+#define		MU_8A_LPCG		0x5D630000
+#define		MU_9A_LPCG		0x5D640000
+#define		MU_10A_LPCG		0x5D650000
+#define		MU_11A_LPCG		0x5D660000
+#define		MU_12A_LPCG		0x5D670000
+#define		MU_13A_LPCG		0x5D680000
 
 /* HSIO SS */
 #define		CRR_5_LPCG		0x5F0F0000

include/soc/imx8/imx8qxp/lpcg.h

@@ -35,6 +35,15 @@
 #define		OCRAM_LPCG		0x5D590000
 #define		KPP_LPCG		0x5D5A0000
 #define		ROMCP_LPCG		0x5D500000
+#define		MU_5A_LPCG		0x5D600000
+#define		MU_6A_LPCG		0x5D610000
+#define		MU_7A_LPCG		0x5D620000
+#define		MU_8A_LPCG		0x5D630000
+#define		MU_9A_LPCG		0x5D640000
+#define		MU_10A_LPCG		0x5D650000
+#define		MU_11A_LPCG		0x5D660000
+#define		MU_12A_LPCG		0x5D670000
+#define		MU_13A_LPCG		0x5D680000
 
 /* HSIO SS */
 #define		CRR_5_LPCG		0x5F0F0000