reset: imx7: Fix always writing bits as 0
[ Upstream commit 26fce0557f
]
Right now the only user of reset-imx7 is pci-imx6 and the
reset_control_assert and deassert calls on pciephy_reset don't toggle
the PCIEPHY_BTN and PCIEPHY_G_RST bits as expected. Fix this by writing
1 or 0 respectively.
The reference manual is not very clear regarding SRC_PCIEPHY_RCR but for
other registers like MIPIPHY and HSICPHY the bits are explicitly
documented as "1 means assert, 0 means deassert".
The values are still reversed for IMX7_RESET_PCIE_CTRL_APPS_EN.
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
pull/10/head
parent
c1e2aee995
commit
27adb89d1f
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@ -80,7 +80,7 @@ static int imx7_reset_set(struct reset_controller_dev *rcdev,
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{
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struct imx7_src *imx7src = to_imx7_src(rcdev);
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const struct imx7_src_signal *signal = &imx7_src_signals[id];
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unsigned int value = 0;
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unsigned int value = assert ? signal->bit : 0;
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switch (id) {
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case IMX7_RESET_PCIEPHY:
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