[media] lgdt3305: add support for fixed tp clock mode

Add support for controlling TP clock mode for VSB and QAM annex-B/C mode.
Gated clock mode is the default value, and does not support QAM annex-C.
The patch enables setting this control to fixed clock mode.

Signed-off-by: Michael Ira Krufky <mkrufky@linuxtv.org>
Signed-off-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
This commit is contained in:
Michael Ira Krufky 2014-12-21 18:54:50 -03:00 committed by Mauro Carvalho Chehab
parent bdba90df2e
commit 27f7ef7ca9
2 changed files with 9 additions and 0 deletions

View file

@ -241,6 +241,7 @@ static int lgdt3305_mpeg_mode_polarity(struct lgdt3305_state *state)
u8 val;
int ret;
enum lgdt3305_tp_clock_edge edge = state->cfg->tpclk_edge;
enum lgdt3305_tp_clock_mode mode = state->cfg->tpclk_mode;
enum lgdt3305_tp_valid_polarity valid = state->cfg->tpvalid_polarity;
lg_dbg("edge = %d, valid = %d\n", edge, valid);
@ -253,6 +254,8 @@ static int lgdt3305_mpeg_mode_polarity(struct lgdt3305_state *state)
if (edge)
val |= 0x08;
if (mode)
val |= 0x40;
if (valid)
val |= 0x01;

View file

@ -37,6 +37,11 @@ enum lgdt3305_tp_clock_edge {
LGDT3305_TPCLK_FALLING_EDGE = 1,
};
enum lgdt3305_tp_clock_mode {
LGDT3305_TPCLK_GATED = 0,
LGDT3305_TPCLK_FIXED = 1,
};
enum lgdt3305_tp_valid_polarity {
LGDT3305_TP_VALID_LOW = 0,
LGDT3305_TP_VALID_HIGH = 1,
@ -70,6 +75,7 @@ struct lgdt3305_config {
enum lgdt3305_mpeg_mode mpeg_mode;
enum lgdt3305_tp_clock_edge tpclk_edge;
enum lgdt3305_tp_clock_mode tpclk_mode;
enum lgdt3305_tp_valid_polarity tpvalid_polarity;
enum lgdt_demod_chip_type demod_chip;
};