sparc64: fix and optimize irq distribution
irq_choose_cpu() should compare the affinity mask against cpu_online_map
rather than CPU_MASK_ALL, since irq_select_affinity() sets the interrupt's
affinity mask to cpu_online_map "and" CPU_MASK_ALL (which ends up being
just cpu_online_map). The mask comparison in irq_choose_cpu() will always
fail since the two masks are not the same. So the CPU chosen is the first CPU
in the intersection of cpu_online_map and CPU_MASK_ALL, which is always CPU0.
That means all interrupts are reassigned to CPU0...
Distributing interrupts to CPUs in a linearly increasing round robin fashion
is not optimal for the UltraSPARC T1/T2. Also, the irq_rover in
irq_choose_cpu() causes an interrupt to be assigned to a different
processor each time the interrupt is allocated and released. This may lead
to an unbalanced distribution over time.
A static mapping of interrupts to processors is done to optimize and balance
interrupt distribution. For the T1/T2, interrupts are spread to different
cores first, and then to strands within a core.
The following is some benchmarks showing the effects of interrupt
distribution on a T2. The test was done with iperf using a pair of T5220
boxes, each with a 10GBe NIU (XAUI) connected back to back.
TCP | Stock Linear RR IRQ Optimized IRQ
Streams | 2.6.30-rc5 Distribution Distribution
| GBits/sec GBits/sec GBits/sec
--------+-----------------------------------------
1 0.839 0.862 0.868
8 1.16 4.96 5.88
16 1.15 6.40 8.04
100 1.09 7.28 8.68
Signed-off-by: Hong H. Pham <hong.pham@windriver.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Hong H. Pham
David S. Miller
parent
4fd78a5f1e
commit
280ff97494
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@ -54,6 +54,7 @@ obj-$(CONFIG_SPARC64) += sstate.o
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obj-$(CONFIG_SPARC64) += mdesc.o
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obj-$(CONFIG_SPARC64) += pcr.o
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obj-$(CONFIG_SPARC64) += nmi.o
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obj-$(CONFIG_SPARC64_SMP) += cpumap.o
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# sparc32 do not use GENERIC_HARDIRQS but uses the generic devres implementation
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obj-$(CONFIG_SPARC32) += devres.o
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431
arch/sparc/kernel/cpumap.c
Normal file
431
arch/sparc/kernel/cpumap.c
Normal file
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@ -0,0 +1,431 @@
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/* cpumap.c: used for optimizing CPU assignment
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*
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* Copyright (C) 2009 Hong H. Pham <hong.pham@windriver.com>
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*/
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/cpumask.h>
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#include <linux/spinlock.h>
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#include <asm/cpudata.h>
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#include "cpumap.h"
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enum {
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CPUINFO_LVL_ROOT = 0,
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CPUINFO_LVL_NODE,
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CPUINFO_LVL_CORE,
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CPUINFO_LVL_PROC,
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CPUINFO_LVL_MAX,
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};
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enum {
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ROVER_NO_OP = 0,
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/* Increment rover every time level is visited */
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ROVER_INC_ON_VISIT = 1 << 0,
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/* Increment parent's rover every time rover wraps around */
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ROVER_INC_PARENT_ON_LOOP = 1 << 1,
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};
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struct cpuinfo_node {
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int id;
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int level;
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int num_cpus; /* Number of CPUs in this hierarchy */
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int parent_index;
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int child_start; /* Array index of the first child node */
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int child_end; /* Array index of the last child node */
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int rover; /* Child node iterator */
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};
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struct cpuinfo_level {
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int start_index; /* Index of first node of a level in a cpuinfo tree */
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int end_index; /* Index of last node of a level in a cpuinfo tree */
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int num_nodes; /* Number of nodes in a level in a cpuinfo tree */
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};
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struct cpuinfo_tree {
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int total_nodes;
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/* Offsets into nodes[] for each level of the tree */
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struct cpuinfo_level level[CPUINFO_LVL_MAX];
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struct cpuinfo_node nodes[0];
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};
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static struct cpuinfo_tree *cpuinfo_tree;
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static u16 cpu_distribution_map[NR_CPUS];
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static DEFINE_SPINLOCK(cpu_map_lock);
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/* Niagara optimized cpuinfo tree traversal. */
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static const int niagara_iterate_method[] = {
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[CPUINFO_LVL_ROOT] = ROVER_NO_OP,
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/* Strands (or virtual CPUs) within a core may not run concurrently
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* on the Niagara, as instruction pipeline(s) are shared. Distribute
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* work to strands in different cores first for better concurrency.
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* Go to next NUMA node when all cores are used.
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*/
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[CPUINFO_LVL_NODE] = ROVER_INC_ON_VISIT|ROVER_INC_PARENT_ON_LOOP,
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/* Strands are grouped together by proc_id in cpuinfo_sparc, i.e.
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* a proc_id represents an instruction pipeline. Distribute work to
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* strands in different proc_id groups if the core has multiple
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* instruction pipelines (e.g. the Niagara 2/2+ has two).
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*/
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[CPUINFO_LVL_CORE] = ROVER_INC_ON_VISIT,
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/* Pick the next strand in the proc_id group. */
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[CPUINFO_LVL_PROC] = ROVER_INC_ON_VISIT,
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};
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/* Generic cpuinfo tree traversal. Distribute work round robin across NUMA
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* nodes.
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*/
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static const int generic_iterate_method[] = {
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[CPUINFO_LVL_ROOT] = ROVER_INC_ON_VISIT,
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[CPUINFO_LVL_NODE] = ROVER_NO_OP,
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[CPUINFO_LVL_CORE] = ROVER_INC_PARENT_ON_LOOP,
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[CPUINFO_LVL_PROC] = ROVER_INC_ON_VISIT|ROVER_INC_PARENT_ON_LOOP,
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};
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static int cpuinfo_id(int cpu, int level)
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{
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int id;
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switch (level) {
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case CPUINFO_LVL_ROOT:
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id = 0;
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break;
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case CPUINFO_LVL_NODE:
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id = cpu_to_node(cpu);
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break;
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case CPUINFO_LVL_CORE:
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id = cpu_data(cpu).core_id;
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break;
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case CPUINFO_LVL_PROC:
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id = cpu_data(cpu).proc_id;
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break;
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default:
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id = -EINVAL;
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}
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return id;
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}
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/*
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* Enumerate the CPU information in __cpu_data to determine the start index,
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* end index, and number of nodes for each level in the cpuinfo tree. The
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* total number of cpuinfo nodes required to build the tree is returned.
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*/
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static int enumerate_cpuinfo_nodes(struct cpuinfo_level *tree_level)
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{
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int prev_id[CPUINFO_LVL_MAX];
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int i, n, num_nodes;
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for (i = CPUINFO_LVL_ROOT; i < CPUINFO_LVL_MAX; i++) {
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struct cpuinfo_level *lv = &tree_level[i];
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prev_id[i] = -1;
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lv->start_index = lv->end_index = lv->num_nodes = 0;
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}
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num_nodes = 1; /* Include the root node */
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for (i = 0; i < num_possible_cpus(); i++) {
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if (!cpu_online(i))
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continue;
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n = cpuinfo_id(i, CPUINFO_LVL_NODE);
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if (n > prev_id[CPUINFO_LVL_NODE]) {
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tree_level[CPUINFO_LVL_NODE].num_nodes++;
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prev_id[CPUINFO_LVL_NODE] = n;
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num_nodes++;
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}
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n = cpuinfo_id(i, CPUINFO_LVL_CORE);
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if (n > prev_id[CPUINFO_LVL_CORE]) {
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tree_level[CPUINFO_LVL_CORE].num_nodes++;
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prev_id[CPUINFO_LVL_CORE] = n;
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num_nodes++;
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}
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n = cpuinfo_id(i, CPUINFO_LVL_PROC);
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if (n > prev_id[CPUINFO_LVL_PROC]) {
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tree_level[CPUINFO_LVL_PROC].num_nodes++;
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prev_id[CPUINFO_LVL_PROC] = n;
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num_nodes++;
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}
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}
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tree_level[CPUINFO_LVL_ROOT].num_nodes = 1;
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n = tree_level[CPUINFO_LVL_NODE].num_nodes;
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tree_level[CPUINFO_LVL_NODE].start_index = 1;
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tree_level[CPUINFO_LVL_NODE].end_index = n;
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n++;
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tree_level[CPUINFO_LVL_CORE].start_index = n;
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n += tree_level[CPUINFO_LVL_CORE].num_nodes;
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tree_level[CPUINFO_LVL_CORE].end_index = n - 1;
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tree_level[CPUINFO_LVL_PROC].start_index = n;
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n += tree_level[CPUINFO_LVL_PROC].num_nodes;
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tree_level[CPUINFO_LVL_PROC].end_index = n - 1;
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return num_nodes;
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}
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/* Build a tree representation of the CPU hierarchy using the per CPU
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* information in __cpu_data. Entries in __cpu_data[0..NR_CPUS] are
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* assumed to be sorted in ascending order based on node, core_id, and
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* proc_id (in order of significance).
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*/
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static struct cpuinfo_tree *build_cpuinfo_tree(void)
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{
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struct cpuinfo_tree *new_tree;
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struct cpuinfo_node *node;
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struct cpuinfo_level tmp_level[CPUINFO_LVL_MAX];
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int num_cpus[CPUINFO_LVL_MAX];
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int level_rover[CPUINFO_LVL_MAX];
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int prev_id[CPUINFO_LVL_MAX];
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int n, id, cpu, prev_cpu, last_cpu, level;
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n = enumerate_cpuinfo_nodes(tmp_level);
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new_tree = kzalloc(sizeof(struct cpuinfo_tree) +
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(sizeof(struct cpuinfo_node) * n), GFP_ATOMIC);
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if (!new_tree)
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return NULL;
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new_tree->total_nodes = n;
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memcpy(&new_tree->level, tmp_level, sizeof(tmp_level));
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prev_cpu = cpu = first_cpu(cpu_online_map);
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/* Initialize all levels in the tree with the first CPU */
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for (level = CPUINFO_LVL_PROC; level >= CPUINFO_LVL_ROOT; level--) {
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n = new_tree->level[level].start_index;
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level_rover[level] = n;
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node = &new_tree->nodes[n];
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id = cpuinfo_id(cpu, level);
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if (unlikely(id < 0)) {
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kfree(new_tree);
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return NULL;
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}
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node->id = id;
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node->level = level;
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node->num_cpus = 1;
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node->parent_index = (level > CPUINFO_LVL_ROOT)
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? new_tree->level[level - 1].start_index : -1;
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node->child_start = node->child_end = node->rover =
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(level == CPUINFO_LVL_PROC)
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? cpu : new_tree->level[level + 1].start_index;
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prev_id[level] = node->id;
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num_cpus[level] = 1;
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}
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for (last_cpu = (num_possible_cpus() - 1); last_cpu >= 0; last_cpu--) {
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if (cpu_online(last_cpu))
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break;
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}
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while (++cpu <= last_cpu) {
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if (!cpu_online(cpu))
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continue;
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for (level = CPUINFO_LVL_PROC; level >= CPUINFO_LVL_ROOT;
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level--) {
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id = cpuinfo_id(cpu, level);
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if (unlikely(id < 0)) {
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kfree(new_tree);
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return NULL;
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}
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if ((id != prev_id[level]) || (cpu == last_cpu)) {
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prev_id[level] = id;
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node = &new_tree->nodes[level_rover[level]];
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node->num_cpus = num_cpus[level];
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num_cpus[level] = 1;
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if (cpu == last_cpu)
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node->num_cpus++;
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/* Connect tree node to parent */
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if (level == CPUINFO_LVL_ROOT)
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node->parent_index = -1;
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else
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node->parent_index =
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level_rover[level - 1];
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if (level == CPUINFO_LVL_PROC) {
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node->child_end =
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(cpu == last_cpu) ? cpu : prev_cpu;
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} else {
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node->child_end =
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level_rover[level + 1] - 1;
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}
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/* Initialize the next node in the same level */
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n = ++level_rover[level];
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if (n <= new_tree->level[level].end_index) {
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node = &new_tree->nodes[n];
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node->id = id;
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node->level = level;
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/* Connect node to child */
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node->child_start = node->child_end =
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node->rover =
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(level == CPUINFO_LVL_PROC)
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? cpu : level_rover[level + 1];
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}
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} else
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num_cpus[level]++;
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}
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prev_cpu = cpu;
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}
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return new_tree;
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}
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static void increment_rover(struct cpuinfo_tree *t, int node_index,
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int root_index, const int *rover_inc_table)
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{
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struct cpuinfo_node *node = &t->nodes[node_index];
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int top_level, level;
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top_level = t->nodes[root_index].level;
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for (level = node->level; level >= top_level; level--) {
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node->rover++;
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if (node->rover <= node->child_end)
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return;
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node->rover = node->child_start;
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/* If parent's rover does not need to be adjusted, stop here. */
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if ((level == top_level) ||
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!(rover_inc_table[level] & ROVER_INC_PARENT_ON_LOOP))
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return;
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node = &t->nodes[node->parent_index];
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}
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}
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static int iterate_cpu(struct cpuinfo_tree *t, unsigned int root_index)
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{
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const int *rover_inc_table;
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int level, new_index, index = root_index;
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switch (sun4v_chip_type) {
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case SUN4V_CHIP_NIAGARA1:
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case SUN4V_CHIP_NIAGARA2:
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rover_inc_table = niagara_iterate_method;
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break;
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default:
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rover_inc_table = generic_iterate_method;
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}
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for (level = t->nodes[root_index].level; level < CPUINFO_LVL_MAX;
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level++) {
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new_index = t->nodes[index].rover;
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if (rover_inc_table[level] & ROVER_INC_ON_VISIT)
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increment_rover(t, index, root_index, rover_inc_table);
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index = new_index;
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}
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return index;
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}
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static void _cpu_map_rebuild(void)
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{
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int i;
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if (cpuinfo_tree) {
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kfree(cpuinfo_tree);
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cpuinfo_tree = NULL;
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}
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cpuinfo_tree = build_cpuinfo_tree();
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if (!cpuinfo_tree)
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return;
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/* Build CPU distribution map that spans all online CPUs. No need
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* to check if the CPU is online, as that is done when the cpuinfo
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* tree is being built.
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*/
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for (i = 0; i < cpuinfo_tree->nodes[0].num_cpus; i++)
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cpu_distribution_map[i] = iterate_cpu(cpuinfo_tree, 0);
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}
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/* Fallback if the cpuinfo tree could not be built. CPU mapping is linear
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* round robin.
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*/
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static int simple_map_to_cpu(unsigned int index)
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{
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int i, end, cpu_rover;
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cpu_rover = 0;
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end = index % num_online_cpus();
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for (i = 0; i < num_possible_cpus(); i++) {
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if (cpu_online(cpu_rover)) {
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if (cpu_rover >= end)
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return cpu_rover;
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cpu_rover++;
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}
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}
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/* Impossible, since num_online_cpus() <= num_possible_cpus() */
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return first_cpu(cpu_online_map);
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}
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static int _map_to_cpu(unsigned int index)
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{
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struct cpuinfo_node *root_node;
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if (unlikely(!cpuinfo_tree)) {
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_cpu_map_rebuild();
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if (!cpuinfo_tree)
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return simple_map_to_cpu(index);
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}
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root_node = &cpuinfo_tree->nodes[0];
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#ifdef CONFIG_HOTPLUG_CPU
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if (unlikely(root_node->num_cpus != num_online_cpus())) {
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_cpu_map_rebuild();
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if (!cpuinfo_tree)
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return simple_map_to_cpu(index);
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}
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#endif
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return cpu_distribution_map[index % root_node->num_cpus];
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}
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int map_to_cpu(unsigned int index)
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{
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int mapped_cpu;
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unsigned long flag;
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spin_lock_irqsave(&cpu_map_lock, flag);
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mapped_cpu = _map_to_cpu(index);
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#ifdef CONFIG_HOTPLUG_CPU
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while (unlikely(!cpu_online(mapped_cpu)))
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mapped_cpu = _map_to_cpu(index);
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#endif
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spin_unlock_irqrestore(&cpu_map_lock, flag);
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return mapped_cpu;
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}
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EXPORT_SYMBOL(map_to_cpu);
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void cpu_map_rebuild(void)
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{
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unsigned long flag;
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spin_lock_irqsave(&cpu_map_lock, flag);
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_cpu_map_rebuild();
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spin_unlock_irqrestore(&cpu_map_lock, flag);
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}
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16
arch/sparc/kernel/cpumap.h
Normal file
16
arch/sparc/kernel/cpumap.h
Normal file
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@ -0,0 +1,16 @@
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#ifndef _CPUMAP_H
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#define _CPUMAP_H
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#ifdef CONFIG_SMP
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extern void cpu_map_rebuild(void);
|
||||
extern int map_to_cpu(unsigned int index);
|
||||
#define cpu_map_init() cpu_map_rebuild()
|
||||
#else
|
||||
#define cpu_map_init() do {} while (0)
|
||||
static inline int map_to_cpu(unsigned int index)
|
||||
{
|
||||
return raw_smp_processor_id();
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
|
@ -45,6 +45,7 @@
|
|||
#include <asm/cacheflush.h>
|
||||
|
||||
#include "entry.h"
|
||||
#include "cpumap.h"
|
||||
|
||||
#define NUM_IVECS (IMAP_INR + 1)
|
||||
|
||||
|
|
@ -256,35 +257,13 @@ static int irq_choose_cpu(unsigned int virt_irq)
|
|||
int cpuid;
|
||||
|
||||
cpumask_copy(&mask, irq_desc[virt_irq].affinity);
|
||||
if (cpus_equal(mask, CPU_MASK_ALL)) {
|
||||
static int irq_rover;
|
||||
static DEFINE_SPINLOCK(irq_rover_lock);
|
||||
unsigned long flags;
|
||||
|
||||
/* Round-robin distribution... */
|
||||
do_round_robin:
|
||||
spin_lock_irqsave(&irq_rover_lock, flags);
|
||||
|
||||
while (!cpu_online(irq_rover)) {
|
||||
if (++irq_rover >= nr_cpu_ids)
|
||||
irq_rover = 0;
|
||||
}
|
||||
cpuid = irq_rover;
|
||||
do {
|
||||
if (++irq_rover >= nr_cpu_ids)
|
||||
irq_rover = 0;
|
||||
} while (!cpu_online(irq_rover));
|
||||
|
||||
spin_unlock_irqrestore(&irq_rover_lock, flags);
|
||||
if (cpus_equal(mask, cpu_online_map)) {
|
||||
cpuid = map_to_cpu(virt_irq);
|
||||
} else {
|
||||
cpumask_t tmp;
|
||||
|
||||
cpus_and(tmp, cpu_online_map, mask);
|
||||
|
||||
if (cpus_empty(tmp))
|
||||
goto do_round_robin;
|
||||
|
||||
cpuid = first_cpu(tmp);
|
||||
cpuid = cpus_empty(tmp) ? map_to_cpu(virt_irq) : first_cpu(tmp);
|
||||
}
|
||||
|
||||
return cpuid;
|
||||
|
|
|
|||
|
|
@ -48,6 +48,8 @@
|
|||
#include <asm/ldc.h>
|
||||
#include <asm/hypervisor.h>
|
||||
|
||||
#include "cpumap.h"
|
||||
|
||||
int sparc64_multi_core __read_mostly;
|
||||
|
||||
DEFINE_PER_CPU(cpumask_t, cpu_sibling_map) = CPU_MASK_NONE;
|
||||
|
|
@ -1314,6 +1316,8 @@ int __cpu_disable(void)
|
|||
cpu_clear(cpu, cpu_online_map);
|
||||
ipi_call_unlock();
|
||||
|
||||
cpu_map_rebuild();
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
|
|||
Loading…
Reference in a new issue