Immutable branch for IIO and Input
-----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.14 (GNU/Linux) iQIcBAABAgAGBQJSy79CAAoJEFGvii+H/Hdh3ZcQALTHjbU85CljM+tDsQUC3ugi uMQZxf2YEWDmLE1epcGbQ22EVdI2s59jFs8tEUBSOqbUXm+Oyuf8zdjenibnOoht epKvlRgUGXZA4A90YsJjVLSkn2Nl/QvyKhjU7n9KTH6rnPFGOw2Ja5n7cLy3DtNY vsSwHRtOrV5tWMSJQbGamz9cGujhAli5kHQ+hPUKNeaztSGFbpl02SsV8oJ/Dlbg juzjY9QDMnKjiSjA0ZtvUIJoyU5yJuRtrBM02SsvXAVPTZpMEaM5P7dO3lqPSXzK jUZuMszrB8gV0NxeSkdiWYUZ89rpoSVYv6EW/pg87OvTxukHyB4oi1+/3YXYdNgj 8kDVhL/BKPdqLw9vo7WbvnZJz99qNyh7R4ZOf90Yv+3BOAPue0WdDQjZw/5p41Ur 8+VRc1SvOSzXDuNIon97DmpKk477i3ylMiAeqi+b7ynzgvJqGayFf0KUHlUHmKjM ZNKHl2sd9qvft5WUX1P02ihc9/j8LMF5h8WX8Et1/a05SXn1LvfK5HJQk9ZHB94m ZaXwEOirbHAVyTlQre1zYncBWtlsLlOJT+c0G+HjFX99+79u0KxFyUTpXgfypJUe 5UGQjM/w+CcVpl6h58k65PjyGRRweVUkqnoAnOpVGCRvIx4sU1g5nF9usEb8omDA PODxF76LVgohEozCwGpq =Tc4K -----END PGP SIGNATURE----- Merge tag 'ib-iio-input-3.13-1' into for-mfd-next Immutable branch for IIO and Input
This commit is contained in:
Lee Jones
commit
28b4c2948f
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@ -60,6 +60,24 @@ static u32 get_adc_step_mask(struct tiadc_device *adc_dev)
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return step_en;
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}
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static u32 get_adc_chan_step_mask(struct tiadc_device *adc_dev,
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struct iio_chan_spec const *chan)
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{
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int i;
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for (i = 0; i < ARRAY_SIZE(adc_dev->channel_step); i++) {
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if (chan->channel == adc_dev->channel_line[i]) {
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u32 step;
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step = adc_dev->channel_step[i];
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/* +1 for the charger */
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return 1 << (step + 1);
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}
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}
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WARN_ON(1);
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return 0;
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}
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static u32 get_adc_step_bit(struct tiadc_device *adc_dev, int chan)
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{
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return 1 << adc_dev->channel_step[chan];
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@ -181,7 +199,7 @@ static int tiadc_buffer_postenable(struct iio_dev *indio_dev)
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enb |= (get_adc_step_bit(adc_dev, bit) << 1);
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adc_dev->buffer_en_ch_steps = enb;
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am335x_tsc_se_set(adc_dev->mfd_tscadc, enb);
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am335x_tsc_se_set_cache(adc_dev->mfd_tscadc, enb);
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tiadc_writel(adc_dev, REG_IRQSTATUS, IRQENB_FIFO1THRES
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| IRQENB_FIFO1OVRRUN | IRQENB_FIFO1UNDRFLW);
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@ -199,6 +217,7 @@ static int tiadc_buffer_predisable(struct iio_dev *indio_dev)
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tiadc_writel(adc_dev, REG_IRQCLR, (IRQENB_FIFO1THRES |
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IRQENB_FIFO1OVRRUN | IRQENB_FIFO1UNDRFLW));
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am335x_tsc_se_clr(adc_dev->mfd_tscadc, adc_dev->buffer_en_ch_steps);
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adc_dev->buffer_en_ch_steps = 0;
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/* Flush FIFO of leftover data in the time it takes to disable adc */
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fifo1count = tiadc_readl(adc_dev, REG_FIFO1CNT);
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@ -328,34 +347,43 @@ static int tiadc_read_raw(struct iio_dev *indio_dev,
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unsigned int fifo1count, read, stepid;
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bool found = false;
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u32 step_en;
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unsigned long timeout = jiffies + usecs_to_jiffies
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(IDLE_TIMEOUT * adc_dev->channels);
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unsigned long timeout;
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if (iio_buffer_enabled(indio_dev))
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return -EBUSY;
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step_en = get_adc_step_mask(adc_dev);
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am335x_tsc_se_set(adc_dev->mfd_tscadc, step_en);
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step_en = get_adc_chan_step_mask(adc_dev, chan);
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if (!step_en)
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return -EINVAL;
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/* Wait for ADC sequencer to complete sampling */
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while (tiadc_readl(adc_dev, REG_ADCFSM) & SEQ_STATUS) {
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if (time_after(jiffies, timeout))
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fifo1count = tiadc_readl(adc_dev, REG_FIFO1CNT);
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while (fifo1count--)
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tiadc_readl(adc_dev, REG_FIFO1);
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am335x_tsc_se_set_once(adc_dev->mfd_tscadc, step_en);
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timeout = jiffies + usecs_to_jiffies
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(IDLE_TIMEOUT * adc_dev->channels);
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/* Wait for Fifo threshold interrupt */
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while (1) {
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fifo1count = tiadc_readl(adc_dev, REG_FIFO1CNT);
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if (fifo1count)
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break;
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if (time_after(jiffies, timeout)) {
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am335x_tsc_se_adc_done(adc_dev->mfd_tscadc);
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return -EAGAIN;
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}
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}
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map_val = chan->channel + TOTAL_CHANNELS;
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/*
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* When the sub-system is first enabled,
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* the sequencer will always start with the
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* lowest step (1) and continue until step (16).
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* For ex: If we have enabled 4 ADC channels and
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* currently use only 1 out of them, the
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* sequencer still configures all the 4 steps,
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* leading to 3 unwanted data.
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* Hence we need to flush out this data.
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* We check the complete FIFO. We programmed just one entry but in case
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* something went wrong we left empty handed (-EAGAIN previously) and
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* then the value apeared somehow in the FIFO we would have two entries.
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* Therefore we read every item and keep only the latest version of the
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* requested channel.
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*/
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fifo1count = tiadc_readl(adc_dev, REG_FIFO1CNT);
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for (i = 0; i < fifo1count; i++) {
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read = tiadc_readl(adc_dev, REG_FIFO1);
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stepid = read & FIFOREAD_CHNLID_MASK;
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@ -367,6 +395,7 @@ static int tiadc_read_raw(struct iio_dev *indio_dev,
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*val = (u16) read;
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}
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}
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am335x_tsc_se_adc_done(adc_dev->mfd_tscadc);
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if (found == false)
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return -EBUSY;
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@ -494,7 +523,8 @@ static int tiadc_resume(struct device *dev)
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tiadc_writel(adc_dev, REG_CTRL, restore);
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tiadc_step_config(indio_dev);
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am335x_tsc_se_set_cache(adc_dev->mfd_tscadc,
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adc_dev->buffer_en_ch_steps);
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return 0;
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}
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@ -198,7 +198,7 @@ static void titsc_step_config(struct titsc *ts_dev)
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/* The steps1 … end and bit 0 for TS_Charge */
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stepenable = (1 << (end_step + 2)) - 1;
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ts_dev->step_mask = stepenable;
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am335x_tsc_se_set(ts_dev->mfd_tscadc, ts_dev->step_mask);
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am335x_tsc_se_set_cache(ts_dev->mfd_tscadc, ts_dev->step_mask);
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}
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static void titsc_read_coordinates(struct titsc *ts_dev,
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@ -322,7 +322,7 @@ static irqreturn_t titsc_irq(int irq, void *dev)
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if (irqclr) {
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titsc_writel(ts_dev, REG_IRQSTATUS, irqclr);
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am335x_tsc_se_set(ts_dev->mfd_tscadc, ts_dev->step_mask);
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am335x_tsc_se_set_cache(ts_dev->mfd_tscadc, ts_dev->step_mask);
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return IRQ_HANDLED;
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}
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return IRQ_NONE;
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@ -24,6 +24,7 @@
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#include <linux/pm_runtime.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/sched.h>
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#include <linux/mfd/ti_am335x_tscadc.h>
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@ -48,32 +49,79 @@ static const struct regmap_config tscadc_regmap_config = {
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.val_bits = 32,
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};
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void am335x_tsc_se_update(struct ti_tscadc_dev *tsadc)
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{
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tscadc_writel(tsadc, REG_SE, tsadc->reg_se_cache);
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}
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EXPORT_SYMBOL_GPL(am335x_tsc_se_update);
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void am335x_tsc_se_set(struct ti_tscadc_dev *tsadc, u32 val)
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void am335x_tsc_se_set_cache(struct ti_tscadc_dev *tsadc, u32 val)
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{
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unsigned long flags;
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spin_lock_irqsave(&tsadc->reg_lock, flags);
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tsadc->reg_se_cache = tscadc_readl(tsadc, REG_SE);
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tsadc->reg_se_cache |= val;
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am335x_tsc_se_update(tsadc);
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tsadc->reg_se_cache = val;
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if (tsadc->adc_waiting)
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wake_up(&tsadc->reg_se_wait);
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else if (!tsadc->adc_in_use)
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tscadc_writel(tsadc, REG_SE, val);
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spin_unlock_irqrestore(&tsadc->reg_lock, flags);
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}
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EXPORT_SYMBOL_GPL(am335x_tsc_se_set);
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EXPORT_SYMBOL_GPL(am335x_tsc_se_set_cache);
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static void am335x_tscadc_need_adc(struct ti_tscadc_dev *tsadc)
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{
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DEFINE_WAIT(wait);
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u32 reg;
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/*
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* disable TSC steps so it does not run while the ADC is using it. If
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* write 0 while it is running (it just started or was already running)
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* then it completes all steps that were enabled and stops then.
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*/
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tscadc_writel(tsadc, REG_SE, 0);
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reg = tscadc_readl(tsadc, REG_ADCFSM);
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if (reg & SEQ_STATUS) {
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tsadc->adc_waiting = true;
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prepare_to_wait(&tsadc->reg_se_wait, &wait,
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TASK_UNINTERRUPTIBLE);
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spin_unlock_irq(&tsadc->reg_lock);
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schedule();
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spin_lock_irq(&tsadc->reg_lock);
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finish_wait(&tsadc->reg_se_wait, &wait);
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reg = tscadc_readl(tsadc, REG_ADCFSM);
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WARN_ON(reg & SEQ_STATUS);
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tsadc->adc_waiting = false;
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}
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tsadc->adc_in_use = true;
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}
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void am335x_tsc_se_set_once(struct ti_tscadc_dev *tsadc, u32 val)
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{
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spin_lock_irq(&tsadc->reg_lock);
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am335x_tscadc_need_adc(tsadc);
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tscadc_writel(tsadc, REG_SE, val);
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spin_unlock_irq(&tsadc->reg_lock);
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}
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EXPORT_SYMBOL_GPL(am335x_tsc_se_set_once);
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void am335x_tsc_se_adc_done(struct ti_tscadc_dev *tsadc)
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{
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unsigned long flags;
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spin_lock_irqsave(&tsadc->reg_lock, flags);
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tsadc->adc_in_use = false;
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tscadc_writel(tsadc, REG_SE, tsadc->reg_se_cache);
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spin_unlock_irqrestore(&tsadc->reg_lock, flags);
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}
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EXPORT_SYMBOL_GPL(am335x_tsc_se_adc_done);
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void am335x_tsc_se_clr(struct ti_tscadc_dev *tsadc, u32 val)
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{
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unsigned long flags;
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spin_lock_irqsave(&tsadc->reg_lock, flags);
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tsadc->reg_se_cache = tscadc_readl(tsadc, REG_SE);
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tsadc->reg_se_cache &= ~val;
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am335x_tsc_se_update(tsadc);
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tscadc_writel(tsadc, REG_SE, tsadc->reg_se_cache);
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spin_unlock_irqrestore(&tsadc->reg_lock, flags);
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}
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EXPORT_SYMBOL_GPL(am335x_tsc_se_clr);
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@ -181,6 +229,8 @@ static int ti_tscadc_probe(struct platform_device *pdev)
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}
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spin_lock_init(&tscadc->reg_lock);
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init_waitqueue_head(&tscadc->reg_se_wait);
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pm_runtime_enable(&pdev->dev);
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pm_runtime_get_sync(&pdev->dev);
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@ -302,7 +352,6 @@ static int tscadc_resume(struct device *dev)
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if (tscadc_dev->tsc_cell != -1)
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tscadc_idle_config(tscadc_dev);
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am335x_tsc_se_update(tscadc_dev);
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restore = tscadc_readl(tscadc_dev, REG_CTRL);
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tscadc_writel(tscadc_dev, REG_CTRL,
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(restore | CNTRLREG_TSCSSENB));
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@ -159,6 +159,9 @@ struct ti_tscadc_dev {
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int adc_cell; /* -1 if not used */
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struct mfd_cell cells[TSCADC_CELLS];
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u32 reg_se_cache;
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bool adc_waiting;
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bool adc_in_use;
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wait_queue_head_t reg_se_wait;
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spinlock_t reg_lock;
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unsigned int clk_div;
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@ -176,8 +179,9 @@ static inline struct ti_tscadc_dev *ti_tscadc_dev_get(struct platform_device *p)
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return *tscadc_dev;
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}
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void am335x_tsc_se_update(struct ti_tscadc_dev *tsadc);
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void am335x_tsc_se_set(struct ti_tscadc_dev *tsadc, u32 val);
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void am335x_tsc_se_set_cache(struct ti_tscadc_dev *tsadc, u32 val);
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void am335x_tsc_se_set_once(struct ti_tscadc_dev *tsadc, u32 val);
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void am335x_tsc_se_clr(struct ti_tscadc_dev *tsadc, u32 val);
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void am335x_tsc_se_adc_done(struct ti_tscadc_dev *tsadc);
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#endif
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