drm/i915: dev_priv cleanup in i915_suspend.c
And a little bit of function prototype changes. Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
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@ -3483,8 +3483,8 @@ extern int intel_connector_register(struct drm_connector *);
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extern void intel_connector_unregister(struct drm_connector *);
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extern int intel_modeset_vga_set_state(struct drm_device *dev, bool state);
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extern void intel_display_resume(struct drm_device *dev);
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extern void i915_redisable_vga(struct drm_device *dev);
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extern void i915_redisable_vga_power_on(struct drm_device *dev);
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extern void i915_redisable_vga(struct drm_i915_private *dev_priv);
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extern void i915_redisable_vga_power_on(struct drm_i915_private *dev_priv);
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extern bool ironlake_set_drps(struct drm_i915_private *dev_priv, u8 val);
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extern void intel_init_pch_refclk(struct drm_device *dev);
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extern void intel_set_rps(struct drm_i915_private *dev_priv, u8 val);
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@ -29,12 +29,10 @@
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#include "intel_drv.h"
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#include "i915_reg.h"
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static void i915_save_display(struct drm_device *dev)
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static void i915_save_display(struct drm_i915_private *dev_priv)
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{
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struct drm_i915_private *dev_priv = to_i915(dev);
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/* Display arbitration control */
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if (INTEL_INFO(dev)->gen <= 4)
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if (INTEL_GEN(dev_priv) <= 4)
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dev_priv->regfile.saveDSPARB = I915_READ(DSPARB);
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/* save FBC interval */
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@ -42,12 +40,10 @@ static void i915_save_display(struct drm_device *dev)
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dev_priv->regfile.saveFBC_CONTROL = I915_READ(FBC_CONTROL);
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}
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static void i915_restore_display(struct drm_device *dev)
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static void i915_restore_display(struct drm_i915_private *dev_priv)
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{
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struct drm_i915_private *dev_priv = to_i915(dev);
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/* Display arbitration */
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if (INTEL_INFO(dev)->gen <= 4)
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if (INTEL_GEN(dev_priv) <= 4)
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I915_WRITE(DSPARB, dev_priv->regfile.saveDSPARB);
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/* only restore FBC info on the platform that supports FBC*/
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@ -57,7 +53,7 @@ static void i915_restore_display(struct drm_device *dev)
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if (HAS_FBC(dev_priv) && INTEL_GEN(dev_priv) <= 4 && !IS_G4X(dev_priv))
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I915_WRITE(FBC_CONTROL, dev_priv->regfile.saveFBC_CONTROL);
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i915_redisable_vga(dev);
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i915_redisable_vga(dev_priv);
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}
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int i915_save_state(struct drm_device *dev)
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@ -68,14 +64,14 @@ int i915_save_state(struct drm_device *dev)
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mutex_lock(&dev->struct_mutex);
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i915_save_display(dev);
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i915_save_display(dev_priv);
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if (IS_GEN4(dev_priv))
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pci_read_config_word(pdev, GCDGMBUS,
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&dev_priv->regfile.saveGCDGMBUS);
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/* Cache mode state */
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if (INTEL_INFO(dev)->gen < 7)
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if (INTEL_GEN(dev_priv) < 7)
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dev_priv->regfile.saveCACHE_MODE_0 = I915_READ(CACHE_MODE_0);
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/* Memory Arbitration state */
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@ -119,10 +115,10 @@ int i915_restore_state(struct drm_device *dev)
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if (IS_GEN4(dev_priv))
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pci_write_config_word(pdev, GCDGMBUS,
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dev_priv->regfile.saveGCDGMBUS);
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i915_restore_display(dev);
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i915_restore_display(dev_priv);
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/* Cache mode state */
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if (INTEL_INFO(dev)->gen < 7)
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if (INTEL_GEN(dev_priv) < 7)
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I915_WRITE(CACHE_MODE_0, dev_priv->regfile.saveCACHE_MODE_0 |
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0xffff0000);
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@ -3503,7 +3503,7 @@ __intel_display_resume(struct drm_device *dev,
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int i, ret;
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intel_modeset_setup_hw_state(dev);
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i915_redisable_vga(dev);
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i915_redisable_vga(to_i915(dev));
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if (!state)
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return 0;
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@ -16319,9 +16319,8 @@ static void intel_init_quirks(struct drm_device *dev)
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}
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/* Disable the VGA plane that we never use */
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static void i915_disable_vga(struct drm_device *dev)
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static void i915_disable_vga(struct drm_i915_private *dev_priv)
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{
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struct drm_i915_private *dev_priv = to_i915(dev);
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struct pci_dev *pdev = dev_priv->drm.pdev;
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u8 sr1;
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i915_reg_t vga_reg = i915_vgacntrl_reg(dev_priv);
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@ -16524,7 +16523,7 @@ int intel_modeset_init(struct drm_device *dev)
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intel_update_max_cdclk(dev_priv);
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/* Just disable it once at startup */
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i915_disable_vga(dev);
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i915_disable_vga(dev_priv);
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intel_setup_outputs(dev);
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drm_modeset_lock_all(dev);
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@ -16770,21 +16769,18 @@ static void intel_sanitize_encoder(struct intel_encoder *encoder)
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* the crtc fixup. */
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}
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void i915_redisable_vga_power_on(struct drm_device *dev)
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void i915_redisable_vga_power_on(struct drm_i915_private *dev_priv)
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{
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struct drm_i915_private *dev_priv = to_i915(dev);
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i915_reg_t vga_reg = i915_vgacntrl_reg(dev_priv);
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if (!(I915_READ(vga_reg) & VGA_DISP_DISABLE)) {
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DRM_DEBUG_KMS("Something enabled VGA plane, disabling it\n");
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i915_disable_vga(dev);
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i915_disable_vga(dev_priv);
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}
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}
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void i915_redisable_vga(struct drm_device *dev)
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void i915_redisable_vga(struct drm_i915_private *dev_priv)
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{
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struct drm_i915_private *dev_priv = to_i915(dev);
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/* This function can be called both from intel_modeset_setup_hw_state or
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* at a very early point in our resume sequence, where the power well
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* structures are not yet restored. Since this function is at a very
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@ -16795,7 +16791,7 @@ void i915_redisable_vga(struct drm_device *dev)
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if (!intel_display_power_get_if_enabled(dev_priv, POWER_DOMAIN_VGA))
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return;
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i915_redisable_vga_power_on(dev);
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i915_redisable_vga_power_on(dev_priv);
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intel_display_power_put(dev_priv, POWER_DOMAIN_VGA);
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}
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@ -1097,7 +1097,7 @@ static void vlv_display_power_well_init(struct drm_i915_private *dev_priv)
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intel_crt_reset(&encoder->base);
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}
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i915_redisable_vga_power_on(&dev_priv->drm);
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i915_redisable_vga_power_on(dev_priv);
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intel_pps_unlock_regs_wa(dev_priv);
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}
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