clk: samsung: exynos5420: Add clock IDs needed by GPU

Adds IDs for the clocks needed by the ARM Mali GPU
in exynos5420.

Signed-off-by: Arun Kumar K <arun.kk@samsung.com>
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
This commit is contained in:
Arun Kumar K 2014-04-28 15:50:44 +05:30 committed by Tomasz Figa
parent a5b219b40c
commit 2ce262f456
2 changed files with 4 additions and 2 deletions

View file

@ -363,7 +363,7 @@ static struct samsung_mux_clock exynos5420_mux_clks[] __initdata = {
MUX(0, "mout_aclk66_psgen", aclk66_peric_p, SRC_TOP5, 4, 1),
MUX(0, "mout_user_aclk333_g2d", user_aclk333_g2d_p, SRC_TOP5, 8, 1),
MUX(0, "mout_user_aclk266_g2d", user_aclk266_g2d_p, SRC_TOP5, 12, 1),
MUX_A(0, "mout_user_aclk_g3d", user_aclk_g3d_p,
MUX_A(CLK_MOUT_G3D, "mout_user_aclk_g3d", user_aclk_g3d_p,
SRC_TOP5, 16, 1, "aclkg3d"),
MUX(0, "mout_user_aclk300_jpeg", user_aclk300_jpeg_p,
SRC_TOP5, 20, 1),
@ -373,7 +373,7 @@ static struct samsung_mux_clock exynos5420_mux_clks[] __initdata = {
SRC_TOP5, 28, 1),
MUX(0, "sclk_mpll", mpll_p, SRC_TOP6, 0, 1),
MUX(0, "sclk_vpll", vpll_p, SRC_TOP6, 4, 1),
MUX(CLK_MOUT_VPLL, "sclk_vpll", vpll_p, SRC_TOP6, 4, 1),
MUX(0, "sclk_spll", spll_p, SRC_TOP6, 8, 1),
MUX(0, "sclk_ipll", ipll_p, SRC_TOP6, 12, 1),
MUX(0, "sclk_rpll", rpll_p, SRC_TOP6, 16, 1),

View file

@ -178,6 +178,8 @@
/* mux clocks */
#define CLK_MOUT_HDMI 640
#define CLK_MOUT_G3D 641
#define CLK_MOUT_VPLL 642
/* divider clocks */
#define CLK_DOUT_PIXEL 768