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ARM: dts: vexpress: fix node name unit-address presence warnings

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Commit b993734718 ("scripts/dtc: Update to upstream version 53bf130b1cdd")
added warnings on node name unit-address presence/absence mismatch in
the device trees.

This patch fixes those warning on all the vexpress platforms where
unit-address is present in node name while the reg/ranges property is
not present.

Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
This commit is contained in:
Sudeep Holla 2016-03-07 11:54:45 +00:00
parent f55532a0c0
commit 2cff6dba57
6 changed files with 109 additions and 109 deletions
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44
arch/arm/boot/dts/vexpress-v2m-rs1.dtsi
View file

@ -75,19 +75,19 @@
compatible = "arm,vexpress-sysreg"; compatible = "arm,vexpress-sysreg";
reg = <0x010000 0x1000>; reg = <0x010000 0x1000>;
v2m_led_gpios: sys_led@08 { v2m_led_gpios: sys_led {
compatible = "arm,vexpress-sysreg,sys_led"; compatible = "arm,vexpress-sysreg,sys_led";
gpio-controller; gpio-controller;
#gpio-cells = <2>; #gpio-cells = <2>;
}; };
v2m_mmc_gpios: sys_mci@48 { v2m_mmc_gpios: sys_mci {
compatible = "arm,vexpress-sysreg,sys_mci"; compatible = "arm,vexpress-sysreg,sys_mci";
gpio-controller; gpio-controller;
#gpio-cells = <2>; #gpio-cells = <2>;
}; };
v2m_flash_gpios: sys_flash@4c { v2m_flash_gpios: sys_flash {
compatible = "arm,vexpress-sysreg,sys_flash"; compatible = "arm,vexpress-sysreg,sys_flash";
gpio-controller; gpio-controller;
#gpio-cells = <2>; #gpio-cells = <2>;
@ -286,7 +286,7 @@
}; };
}; };
v2m_fixed_3v3: fixedregulator@0 { v2m_fixed_3v3: fixed-regulator-0 {
compatible = "regulator-fixed"; compatible = "regulator-fixed";
regulator-name = "3V3"; regulator-name = "3V3";
regulator-min-microvolt = <3300000>; regulator-min-microvolt = <3300000>;
@ -318,49 +318,49 @@
leds { leds {
compatible = "gpio-leds"; compatible = "gpio-leds";
user@1 { user1 {
label = "v2m:green:user1"; label = "v2m:green:user1";
gpios = <&v2m_led_gpios 0 0>; gpios = <&v2m_led_gpios 0 0>;
linux,default-trigger = "heartbeat"; linux,default-trigger = "heartbeat";
}; };
user@2 { user2 {
label = "v2m:green:user2"; label = "v2m:green:user2";
gpios = <&v2m_led_gpios 1 0>; gpios = <&v2m_led_gpios 1 0>;
linux,default-trigger = "mmc0"; linux,default-trigger = "mmc0";
}; };
user@3 { user3 {
label = "v2m:green:user3"; label = "v2m:green:user3";
gpios = <&v2m_led_gpios 2 0>; gpios = <&v2m_led_gpios 2 0>;
linux,default-trigger = "cpu0"; linux,default-trigger = "cpu0";
}; };
user@4 { user4 {
label = "v2m:green:user4"; label = "v2m:green:user4";
gpios = <&v2m_led_gpios 3 0>; gpios = <&v2m_led_gpios 3 0>;
linux,default-trigger = "cpu1"; linux,default-trigger = "cpu1";
}; };
user@5 { user5 {
label = "v2m:green:user5"; label = "v2m:green:user5";
gpios = <&v2m_led_gpios 4 0>; gpios = <&v2m_led_gpios 4 0>;
linux,default-trigger = "cpu2"; linux,default-trigger = "cpu2";
}; };
user@6 { user6 {
label = "v2m:green:user6"; label = "v2m:green:user6";
gpios = <&v2m_led_gpios 5 0>; gpios = <&v2m_led_gpios 5 0>;
linux,default-trigger = "cpu3"; linux,default-trigger = "cpu3";
}; };
user@7 { user7 {
label = "v2m:green:user7"; label = "v2m:green:user7";
gpios = <&v2m_led_gpios 6 0>; gpios = <&v2m_led_gpios 6 0>;
linux,default-trigger = "cpu4"; linux,default-trigger = "cpu4";
}; };
user@8 { user8 {
label = "v2m:green:user8"; label = "v2m:green:user8";
gpios = <&v2m_led_gpios 7 0>; gpios = <&v2m_led_gpios 7 0>;
linux,default-trigger = "cpu5"; linux,default-trigger = "cpu5";
@ -371,7 +371,7 @@
compatible = "arm,vexpress,config-bus"; compatible = "arm,vexpress,config-bus";
arm,vexpress,config-bridge = <&v2m_sysreg>; arm,vexpress,config-bridge = <&v2m_sysreg>;
osc@0 { oscclk0 {
/* MCC static memory clock */ /* MCC static memory clock */
compatible = "arm,vexpress-osc"; compatible = "arm,vexpress-osc";
arm,vexpress-sysreg,func = <1 0>; arm,vexpress-sysreg,func = <1 0>;
@ -380,7 +380,7 @@
clock-output-names = "v2m:oscclk0"; clock-output-names = "v2m:oscclk0";
}; };
v2m_oscclk1: osc@1 { v2m_oscclk1: oscclk1 {
/* CLCD clock */ /* CLCD clock */
compatible = "arm,vexpress-osc"; compatible = "arm,vexpress-osc";
arm,vexpress-sysreg,func = <1 1>; arm,vexpress-sysreg,func = <1 1>;
@ -389,7 +389,7 @@
clock-output-names = "v2m:oscclk1"; clock-output-names = "v2m:oscclk1";
}; };
v2m_oscclk2: osc@2 { v2m_oscclk2: oscclk2 {
/* IO FPGA peripheral clock */ /* IO FPGA peripheral clock */
compatible = "arm,vexpress-osc"; compatible = "arm,vexpress-osc";
arm,vexpress-sysreg,func = <1 2>; arm,vexpress-sysreg,func = <1 2>;
@ -398,7 +398,7 @@
clock-output-names = "v2m:oscclk2"; clock-output-names = "v2m:oscclk2";
}; };
volt@0 { volt-vio {
/* Logic level voltage */ /* Logic level voltage */
compatible = "arm,vexpress-volt"; compatible = "arm,vexpress-volt";
arm,vexpress-sysreg,func = <2 0>; arm,vexpress-sysreg,func = <2 0>;
@ -407,34 +407,34 @@
label = "VIO"; label = "VIO";
}; };
temp@0 { temp-mcc {
/* MCC internal operating temperature */ /* MCC internal operating temperature */
compatible = "arm,vexpress-temp"; compatible = "arm,vexpress-temp";
arm,vexpress-sysreg,func = <4 0>; arm,vexpress-sysreg,func = <4 0>;
label = "MCC"; label = "MCC";
}; };
reset@0 { reset {
compatible = "arm,vexpress-reset"; compatible = "arm,vexpress-reset";
arm,vexpress-sysreg,func = <5 0>; arm,vexpress-sysreg,func = <5 0>;
}; };
muxfpga@0 { muxfpga {
compatible = "arm,vexpress-muxfpga"; compatible = "arm,vexpress-muxfpga";
arm,vexpress-sysreg,func = <7 0>; arm,vexpress-sysreg,func = <7 0>;
}; };
shutdown@0 { shutdown {
compatible = "arm,vexpress-shutdown"; compatible = "arm,vexpress-shutdown";
arm,vexpress-sysreg,func = <8 0>; arm,vexpress-sysreg,func = <8 0>;
}; };
reboot@0 { reboot {
compatible = "arm,vexpress-reboot"; compatible = "arm,vexpress-reboot";
arm,vexpress-sysreg,func = <9 0>; arm,vexpress-sysreg,func = <9 0>;
}; };
dvimode@0 { dvimode {
compatible = "arm,vexpress-dvimode"; compatible = "arm,vexpress-dvimode";
arm,vexpress-sysreg,func = <11 0>; arm,vexpress-sysreg,func = <11 0>;
}; };

44
arch/arm/boot/dts/vexpress-v2m.dtsi
View file

@ -74,19 +74,19 @@
compatible = "arm,vexpress-sysreg"; compatible = "arm,vexpress-sysreg";
reg = <0x00000 0x1000>; reg = <0x00000 0x1000>;
v2m_led_gpios: sys_led@08 { v2m_led_gpios: sys_led {
compatible = "arm,vexpress-sysreg,sys_led"; compatible = "arm,vexpress-sysreg,sys_led";
gpio-controller; gpio-controller;
#gpio-cells = <2>; #gpio-cells = <2>;
}; };
v2m_mmc_gpios: sys_mci@48 { v2m_mmc_gpios: sys_mci {
compatible = "arm,vexpress-sysreg,sys_mci"; compatible = "arm,vexpress-sysreg,sys_mci";
gpio-controller; gpio-controller;
#gpio-cells = <2>; #gpio-cells = <2>;
}; };
v2m_flash_gpios: sys_flash@4c { v2m_flash_gpios: sys_flash {
compatible = "arm,vexpress-sysreg,sys_flash"; compatible = "arm,vexpress-sysreg,sys_flash";
gpio-controller; gpio-controller;
#gpio-cells = <2>; #gpio-cells = <2>;
@ -285,7 +285,7 @@
}; };
}; };
v2m_fixed_3v3: fixedregulator@0 { v2m_fixed_3v3: fixed-regulator-0 {
compatible = "regulator-fixed"; compatible = "regulator-fixed";
regulator-name = "3V3"; regulator-name = "3V3";
regulator-min-microvolt = <3300000>; regulator-min-microvolt = <3300000>;
@ -317,49 +317,49 @@
leds { leds {
compatible = "gpio-leds"; compatible = "gpio-leds";
user@1 { user1 {
label = "v2m:green:user1"; label = "v2m:green:user1";
gpios = <&v2m_led_gpios 0 0>; gpios = <&v2m_led_gpios 0 0>;
linux,default-trigger = "heartbeat"; linux,default-trigger = "heartbeat";
}; };
user@2 { user2 {
label = "v2m:green:user2"; label = "v2m:green:user2";
gpios = <&v2m_led_gpios 1 0>; gpios = <&v2m_led_gpios 1 0>;
linux,default-trigger = "mmc0"; linux,default-trigger = "mmc0";
}; };
user@3 { user3 {
label = "v2m:green:user3"; label = "v2m:green:user3";
gpios = <&v2m_led_gpios 2 0>; gpios = <&v2m_led_gpios 2 0>;
linux,default-trigger = "cpu0"; linux,default-trigger = "cpu0";
}; };
user@4 { user4 {
label = "v2m:green:user4"; label = "v2m:green:user4";
gpios = <&v2m_led_gpios 3 0>; gpios = <&v2m_led_gpios 3 0>;
linux,default-trigger = "cpu1"; linux,default-trigger = "cpu1";
}; };
user@5 { user5 {
label = "v2m:green:user5"; label = "v2m:green:user5";
gpios = <&v2m_led_gpios 4 0>; gpios = <&v2m_led_gpios 4 0>;
linux,default-trigger = "cpu2"; linux,default-trigger = "cpu2";
}; };
user@6 { user6 {
label = "v2m:green:user6"; label = "v2m:green:user6";
gpios = <&v2m_led_gpios 5 0>; gpios = <&v2m_led_gpios 5 0>;
linux,default-trigger = "cpu3"; linux,default-trigger = "cpu3";
}; };
user@7 { user7 {
label = "v2m:green:user7"; label = "v2m:green:user7";
gpios = <&v2m_led_gpios 6 0>; gpios = <&v2m_led_gpios 6 0>;
linux,default-trigger = "cpu4"; linux,default-trigger = "cpu4";
}; };
user@8 { user8 {
label = "v2m:green:user8"; label = "v2m:green:user8";
gpios = <&v2m_led_gpios 7 0>; gpios = <&v2m_led_gpios 7 0>;
linux,default-trigger = "cpu5"; linux,default-trigger = "cpu5";
@ -370,7 +370,7 @@
compatible = "arm,vexpress,config-bus"; compatible = "arm,vexpress,config-bus";
arm,vexpress,config-bridge = <&v2m_sysreg>; arm,vexpress,config-bridge = <&v2m_sysreg>;
osc@0 { oscclk0 {
/* MCC static memory clock */ /* MCC static memory clock */
compatible = "arm,vexpress-osc"; compatible = "arm,vexpress-osc";
arm,vexpress-sysreg,func = <1 0>; arm,vexpress-sysreg,func = <1 0>;
@ -379,7 +379,7 @@
clock-output-names = "v2m:oscclk0"; clock-output-names = "v2m:oscclk0";
}; };
v2m_oscclk1: osc@1 { v2m_oscclk1: oscclk1 {
/* CLCD clock */ /* CLCD clock */
compatible = "arm,vexpress-osc"; compatible = "arm,vexpress-osc";
arm,vexpress-sysreg,func = <1 1>; arm,vexpress-sysreg,func = <1 1>;
@ -388,7 +388,7 @@
clock-output-names = "v2m:oscclk1"; clock-output-names = "v2m:oscclk1";
}; };
v2m_oscclk2: osc@2 { v2m_oscclk2: oscclk2 {
/* IO FPGA peripheral clock */ /* IO FPGA peripheral clock */
compatible = "arm,vexpress-osc"; compatible = "arm,vexpress-osc";
arm,vexpress-sysreg,func = <1 2>; arm,vexpress-sysreg,func = <1 2>;
@ -397,7 +397,7 @@
clock-output-names = "v2m:oscclk2"; clock-output-names = "v2m:oscclk2";
}; };
volt@0 { volt-vio {
/* Logic level voltage */ /* Logic level voltage */
compatible = "arm,vexpress-volt"; compatible = "arm,vexpress-volt";
arm,vexpress-sysreg,func = <2 0>; arm,vexpress-sysreg,func = <2 0>;
@ -406,34 +406,34 @@
label = "VIO"; label = "VIO";
}; };
temp@0 { temp-mcc {
/* MCC internal operating temperature */ /* MCC internal operating temperature */
compatible = "arm,vexpress-temp"; compatible = "arm,vexpress-temp";
arm,vexpress-sysreg,func = <4 0>; arm,vexpress-sysreg,func = <4 0>;
label = "MCC"; label = "MCC";
}; };
reset@0 { reset {
compatible = "arm,vexpress-reset"; compatible = "arm,vexpress-reset";
arm,vexpress-sysreg,func = <5 0>; arm,vexpress-sysreg,func = <5 0>;
}; };
muxfpga@0 { muxfpga {
compatible = "arm,vexpress-muxfpga"; compatible = "arm,vexpress-muxfpga";
arm,vexpress-sysreg,func = <7 0>; arm,vexpress-sysreg,func = <7 0>;
}; };
shutdown@0 { shutdown {
compatible = "arm,vexpress-shutdown"; compatible = "arm,vexpress-shutdown";
arm,vexpress-sysreg,func = <8 0>; arm,vexpress-sysreg,func = <8 0>;
}; };
reboot@0 { reboot {
compatible = "arm,vexpress-reboot"; compatible = "arm,vexpress-reboot";
arm,vexpress-sysreg,func = <9 0>; arm,vexpress-sysreg,func = <9 0>;
}; };
dvimode@0 { dvimode {
compatible = "arm,vexpress-dvimode"; compatible = "arm,vexpress-dvimode";
arm,vexpress-sysreg,func = <11 0>; arm,vexpress-sysreg,func = <11 0>;
}; };

34
arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dts
View file

@ -55,14 +55,14 @@
compatible = "arm,hdlcd"; compatible = "arm,hdlcd";
reg = <0 0x2b000000 0 0x1000>; reg = <0 0x2b000000 0 0x1000>;
interrupts = <0 85 4>; interrupts = <0 85 4>;
clocks = <&oscclk5>; clocks = <&hdlcd_clk>;
clock-names = "pxlclk"; clock-names = "pxlclk";
}; };
memory-controller@2b0a0000 { memory-controller@2b0a0000 {
compatible = "arm,pl341", "arm,primecell"; compatible = "arm,pl341", "arm,primecell";
reg = <0 0x2b0a0000 0 0x1000>; reg = <0 0x2b0a0000 0 0x1000>;
clocks = <&oscclk7>; clocks = <&sys_pll>;
clock-names = "apb_pclk"; clock-names = "apb_pclk";
}; };
@ -71,7 +71,7 @@
status = "disabled"; status = "disabled";
reg = <0 0x2b060000 0 0x1000>; reg = <0 0x2b060000 0 0x1000>;
interrupts = <0 98 4>; interrupts = <0 98 4>;
clocks = <&oscclk7>; clocks = <&sys_pll>;
clock-names = "apb_pclk"; clock-names = "apb_pclk";
}; };
@ -92,7 +92,7 @@
reg = <0 0x7ffd0000 0 0x1000>; reg = <0 0x7ffd0000 0 0x1000>;
interrupts = <0 86 4>, interrupts = <0 86 4>,
<0 87 4>; <0 87 4>;
clocks = <&oscclk7>; clocks = <&sys_pll>;
clock-names = "apb_pclk"; clock-names = "apb_pclk";
}; };
@ -104,7 +104,7 @@
<0 89 4>, <0 89 4>,
<0 90 4>, <0 90 4>,
<0 91 4>; <0 91 4>;
clocks = <&oscclk7>; clocks = <&sys_pll>;
clock-names = "apb_pclk"; clock-names = "apb_pclk";
}; };
@ -126,7 +126,7 @@
compatible = "arm,vexpress,config-bus"; compatible = "arm,vexpress,config-bus";
arm,vexpress,config-bridge = <&v2m_sysreg>; arm,vexpress,config-bridge = <&v2m_sysreg>;
osc@0 { oscclk0 {
/* CPU PLL reference clock */ /* CPU PLL reference clock */
compatible = "arm,vexpress-osc"; compatible = "arm,vexpress-osc";
arm,vexpress-sysreg,func = <1 0>; arm,vexpress-sysreg,func = <1 0>;
@ -135,7 +135,7 @@
clock-output-names = "oscclk0"; clock-output-names = "oscclk0";
}; };
osc@4 { oscclk4 {
/* Multiplexed AXI master clock */ /* Multiplexed AXI master clock */
compatible = "arm,vexpress-osc"; compatible = "arm,vexpress-osc";
arm,vexpress-sysreg,func = <1 4>; arm,vexpress-sysreg,func = <1 4>;
@ -144,7 +144,7 @@
clock-output-names = "oscclk4"; clock-output-names = "oscclk4";
}; };
oscclk5: osc@5 { hdlcd_clk: oscclk5 {
/* HDLCD PLL reference clock */ /* HDLCD PLL reference clock */
compatible = "arm,vexpress-osc"; compatible = "arm,vexpress-osc";
arm,vexpress-sysreg,func = <1 5>; arm,vexpress-sysreg,func = <1 5>;
@ -153,7 +153,7 @@
clock-output-names = "oscclk5"; clock-output-names = "oscclk5";
}; };
smbclk: osc@6 { smbclk: oscclk6 {
/* SMB clock */ /* SMB clock */
compatible = "arm,vexpress-osc"; compatible = "arm,vexpress-osc";
arm,vexpress-sysreg,func = <1 6>; arm,vexpress-sysreg,func = <1 6>;
@ -162,7 +162,7 @@
clock-output-names = "oscclk6"; clock-output-names = "oscclk6";
}; };
oscclk7: osc@7 { sys_pll: oscclk7 {
/* SYS PLL reference clock */ /* SYS PLL reference clock */
compatible = "arm,vexpress-osc"; compatible = "arm,vexpress-osc";
arm,vexpress-sysreg,func = <1 7>; arm,vexpress-sysreg,func = <1 7>;
@ -171,7 +171,7 @@
clock-output-names = "oscclk7"; clock-output-names = "oscclk7";
}; };
osc@8 { oscclk8 {
/* DDR2 PLL reference clock */ /* DDR2 PLL reference clock */
compatible = "arm,vexpress-osc"; compatible = "arm,vexpress-osc";
arm,vexpress-sysreg,func = <1 8>; arm,vexpress-sysreg,func = <1 8>;
@ -180,7 +180,7 @@
clock-output-names = "oscclk8"; clock-output-names = "oscclk8";
}; };
volt@0 { volt-cores {
/* CPU core voltage */ /* CPU core voltage */
compatible = "arm,vexpress-volt"; compatible = "arm,vexpress-volt";
arm,vexpress-sysreg,func = <2 0>; arm,vexpress-sysreg,func = <2 0>;
@ -191,28 +191,28 @@
label = "Cores"; label = "Cores";
}; };
amp@0 { amp-cores {
/* Total current for the two cores */ /* Total current for the two cores */
compatible = "arm,vexpress-amp"; compatible = "arm,vexpress-amp";
arm,vexpress-sysreg,func = <3 0>; arm,vexpress-sysreg,func = <3 0>;
label = "Cores"; label = "Cores";
}; };
temp@0 { temp-dcc {
/* DCC internal temperature */ /* DCC internal temperature */
compatible = "arm,vexpress-temp"; compatible = "arm,vexpress-temp";
arm,vexpress-sysreg,func = <4 0>; arm,vexpress-sysreg,func = <4 0>;
label = "DCC"; label = "DCC";
}; };
power@0 { power-cores {
/* Total power */ /* Total power */
compatible = "arm,vexpress-power"; compatible = "arm,vexpress-power";
arm,vexpress-sysreg,func = <12 0>; arm,vexpress-sysreg,func = <12 0>;
label = "Cores"; label = "Cores";
}; };
energy@0 { energy {
/* Total energy */ /* Total energy */
compatible = "arm,vexpress-energy"; compatible = "arm,vexpress-energy";
arm,vexpress-sysreg,func = <13 0>; arm,vexpress-sysreg,func = <13 0>;
@ -220,7 +220,7 @@
}; };
}; };
smb { smb@08000000 {
compatible = "simple-bus"; compatible = "simple-bus";
#address-cells = <2>; #address-cells = <2>;

44
arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts
View file

@ -109,7 +109,7 @@
compatible = "arm,hdlcd"; compatible = "arm,hdlcd";
reg = <0 0x2b000000 0 0x1000>; reg = <0 0x2b000000 0 0x1000>;
interrupts = <0 85 4>; interrupts = <0 85 4>;
clocks = <&oscclk5>; clocks = <&hdlcd_clk>;
clock-names = "pxlclk"; clock-names = "pxlclk";
}; };
@ -227,7 +227,7 @@
compatible = "arm,vexpress,config-bus"; compatible = "arm,vexpress,config-bus";
arm,vexpress,config-bridge = <&v2m_sysreg>; arm,vexpress,config-bridge = <&v2m_sysreg>;
osc@0 { oscclk0 {
/* A15 PLL 0 reference clock */ /* A15 PLL 0 reference clock */
compatible = "arm,vexpress-osc"; compatible = "arm,vexpress-osc";
arm,vexpress-sysreg,func = <1 0>; arm,vexpress-sysreg,func = <1 0>;
@ -236,7 +236,7 @@
clock-output-names = "oscclk0"; clock-output-names = "oscclk0";
}; };
osc@1 { oscclk1 {
/* A15 PLL 1 reference clock */ /* A15 PLL 1 reference clock */
compatible = "arm,vexpress-osc"; compatible = "arm,vexpress-osc";
arm,vexpress-sysreg,func = <1 1>; arm,vexpress-sysreg,func = <1 1>;
@ -245,7 +245,7 @@
clock-output-names = "oscclk1"; clock-output-names = "oscclk1";
}; };
osc@2 { oscclk2 {
/* A7 PLL 0 reference clock */ /* A7 PLL 0 reference clock */
compatible = "arm,vexpress-osc"; compatible = "arm,vexpress-osc";
arm,vexpress-sysreg,func = <1 2>; arm,vexpress-sysreg,func = <1 2>;
@ -254,7 +254,7 @@
clock-output-names = "oscclk2"; clock-output-names = "oscclk2";
}; };
osc@3 { oscclk3 {
/* A7 PLL 1 reference clock */ /* A7 PLL 1 reference clock */
compatible = "arm,vexpress-osc"; compatible = "arm,vexpress-osc";
arm,vexpress-sysreg,func = <1 3>; arm,vexpress-sysreg,func = <1 3>;
@ -263,7 +263,7 @@
clock-output-names = "oscclk3"; clock-output-names = "oscclk3";
}; };
osc@4 { oscclk4 {
/* External AXI master clock */ /* External AXI master clock */
compatible = "arm,vexpress-osc"; compatible = "arm,vexpress-osc";
arm,vexpress-sysreg,func = <1 4>; arm,vexpress-sysreg,func = <1 4>;
@ -272,7 +272,7 @@
clock-output-names = "oscclk4"; clock-output-names = "oscclk4";
}; };
oscclk5: osc@5 { hdlcd_clk: oscclk5 {
/* HDLCD PLL reference clock */ /* HDLCD PLL reference clock */
compatible = "arm,vexpress-osc"; compatible = "arm,vexpress-osc";
arm,vexpress-sysreg,func = <1 5>; arm,vexpress-sysreg,func = <1 5>;
@ -281,7 +281,7 @@
clock-output-names = "oscclk5"; clock-output-names = "oscclk5";
}; };
smbclk: osc@6 { smbclk: oscclk6 {
/* Static memory controller clock */ /* Static memory controller clock */
compatible = "arm,vexpress-osc"; compatible = "arm,vexpress-osc";
arm,vexpress-sysreg,func = <1 6>; arm,vexpress-sysreg,func = <1 6>;
@ -290,7 +290,7 @@
clock-output-names = "oscclk6"; clock-output-names = "oscclk6";
}; };
osc@7 { oscclk7 {
/* SYS PLL reference clock */ /* SYS PLL reference clock */
compatible = "arm,vexpress-osc"; compatible = "arm,vexpress-osc";
arm,vexpress-sysreg,func = <1 7>; arm,vexpress-sysreg,func = <1 7>;
@ -299,7 +299,7 @@
clock-output-names = "oscclk7"; clock-output-names = "oscclk7";
}; };
osc@8 { oscclk8 {
/* DDR2 PLL reference clock */ /* DDR2 PLL reference clock */
compatible = "arm,vexpress-osc"; compatible = "arm,vexpress-osc";
arm,vexpress-sysreg,func = <1 8>; arm,vexpress-sysreg,func = <1 8>;
@ -308,7 +308,7 @@
clock-output-names = "oscclk8"; clock-output-names = "oscclk8";
}; };
volt@0 { volt-a15 {
/* A15 CPU core voltage */ /* A15 CPU core voltage */
compatible = "arm,vexpress-volt"; compatible = "arm,vexpress-volt";
arm,vexpress-sysreg,func = <2 0>; arm,vexpress-sysreg,func = <2 0>;
@ -319,7 +319,7 @@
label = "A15 Vcore"; label = "A15 Vcore";
}; };
volt@1 { volt-a7 {
/* A7 CPU core voltage */ /* A7 CPU core voltage */
compatible = "arm,vexpress-volt"; compatible = "arm,vexpress-volt";
arm,vexpress-sysreg,func = <2 1>; arm,vexpress-sysreg,func = <2 1>;
@ -330,49 +330,49 @@
label = "A7 Vcore"; label = "A7 Vcore";
}; };
amp@0 { amp-a15 {
/* Total current for the two A15 cores */ /* Total current for the two A15 cores */
compatible = "arm,vexpress-amp"; compatible = "arm,vexpress-amp";
arm,vexpress-sysreg,func = <3 0>; arm,vexpress-sysreg,func = <3 0>;
label = "A15 Icore"; label = "A15 Icore";
}; };
amp@1 { amp-a7 {
/* Total current for the three A7 cores */ /* Total current for the three A7 cores */
compatible = "arm,vexpress-amp"; compatible = "arm,vexpress-amp";
arm,vexpress-sysreg,func = <3 1>; arm,vexpress-sysreg,func = <3 1>;
label = "A7 Icore"; label = "A7 Icore";
}; };
temp@0 { temp-dcc {
/* DCC internal temperature */ /* DCC internal temperature */
compatible = "arm,vexpress-temp"; compatible = "arm,vexpress-temp";
arm,vexpress-sysreg,func = <4 0>; arm,vexpress-sysreg,func = <4 0>;
label = "DCC"; label = "DCC";
}; };
power@0 { power-a15 {
/* Total power for the two A15 cores */ /* Total power for the two A15 cores */
compatible = "arm,vexpress-power"; compatible = "arm,vexpress-power";
arm,vexpress-sysreg,func = <12 0>; arm,vexpress-sysreg,func = <12 0>;
label = "A15 Pcore"; label = "A15 Pcore";
}; };
power@1 { power-a7 {
/* Total power for the three A7 cores */ /* Total power for the three A7 cores */
compatible = "arm,vexpress-power"; compatible = "arm,vexpress-power";
arm,vexpress-sysreg,func = <12 1>; arm,vexpress-sysreg,func = <12 1>;
label = "A7 Pcore"; label = "A7 Pcore";
}; };
energy@0 { energy-a15 {
/* Total energy for the two A15 cores */ /* Total energy for the two A15 cores */
compatible = "arm,vexpress-energy"; compatible = "arm,vexpress-energy";
arm,vexpress-sysreg,func = <13 0>, <13 1>; arm,vexpress-sysreg,func = <13 0>, <13 1>;
label = "A15 Jcore"; label = "A15 Jcore";
}; };
energy@2 { energy-a7 {
/* Total energy for the three A7 cores */ /* Total energy for the three A7 cores */
compatible = "arm,vexpress-energy"; compatible = "arm,vexpress-energy";
arm,vexpress-sysreg,func = <13 2>, <13 3>; arm,vexpress-sysreg,func = <13 2>, <13 3>;
@ -387,7 +387,7 @@
clocks = <&oscclk6a>; clocks = <&oscclk6a>;
clock-names = "apb_pclk"; clock-names = "apb_pclk";
port { port {
etb_in_port: endpoint@0 { etb_in_port: endpoint {
slave-mode; slave-mode;
remote-endpoint = <&replicator_out_port0>; remote-endpoint = <&replicator_out_port0>;
}; };
@ -401,7 +401,7 @@
clocks = <&oscclk6a>; clocks = <&oscclk6a>;
clock-names = "apb_pclk"; clock-names = "apb_pclk";
port { port {
tpiu_in_port: endpoint@0 { tpiu_in_port: endpoint {
slave-mode; slave-mode;
remote-endpoint = <&replicator_out_port1>; remote-endpoint = <&replicator_out_port1>;
}; };
@ -578,7 +578,7 @@
}; };
}; };
smb { smb@08000000 {
compatible = "simple-bus"; compatible = "simple-bus";
#address-cells = <2>; #address-cells = <2>;

24
arch/arm/boot/dts/vexpress-v2p-ca5s.dts
View file

@ -57,14 +57,14 @@
compatible = "arm,hdlcd"; compatible = "arm,hdlcd";
reg = <0x2a110000 0x1000>; reg = <0x2a110000 0x1000>;
interrupts = <0 85 4>; interrupts = <0 85 4>;
clocks = <&oscclk3>; clocks = <&hdlcd_clk>;
clock-names = "pxlclk"; clock-names = "pxlclk";
}; };
memory-controller@2a150000 { memory-controller@2a150000 {
compatible = "arm,pl341", "arm,primecell"; compatible = "arm,pl341", "arm,primecell";
reg = <0x2a150000 0x1000>; reg = <0x2a150000 0x1000>;
clocks = <&oscclk1>; clocks = <&axi_clk>;
clock-names = "apb_pclk"; clock-names = "apb_pclk";
}; };
@ -73,7 +73,7 @@
reg = <0x2a190000 0x1000>; reg = <0x2a190000 0x1000>;
interrupts = <0 86 4>, interrupts = <0 86 4>,
<0 87 4>; <0 87 4>;
clocks = <&oscclk1>; clocks = <&axi_clk>;
clock-names = "apb_pclk"; clock-names = "apb_pclk";
}; };
@ -93,7 +93,7 @@
"arm,cortex-a9-global-timer"; "arm,cortex-a9-global-timer";
reg = <0x2c000200 0x20>; reg = <0x2c000200 0x20>;
interrupts = <1 11 0x304>; interrupts = <1 11 0x304>;
clocks = <&oscclk0>; clocks = <&cpu_clk>;
}; };
watchdog@2c000620 { watchdog@2c000620 {
@ -128,7 +128,7 @@
compatible = "arm,vexpress,config-bus"; compatible = "arm,vexpress,config-bus";
arm,vexpress,config-bridge = <&v2m_sysreg>; arm,vexpress,config-bridge = <&v2m_sysreg>;
oscclk0: osc@0 { cpu_clk: oscclk0 {
/* CPU and internal AXI reference clock */ /* CPU and internal AXI reference clock */
compatible = "arm,vexpress-osc"; compatible = "arm,vexpress-osc";
arm,vexpress-sysreg,func = <1 0>; arm,vexpress-sysreg,func = <1 0>;
@ -137,7 +137,7 @@
clock-output-names = "oscclk0"; clock-output-names = "oscclk0";
}; };
oscclk1: osc@1 { axi_clk: oscclk1 {
/* Multiplexed AXI master clock */ /* Multiplexed AXI master clock */
compatible = "arm,vexpress-osc"; compatible = "arm,vexpress-osc";
arm,vexpress-sysreg,func = <1 1>; arm,vexpress-sysreg,func = <1 1>;
@ -146,7 +146,7 @@
clock-output-names = "oscclk1"; clock-output-names = "oscclk1";
}; };
osc@2 { oscclk2 {
/* DDR2 */ /* DDR2 */
compatible = "arm,vexpress-osc"; compatible = "arm,vexpress-osc";
arm,vexpress-sysreg,func = <1 2>; arm,vexpress-sysreg,func = <1 2>;
@ -155,7 +155,7 @@
clock-output-names = "oscclk2"; clock-output-names = "oscclk2";
}; };
oscclk3: osc@3 { hdlcd_clk: oscclk3 {
/* HDLCD */ /* HDLCD */
compatible = "arm,vexpress-osc"; compatible = "arm,vexpress-osc";
arm,vexpress-sysreg,func = <1 3>; arm,vexpress-sysreg,func = <1 3>;
@ -164,7 +164,7 @@
clock-output-names = "oscclk3"; clock-output-names = "oscclk3";
}; };
osc@4 { oscclk4 {
/* Test chip gate configuration */ /* Test chip gate configuration */
compatible = "arm,vexpress-osc"; compatible = "arm,vexpress-osc";
arm,vexpress-sysreg,func = <1 4>; arm,vexpress-sysreg,func = <1 4>;
@ -173,7 +173,7 @@
clock-output-names = "oscclk4"; clock-output-names = "oscclk4";
}; };
smbclk: osc@5 { smbclk: oscclk5 {
/* SMB clock */ /* SMB clock */
compatible = "arm,vexpress-osc"; compatible = "arm,vexpress-osc";
arm,vexpress-sysreg,func = <1 5>; arm,vexpress-sysreg,func = <1 5>;
@ -182,7 +182,7 @@
clock-output-names = "oscclk5"; clock-output-names = "oscclk5";
}; };
temp@0 { temp-dcc {
/* DCC internal operating temperature */ /* DCC internal operating temperature */
compatible = "arm,vexpress-temp"; compatible = "arm,vexpress-temp";
arm,vexpress-sysreg,func = <4 0>; arm,vexpress-sysreg,func = <4 0>;
@ -190,7 +190,7 @@
}; };
}; };
smb { smb@08000000 {
compatible = "simple-bus"; compatible = "simple-bus";
#address-cells = <2>; #address-cells = <2>;

28
arch/arm/boot/dts/vexpress-v2p-ca9.dts
View file

@ -190,7 +190,7 @@
compatible = "arm,vexpress,config-bus"; compatible = "arm,vexpress,config-bus";
arm,vexpress,config-bridge = <&v2m_sysreg>; arm,vexpress,config-bridge = <&v2m_sysreg>;
osc@0 { oscclk0: extsaxiclk {
/* ACLK clock to the AXI master port on the test chip */ /* ACLK clock to the AXI master port on the test chip */
compatible = "arm,vexpress-osc"; compatible = "arm,vexpress-osc";
arm,vexpress-sysreg,func = <1 0>; arm,vexpress-sysreg,func = <1 0>;
@ -199,7 +199,7 @@
clock-output-names = "extsaxiclk"; clock-output-names = "extsaxiclk";
}; };
oscclk1: osc@1 { oscclk1: clcdclk {
/* Reference clock for the CLCD */ /* Reference clock for the CLCD */
compatible = "arm,vexpress-osc"; compatible = "arm,vexpress-osc";
arm,vexpress-sysreg,func = <1 1>; arm,vexpress-sysreg,func = <1 1>;
@ -208,7 +208,7 @@
clock-output-names = "clcdclk"; clock-output-names = "clcdclk";
}; };
smbclk: oscclk2: osc@2 { smbclk: oscclk2: tcrefclk {
/* Reference clock for the test chip internal PLLs */ /* Reference clock for the test chip internal PLLs */
compatible = "arm,vexpress-osc"; compatible = "arm,vexpress-osc";
arm,vexpress-sysreg,func = <1 2>; arm,vexpress-sysreg,func = <1 2>;
@ -217,7 +217,7 @@
clock-output-names = "tcrefclk"; clock-output-names = "tcrefclk";
}; };
volt@0 { volt-vd10 {
/* Test Chip internal logic voltage */ /* Test Chip internal logic voltage */
compatible = "arm,vexpress-volt"; compatible = "arm,vexpress-volt";
arm,vexpress-sysreg,func = <2 0>; arm,vexpress-sysreg,func = <2 0>;
@ -226,7 +226,7 @@
label = "VD10"; label = "VD10";
}; };
volt@1 { volt-vd10-s2 {
/* PL310, L2 cache, RAM cell supply (not PL310 logic) */ /* PL310, L2 cache, RAM cell supply (not PL310 logic) */
compatible = "arm,vexpress-volt"; compatible = "arm,vexpress-volt";
arm,vexpress-sysreg,func = <2 1>; arm,vexpress-sysreg,func = <2 1>;
@ -235,7 +235,7 @@
label = "VD10_S2"; label = "VD10_S2";
}; };
volt@2 { volt-vd10-s3 {
/* Cortex-A9 system supply, Cores, MPEs, SCU and PL310 logic */ /* Cortex-A9 system supply, Cores, MPEs, SCU and PL310 logic */
compatible = "arm,vexpress-volt"; compatible = "arm,vexpress-volt";
arm,vexpress-sysreg,func = <2 2>; arm,vexpress-sysreg,func = <2 2>;
@ -244,7 +244,7 @@
label = "VD10_S3"; label = "VD10_S3";
}; };
volt@3 { volt-vcc1v8 {
/* DDR2 SDRAM and Test Chip DDR2 I/O supply */ /* DDR2 SDRAM and Test Chip DDR2 I/O supply */
compatible = "arm,vexpress-volt"; compatible = "arm,vexpress-volt";
arm,vexpress-sysreg,func = <2 3>; arm,vexpress-sysreg,func = <2 3>;
@ -253,7 +253,7 @@
label = "VCC1V8"; label = "VCC1V8";
}; };
volt@4 { volt-ddr2vtt {
/* DDR2 SDRAM VTT termination voltage */ /* DDR2 SDRAM VTT termination voltage */
compatible = "arm,vexpress-volt"; compatible = "arm,vexpress-volt";
arm,vexpress-sysreg,func = <2 4>; arm,vexpress-sysreg,func = <2 4>;
@ -262,7 +262,7 @@
label = "DDR2VTT"; label = "DDR2VTT";
}; };
volt@5 { volt-vcc3v3 {
/* Local board supply for miscellaneous logic external to the Test Chip */ /* Local board supply for miscellaneous logic external to the Test Chip */
arm,vexpress-sysreg,func = <2 5>; arm,vexpress-sysreg,func = <2 5>;
compatible = "arm,vexpress-volt"; compatible = "arm,vexpress-volt";
@ -271,28 +271,28 @@
label = "VCC3V3"; label = "VCC3V3";
}; };
amp@0 { amp-vd10-s2 {
/* PL310, L2 cache, RAM cell supply (not PL310 logic) */ /* PL310, L2 cache, RAM cell supply (not PL310 logic) */
compatible = "arm,vexpress-amp"; compatible = "arm,vexpress-amp";
arm,vexpress-sysreg,func = <3 0>; arm,vexpress-sysreg,func = <3 0>;
label = "VD10_S2"; label = "VD10_S2";
}; };
amp@1 { amp-vd10-s3 {
/* Cortex-A9 system supply, Cores, MPEs, SCU and PL310 logic */ /* Cortex-A9 system supply, Cores, MPEs, SCU and PL310 logic */
compatible = "arm,vexpress-amp"; compatible = "arm,vexpress-amp";
arm,vexpress-sysreg,func = <3 1>; arm,vexpress-sysreg,func = <3 1>;
label = "VD10_S3"; label = "VD10_S3";
}; };
power@0 { power-vd10-s2 {
/* PL310, L2 cache, RAM cell supply (not PL310 logic) */ /* PL310, L2 cache, RAM cell supply (not PL310 logic) */
compatible = "arm,vexpress-power"; compatible = "arm,vexpress-power";
arm,vexpress-sysreg,func = <12 0>; arm,vexpress-sysreg,func = <12 0>;
label = "PVD10_S2"; label = "PVD10_S2";
}; };
power@1 { power-vd10-s3 {
/* Cortex-A9 system supply, Cores, MPEs, SCU and PL310 logic */ /* Cortex-A9 system supply, Cores, MPEs, SCU and PL310 logic */
compatible = "arm,vexpress-power"; compatible = "arm,vexpress-power";
arm,vexpress-sysreg,func = <12 1>; arm,vexpress-sysreg,func = <12 1>;
@ -300,7 +300,7 @@
}; };
}; };
smb { smb@04000000 {
compatible = "simple-bus"; compatible = "simple-bus";
#address-cells = <2>; #address-cells = <2>;