Merge branch 'irq-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull irq updates from Thomas Gleixner: "A small set of updates mostly for irq chip drivers: - MIPS GIC fix for spurious, masked interrupts - fix for a subtle IPI bug in GICv3 - do not probe GICv3 ITSs that are marked as disabled - multi-MSI support for GICv2m - various small cleanups" * 'irq-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: irqdomain: Re-use DEFINE_SHOW_ATTRIBUTE() macro irqchip/bcm: Remove hashed address printing irqchip/gic-v2m: Add PCI Multi-MSI support irqchip/gic-v3: Ignore disabled ITS nodes irqchip/gic-v3: Use wmb() instead of smb_wmb() in gic_raise_softirq() irqchip/gic-v3: Change pr_debug message to pr_devel irqchip/mips-gic: Avoid spuriously handling masked interrupts
This commit is contained in:
commit
2d6c4e40ab
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@ -339,9 +339,6 @@ int __init bcm7038_l1_of_init(struct device_node *dn,
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goto out_unmap;
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}
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pr_info("registered BCM7038 L1 intc (mem: 0x%p, IRQs: %d)\n",
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intc->cpus[0]->map_base, IRQS_PER_WORD * intc->n_words);
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return 0;
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out_unmap:
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@ -318,9 +318,6 @@ static int __init bcm7120_l2_intc_probe(struct device_node *dn,
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}
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}
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pr_info("registered %s intc (mem: 0x%p, parent IRQ(s): %d)\n",
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intc_name, data->map_base[0], data->num_parent_irqs);
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return 0;
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out_free_domain:
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@ -262,9 +262,6 @@ static int __init brcmstb_l2_intc_of_init(struct device_node *np,
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ct->chip.irq_set_wake = irq_gc_set_wake;
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}
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pr_info("registered L2 intc (mem: 0x%p, parent irq: %d)\n",
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base, parent_irq);
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return 0;
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out_free_domain:
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@ -94,7 +94,7 @@ static struct irq_chip gicv2m_msi_irq_chip = {
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static struct msi_domain_info gicv2m_msi_domain_info = {
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.flags = (MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS |
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MSI_FLAG_PCI_MSIX),
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MSI_FLAG_PCI_MSIX | MSI_FLAG_MULTI_PCI_MSI),
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.chip = &gicv2m_msi_irq_chip,
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};
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@ -155,18 +155,12 @@ static int gicv2m_irq_gic_domain_alloc(struct irq_domain *domain,
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return 0;
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}
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static void gicv2m_unalloc_msi(struct v2m_data *v2m, unsigned int hwirq)
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static void gicv2m_unalloc_msi(struct v2m_data *v2m, unsigned int hwirq,
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int nr_irqs)
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{
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int pos;
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pos = hwirq - v2m->spi_start;
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if (pos < 0 || pos >= v2m->nr_spis) {
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pr_err("Failed to teardown msi. Invalid hwirq %d\n", hwirq);
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return;
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}
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spin_lock(&v2m_lock);
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__clear_bit(pos, v2m->bm);
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bitmap_release_region(v2m->bm, hwirq - v2m->spi_start,
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get_count_order(nr_irqs));
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spin_unlock(&v2m_lock);
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}
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@ -174,13 +168,13 @@ static int gicv2m_irq_domain_alloc(struct irq_domain *domain, unsigned int virq,
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unsigned int nr_irqs, void *args)
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{
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struct v2m_data *v2m = NULL, *tmp;
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int hwirq, offset, err = 0;
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int hwirq, offset, i, err = 0;
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spin_lock(&v2m_lock);
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list_for_each_entry(tmp, &v2m_nodes, entry) {
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offset = find_first_zero_bit(tmp->bm, tmp->nr_spis);
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if (offset < tmp->nr_spis) {
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__set_bit(offset, tmp->bm);
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offset = bitmap_find_free_region(tmp->bm, tmp->nr_spis,
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get_count_order(nr_irqs));
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if (offset >= 0) {
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v2m = tmp;
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break;
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}
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@ -192,16 +186,21 @@ static int gicv2m_irq_domain_alloc(struct irq_domain *domain, unsigned int virq,
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hwirq = v2m->spi_start + offset;
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err = gicv2m_irq_gic_domain_alloc(domain, virq, hwirq);
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if (err) {
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gicv2m_unalloc_msi(v2m, hwirq);
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return err;
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for (i = 0; i < nr_irqs; i++) {
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err = gicv2m_irq_gic_domain_alloc(domain, virq + i, hwirq + i);
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if (err)
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goto fail;
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irq_domain_set_hwirq_and_chip(domain, virq + i, hwirq + i,
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&gicv2m_irq_chip, v2m);
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}
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irq_domain_set_hwirq_and_chip(domain, virq, hwirq,
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&gicv2m_irq_chip, v2m);
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return 0;
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fail:
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irq_domain_free_irqs_parent(domain, virq, nr_irqs);
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gicv2m_unalloc_msi(v2m, hwirq, get_count_order(nr_irqs));
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return err;
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}
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static void gicv2m_irq_domain_free(struct irq_domain *domain,
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@ -210,8 +209,7 @@ static void gicv2m_irq_domain_free(struct irq_domain *domain,
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struct irq_data *d = irq_domain_get_irq_data(domain, virq);
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struct v2m_data *v2m = irq_data_get_irq_chip_data(d);
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BUG_ON(nr_irqs != 1);
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gicv2m_unalloc_msi(v2m, d->hwirq);
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gicv2m_unalloc_msi(v2m, d->hwirq, nr_irqs);
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irq_domain_free_irqs_parent(domain, virq, nr_irqs);
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}
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@ -132,6 +132,8 @@ static int __init its_pci_of_msi_init(void)
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for (np = of_find_matching_node(NULL, its_device_id); np;
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np = of_find_matching_node(np, its_device_id)) {
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if (!of_device_is_available(np))
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continue;
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if (!of_property_read_bool(np, "msi-controller"))
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continue;
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@ -154,6 +154,8 @@ static void __init its_pmsi_of_init(void)
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for (np = of_find_matching_node(NULL, its_device_id); np;
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np = of_find_matching_node(np, its_device_id)) {
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if (!of_device_is_available(np))
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continue;
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if (!of_property_read_bool(np, "msi-controller"))
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continue;
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@ -3314,6 +3314,8 @@ static int __init its_of_probe(struct device_node *node)
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for (np = of_find_matching_node(node, its_device_id); np;
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np = of_find_matching_node(np, its_device_id)) {
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if (!of_device_is_available(np))
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continue;
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if (!of_property_read_bool(np, "msi-controller")) {
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pr_warn("%pOF: no msi-controller property, ITS ignored\n",
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np);
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@ -673,7 +673,7 @@ static void gic_send_sgi(u64 cluster_id, u16 tlist, unsigned int irq)
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MPIDR_TO_SGI_RS(cluster_id) |
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tlist << ICC_SGI1R_TARGET_LIST_SHIFT);
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pr_debug("CPU%d: ICC_SGI1R_EL1 %llx\n", smp_processor_id(), val);
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pr_devel("CPU%d: ICC_SGI1R_EL1 %llx\n", smp_processor_id(), val);
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gic_write_sgi1r(val);
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}
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@ -688,7 +688,7 @@ static void gic_raise_softirq(const struct cpumask *mask, unsigned int irq)
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* Ensure that stores to Normal memory are visible to the
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* other CPUs before issuing the IPI.
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*/
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smp_wmb();
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wmb();
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for_each_cpu(cpu, mask) {
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u64 cluster_id = MPIDR_TO_SGI_CLUSTER_ID(cpu_logical_map(cpu));
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@ -424,8 +424,6 @@ static int gic_shared_irq_domain_map(struct irq_domain *d, unsigned int virq,
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spin_lock_irqsave(&gic_lock, flags);
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write_gic_map_pin(intr, GIC_MAP_PIN_MAP_TO_PIN | gic_cpu_pin);
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write_gic_map_vp(intr, BIT(mips_cm_vp_id(cpu)));
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gic_clear_pcpu_masks(intr);
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set_bit(intr, per_cpu_ptr(pcpu_masks, cpu));
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irq_data_update_effective_affinity(data, cpumask_of(cpu));
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spin_unlock_irqrestore(&gic_lock, flags);
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@ -73,6 +73,8 @@ static int __init its_fsl_mc_msi_init(void)
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for (np = of_find_matching_node(NULL, its_device_id); np;
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np = of_find_matching_node(np, its_device_id)) {
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if (!of_device_is_available(np))
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continue;
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if (!of_property_read_bool(np, "msi-controller"))
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continue;
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@ -1726,25 +1726,14 @@ static int irq_domain_debug_show(struct seq_file *m, void *p)
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irq_domain_debug_show_one(m, d, 0);
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return 0;
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}
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static int irq_domain_debug_open(struct inode *inode, struct file *file)
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{
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return single_open(file, irq_domain_debug_show, inode->i_private);
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}
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static const struct file_operations dfs_domain_ops = {
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.open = irq_domain_debug_open,
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.read = seq_read,
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.llseek = seq_lseek,
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.release = single_release,
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};
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DEFINE_SHOW_ATTRIBUTE(irq_domain_debug);
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static void debugfs_add_domain_dir(struct irq_domain *d)
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{
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if (!d->name || !domain_dir || d->debugfs_file)
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return;
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d->debugfs_file = debugfs_create_file(d->name, 0444, domain_dir, d,
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&dfs_domain_ops);
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&irq_domain_debug_fops);
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}
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static void debugfs_remove_domain_dir(struct irq_domain *d)
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if (!domain_dir)
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return;
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debugfs_create_file("default", 0444, domain_dir, NULL, &dfs_domain_ops);
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debugfs_create_file("default", 0444, domain_dir, NULL,
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&irq_domain_debug_fops);
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mutex_lock(&irq_domain_mutex);
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list_for_each_entry(d, &irq_domain_list, link)
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debugfs_add_domain_dir(d);
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