Merge branch 'drm-next-4.16' of git://people.freedesktop.org/~agd5f/linux into drm-next
A few more misc fixes for 4.16. * 'drm-next-4.16' of git://people.freedesktop.org/~agd5f/linux: drm/amdgpu: re-enable CGCG on CZ and disable on ST drm/amdgpu: disable coarse grain clockgating for ST drm/radeon: adjust tested variable drm/amdgpu: remove WARN_ON when VM isn't found v2 drm/amdgpu: fix locking in vega10_ih_prescreen_iv drm/amdgpu: fix another potential cause of VM faults drm/amdgpu: use queue 0 for kiq ring drm/ttm: Fix 'buf' pointer update in ttm_bo_vm_access_kmap() (v2) drm/ttm: fix missing parameter change for ttm_bo_cleanup_refs
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commit
2dd27794b9
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@ -179,8 +179,12 @@ static int amdgpu_gfx_kiq_acquire(struct amdgpu_device *adev,
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amdgpu_gfx_bit_to_queue(adev, queue_bit, &mec, &pipe, &queue);
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/* Using pipes 2/3 from MEC 2 seems cause problems */
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if (mec == 1 && pipe > 1)
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/*
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* 1. Using pipes 2/3 from MEC 2 seems cause problems.
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* 2. It must use queue id 0, because CGPG_IDLE/SAVE/LOAD/RUN
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* only can be issued on queue 0.
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*/
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if ((mec == 1 && pipe > 1) || queue != 0)
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continue;
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ring->me = mec + 1;
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@ -2262,12 +2262,12 @@ int amdgpu_vm_init(struct amdgpu_device *adev, struct amdgpu_vm *vm,
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{
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const unsigned align = min(AMDGPU_VM_PTB_ALIGN_SIZE,
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AMDGPU_VM_PTE_COUNT(adev) * 8);
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uint64_t init_pde_value = 0, flags;
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unsigned ring_instance;
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struct amdgpu_ring *ring;
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struct drm_sched_rq *rq;
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unsigned long size;
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int r, i;
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u64 flags;
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uint64_t init_pde_value = 0;
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vm->va = RB_ROOT_CACHED;
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for (i = 0; i < AMDGPU_MAX_VMHUBS; i++)
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@ -2318,29 +2318,21 @@ int amdgpu_vm_init(struct amdgpu_device *adev, struct amdgpu_vm *vm,
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flags |= (AMDGPU_GEM_CREATE_NO_CPU_ACCESS |
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AMDGPU_GEM_CREATE_SHADOW);
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r = amdgpu_bo_create(adev,
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amdgpu_vm_bo_size(adev, adev->vm_manager.root_level),
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align, true,
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AMDGPU_GEM_DOMAIN_VRAM,
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flags,
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NULL, NULL, init_pde_value, &vm->root.base.bo);
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size = amdgpu_vm_bo_size(adev, adev->vm_manager.root_level);
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r = amdgpu_bo_create(adev, size, align, true, AMDGPU_GEM_DOMAIN_VRAM,
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flags, NULL, NULL, init_pde_value,
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&vm->root.base.bo);
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if (r)
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goto error_free_sched_entity;
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r = amdgpu_bo_reserve(vm->root.base.bo, true);
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if (r)
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goto error_free_root;
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vm->root.base.vm = vm;
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list_add_tail(&vm->root.base.bo_list, &vm->root.base.bo->va);
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INIT_LIST_HEAD(&vm->root.base.vm_status);
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if (vm->use_cpu_for_update) {
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r = amdgpu_bo_reserve(vm->root.base.bo, false);
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if (r)
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goto error_free_root;
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r = amdgpu_bo_kmap(vm->root.base.bo, NULL);
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list_add_tail(&vm->root.base.vm_status, &vm->evicted);
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amdgpu_bo_unreserve(vm->root.base.bo);
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if (r)
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goto error_free_root;
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}
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if (pasid) {
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unsigned long flags;
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@ -278,9 +278,9 @@ static bool vega10_ih_prescreen_iv(struct amdgpu_device *adev)
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/* Track retry faults in per-VM fault FIFO. */
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spin_lock(&adev->vm_manager.pasid_lock);
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vm = idr_find(&adev->vm_manager.pasid_idr, pasid);
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spin_unlock(&adev->vm_manager.pasid_lock);
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if (WARN_ON_ONCE(!vm)) {
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if (!vm) {
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/* VM not found, process it normally */
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spin_unlock(&adev->vm_manager.pasid_lock);
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amdgpu_ih_clear_fault(adev, key);
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return true;
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}
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@ -288,9 +288,11 @@ static bool vega10_ih_prescreen_iv(struct amdgpu_device *adev)
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r = kfifo_put(&vm->faults, key);
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if (!r) {
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/* FIFO is full. Ignore it until there is space */
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spin_unlock(&adev->vm_manager.pasid_lock);
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amdgpu_ih_clear_fault(adev, key);
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goto ignore_iv;
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}
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spin_unlock(&adev->vm_manager.pasid_lock);
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/* It's the first fault for this address, process it normally */
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return true;
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@ -1049,7 +1049,6 @@ static int vi_common_early_init(void *handle)
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AMD_CG_SUPPORT_GFX_CP_LS |
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AMD_CG_SUPPORT_GFX_CGTS |
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AMD_CG_SUPPORT_GFX_CGTS_LS |
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AMD_CG_SUPPORT_GFX_CGCG |
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AMD_CG_SUPPORT_GFX_CGLS |
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AMD_CG_SUPPORT_BIF_LS |
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AMD_CG_SUPPORT_HDP_MGCG |
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@ -995,7 +995,7 @@ int radeon_uvd_calc_upll_dividers(struct radeon_device *rdev,
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/* calc dclk divider with current vco freq */
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dclk_div = radeon_uvd_calc_upll_post_div(vco_freq, dclk,
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pd_min, pd_even);
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if (vclk_div > pd_max)
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if (dclk_div > pd_max)
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break; /* vco is too big, it has to stop */
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/* calc score with current vco freq */
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@ -1727,7 +1727,7 @@ int ttm_bo_swapout(struct ttm_bo_global *glob, struct ttm_operation_ctx *ctx)
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kref_get(&bo->list_kref);
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if (!list_empty(&bo->ddestroy)) {
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ret = ttm_bo_cleanup_refs(bo, false, false, true);
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ret = ttm_bo_cleanup_refs(bo, false, false, locked);
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kref_put(&bo->list_kref, ttm_bo_release_list);
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return ret;
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}
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@ -316,7 +316,7 @@ static void ttm_bo_vm_close(struct vm_area_struct *vma)
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static int ttm_bo_vm_access_kmap(struct ttm_buffer_object *bo,
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unsigned long offset,
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void *buf, int len, int write)
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uint8_t *buf, int len, int write)
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{
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unsigned long page = offset >> PAGE_SHIFT;
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unsigned long bytes_left = len;
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@ -345,6 +345,7 @@ static int ttm_bo_vm_access_kmap(struct ttm_buffer_object *bo,
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ttm_bo_kunmap(&map);
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page++;
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buf += bytes;
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bytes_left -= bytes;
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offset = 0;
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} while (bytes_left);
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