ACPI / LPSS: Add support for exposing LTR registers to user space
Devices on the Intel Lynxpoint Low Power Subsystem (LPSS) have registers providing access to LTR (Latency Tolerance Reporting) functionality that allows software to monitor and possibly influence the aggressiveness of the platform's active-state power management. For each LPSS device, there are two modes of operation related to LTR, the auto mode and the software mode. In the auto mode the LTR is set up by the platform firmware and managed by hardware. Software can only read the LTR register values to monitor the platform's behavior. In the software mode it is possible to use LTR to control the extent to which the platform will use its built-in power management features. This changeset adds support for reading the LPSS devices' LTR registers and exposing their values to user space for monitoring and diagnostics purposes. It re-uses the MMIO mappings created to access the LPSS devices' clock registers for reading the values of the LTR registers and exposes them to user space through sysfs device attributes. Namely, a new atrribute group, lpss_ltr, is created for each LPSS device. It contains three new attributes: ltr_mode, auto_ltr, sw_ltr. The value of the ltr_mode attribute reflects the LTR mode being used at the moment (software vs auto) and the other two contain the actual register values (raw) whose meaning depends on the LTR mode. All of these attributes are read-only. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
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Documentation/ABI/testing/sysfs-devices-lpss_ltr
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44
Documentation/ABI/testing/sysfs-devices-lpss_ltr
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@ -0,0 +1,44 @@
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What: /sys/devices/.../lpss_ltr/
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Date: March 2013
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Contact: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
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Description:
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The /sys/devices/.../lpss_ltr/ directory is only present for
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devices included into the Intel Lynxpoint Low Power Subsystem
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(LPSS). If present, it contains attributes containing the LTR
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mode and the values of LTR registers of the device.
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What: /sys/devices/.../lpss_ltr/ltr_mode
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Date: March 2013
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Contact: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
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Description:
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The /sys/devices/.../lpss_ltr/ltr_mode attribute contains an
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integer number (0 or 1) indicating whether or not the devices'
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LTR functionality is working in the software mode (1).
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This attribute is read-only. If the device's runtime PM status
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is not "active", attempts to read from this attribute cause
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-EAGAIN to be returned.
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What: /sys/devices/.../lpss_ltr/auto_ltr
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Date: March 2013
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Contact: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
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Description:
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The /sys/devices/.../lpss_ltr/auto_ltr attribute contains the
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current value of the device's AUTO_LTR register (raw)
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represented as an 8-digit hexadecimal number.
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This attribute is read-only. If the device's runtime PM status
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is not "active", attempts to read from this attribute cause
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-EAGAIN to be returned.
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What: /sys/devices/.../lpss_ltr/sw_ltr
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Date: March 2013
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Contact: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
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Description:
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The /sys/devices/.../lpss_ltr/auto_ltr attribute contains the
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current value of the device's SW_LTR register (raw) represented
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as an 8-digit hexadecimal number.
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This attribute is read-only. If the device's runtime PM status
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is not "active", attempts to read from this attribute cause
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-EAGAIN to be returned.
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@ -18,17 +18,26 @@
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#include <linux/io.h>
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#include <linux/platform_device.h>
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#include <linux/platform_data/clk-lpss.h>
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#include <linux/pm_runtime.h>
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#include "internal.h"
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ACPI_MODULE_NAME("acpi_lpss");
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#define LPSS_CLK_OFFSET 0x800
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#define LPSS_CLK_SIZE 0x04
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#define LPSS_LTR_SIZE 0x18
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/* Offsets relative to LPSS_PRIVATE_OFFSET */
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#define LPSS_GENERAL 0x08
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#define LPSS_GENERAL_LTR_MODE_SW BIT(2)
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#define LPSS_SW_LTR 0x10
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#define LPSS_AUTO_LTR 0x14
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struct lpss_device_desc {
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bool clk_required;
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const char *clk_parent;
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bool ltr_required;
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unsigned int prv_offset;
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};
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struct lpss_private_data {
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@ -41,6 +50,13 @@ struct lpss_private_data {
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static struct lpss_device_desc lpt_dev_desc = {
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.clk_required = true,
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.clk_parent = "lpss_clk",
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.prv_offset = 0x800,
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.ltr_required = true,
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};
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static struct lpss_device_desc lpt_sdio_dev_desc = {
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.prv_offset = 0x1000,
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.ltr_required = true,
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};
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static const struct acpi_device_id acpi_lpss_device_ids[] = {
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@ -51,7 +67,7 @@ static const struct acpi_device_id acpi_lpss_device_ids[] = {
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{ "INT33C3", (unsigned long)&lpt_dev_desc },
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{ "INT33C4", (unsigned long)&lpt_dev_desc },
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{ "INT33C5", (unsigned long)&lpt_dev_desc },
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{ "INT33C6", },
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{ "INT33C6", (unsigned long)&lpt_sdio_dev_desc },
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{ "INT33C7", },
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{ }
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@ -80,12 +96,12 @@ static int register_device_clock(struct acpi_device *adev,
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lpt_register_clock_device();
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if (!dev_desc->clk_parent || !pdata->mmio_base
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|| pdata->mmio_size < LPSS_CLK_OFFSET + LPSS_CLK_SIZE)
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|| pdata->mmio_size < dev_desc->prv_offset + LPSS_CLK_SIZE)
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return -ENODATA;
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pdata->clk = clk_register_gate(NULL, dev_name(&adev->dev),
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dev_desc->clk_parent, 0,
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pdata->mmio_base + LPSS_CLK_OFFSET,
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pdata->mmio_base + dev_desc->prv_offset,
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0, 0, NULL);
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if (IS_ERR(pdata->clk))
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return PTR_ERR(pdata->clk);
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@ -151,6 +167,117 @@ static int acpi_lpss_create_device(struct acpi_device *adev,
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return ret;
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}
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static int lpss_reg_read(struct device *dev, unsigned int reg, u32 *val)
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{
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struct acpi_device *adev;
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struct lpss_private_data *pdata;
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unsigned long flags;
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int ret;
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ret = acpi_bus_get_device(ACPI_HANDLE(dev), &adev);
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if (WARN_ON(ret))
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return ret;
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spin_lock_irqsave(&dev->power.lock, flags);
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if (pm_runtime_suspended(dev)) {
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ret = -EAGAIN;
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goto out;
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}
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pdata = acpi_driver_data(adev);
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if (WARN_ON(!pdata || !pdata->mmio_base)) {
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ret = -ENODEV;
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goto out;
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}
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*val = readl(pdata->mmio_base + pdata->dev_desc->prv_offset + reg);
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out:
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spin_unlock_irqrestore(&dev->power.lock, flags);
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return ret;
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}
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static ssize_t lpss_ltr_show(struct device *dev, struct device_attribute *attr,
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char *buf)
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{
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u32 ltr_value = 0;
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unsigned int reg;
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int ret;
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reg = strcmp(attr->attr.name, "auto_ltr") ? LPSS_SW_LTR : LPSS_AUTO_LTR;
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ret = lpss_reg_read(dev, reg, <r_value);
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if (ret)
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return ret;
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return snprintf(buf, PAGE_SIZE, "%08x\n", ltr_value);
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}
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static ssize_t lpss_ltr_mode_show(struct device *dev,
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struct device_attribute *attr, char *buf)
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{
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u32 ltr_mode = 0;
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char *outstr;
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int ret;
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ret = lpss_reg_read(dev, LPSS_GENERAL, <r_mode);
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if (ret)
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return ret;
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outstr = (ltr_mode & LPSS_GENERAL_LTR_MODE_SW) ? "sw" : "auto";
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return sprintf(buf, "%s\n", outstr);
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}
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static DEVICE_ATTR(auto_ltr, S_IRUSR, lpss_ltr_show, NULL);
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static DEVICE_ATTR(sw_ltr, S_IRUSR, lpss_ltr_show, NULL);
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static DEVICE_ATTR(ltr_mode, S_IRUSR, lpss_ltr_mode_show, NULL);
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static struct attribute *lpss_attrs[] = {
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&dev_attr_auto_ltr.attr,
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&dev_attr_sw_ltr.attr,
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&dev_attr_ltr_mode.attr,
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NULL,
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};
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static struct attribute_group lpss_attr_group = {
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.attrs = lpss_attrs,
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.name = "lpss_ltr",
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};
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static int acpi_lpss_platform_notify(struct notifier_block *nb,
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unsigned long action, void *data)
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{
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struct platform_device *pdev = to_platform_device(data);
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struct lpss_private_data *pdata;
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struct acpi_device *adev;
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const struct acpi_device_id *id;
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int ret = 0;
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id = acpi_match_device(acpi_lpss_device_ids, &pdev->dev);
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if (!id || !id->driver_data)
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return 0;
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if (acpi_bus_get_device(ACPI_HANDLE(&pdev->dev), &adev))
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return 0;
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pdata = acpi_driver_data(adev);
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if (!pdata || !pdata->mmio_base || !pdata->dev_desc->ltr_required)
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return 0;
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if (pdata->mmio_size < pdata->dev_desc->prv_offset + LPSS_LTR_SIZE) {
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dev_err(&pdev->dev, "MMIO size insufficient to access LTR\n");
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return 0;
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}
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if (action == BUS_NOTIFY_ADD_DEVICE)
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ret = sysfs_create_group(&pdev->dev.kobj, &lpss_attr_group);
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else if (action == BUS_NOTIFY_DEL_DEVICE)
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sysfs_remove_group(&pdev->dev.kobj, &lpss_attr_group);
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return ret;
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}
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static struct notifier_block acpi_lpss_nb = {
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.notifier_call = acpi_lpss_platform_notify,
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};
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static struct acpi_scan_handler lpss_handler = {
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.ids = acpi_lpss_device_ids,
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.attach = acpi_lpss_create_device,
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void __init acpi_lpss_init(void)
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{
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if (!lpt_clk_init())
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if (!lpt_clk_init()) {
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bus_register_notifier(&platform_bus_type, &acpi_lpss_nb);
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acpi_scan_add_handler(&lpss_handler);
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}
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}
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