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sparc64: Fix masking and shifting in VIS fpcmp emulation.

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Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
David S. Miller 2011-10-31 01:05:49 -07:00
parent a52312b88c
commit 2e8ecdc008
1 changed files with 16 additions and 16 deletions
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32
arch/sparc/kernel/visemul.c
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@ -713,17 +713,17 @@ static void pcmp(struct pt_regs *regs, unsigned int insn, unsigned int opf)
s16 b = (rs2 >> (i * 16)) & 0xffff;
if (a > b)
rd_val |= 1 << i;
rd_val |= 8 >> i;
}
break;
case FCMPGT32_OPF:
for (i = 0; i < 2; i++) {
s32 a = (rs1 >> (i * 32)) & 0xffff;
s32 b = (rs2 >> (i * 32)) & 0xffff;
s32 a = (rs1 >> (i * 32)) & 0xffffffff;
s32 b = (rs2 >> (i * 32)) & 0xffffffff;
if (a > b)
rd_val |= 1 << i;
rd_val |= 2 >> i;
}
break;
@ -733,17 +733,17 @@ static void pcmp(struct pt_regs *regs, unsigned int insn, unsigned int opf)
s16 b = (rs2 >> (i * 16)) & 0xffff;
if (a <= b)
rd_val |= 1 << i;
rd_val |= 8 >> i;
}
break;
case FCMPLE32_OPF:
for (i = 0; i < 2; i++) {
s32 a = (rs1 >> (i * 32)) & 0xffff;
s32 b = (rs2 >> (i * 32)) & 0xffff;
s32 a = (rs1 >> (i * 32)) & 0xffffffff;
s32 b = (rs2 >> (i * 32)) & 0xffffffff;
if (a <= b)
rd_val |= 1 << i;
rd_val |= 2 >> i;
}
break;
@ -753,17 +753,17 @@ static void pcmp(struct pt_regs *regs, unsigned int insn, unsigned int opf)
s16 b = (rs2 >> (i * 16)) & 0xffff;
if (a != b)
rd_val |= 1 << i;
rd_val |= 8 >> i;
}
break;
case FCMPNE32_OPF:
for (i = 0; i < 2; i++) {
s32 a = (rs1 >> (i * 32)) & 0xffff;
s32 b = (rs2 >> (i * 32)) & 0xffff;
s32 a = (rs1 >> (i * 32)) & 0xffffffff;
s32 b = (rs2 >> (i * 32)) & 0xffffffff;
if (a != b)
rd_val |= 1 << i;
rd_val |= 2 >> i;
}
break;
@ -773,17 +773,17 @@ static void pcmp(struct pt_regs *regs, unsigned int insn, unsigned int opf)
s16 b = (rs2 >> (i * 16)) & 0xffff;
if (a == b)
rd_val |= 1 << i;
rd_val |= 8 >> i;
}
break;
case FCMPEQ32_OPF:
for (i = 0; i < 2; i++) {
s32 a = (rs1 >> (i * 32)) & 0xffff;
s32 b = (rs2 >> (i * 32)) & 0xffff;
s32 a = (rs1 >> (i * 32)) & 0xffffffff;
s32 b = (rs2 >> (i * 32)) & 0xffffffff;
if (a == b)
rd_val |= 1 << i;
rd_val |= 2 >> i;
}
break;
}