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ALSA: ice1712: Correcting/completing #defines for REGS

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This small patch completes #defines for Control/Status Register,
adds comments for the missing ones there and on the Interrupt Mask
Register and additionally corrects "#define ICE1712_SERR_LEVEL 0x04 -> 0x08",
according to documentation.

Signed-off-by: Konstantinos Tsimpoukas <kostaslinuxxx@gmail.com>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
This commit is contained in:
Konstantinos Tsimpoukas 2014-07-02 23:25:27 -05:00 committed by Takashi Iwai
parent 1a0e3f9639
commit 2f6ba2b31b
1 changed files with 9 additions and 6 deletions
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15
sound/pci/ice1712/ice1712.h
View file

@ -41,14 +41,17 @@
#define ICEREG(ice, x) ((ice)->port + ICE1712_REG_##x)
#define ICE1712_REG_CONTROL 0x00 /* byte */
#define ICE1712_RESET 0x80 /* reset whole chip */
#define ICE1712_SERR_LEVEL 0x04 /* SERR# level otherwise edge */
#define ICE1712_RESET 0x80 /* soft reset whole chip */
#define ICE1712_SERR_ASSERT_DS_DMA 0x40 /* disabled SERR# assertion for the DS DMA Ch-C irq otherwise enabled */
#define ICE1712_DOS_VOL 0x10 /* DOS WT/FM volume control */
#define ICE1712_SERR_LEVEL 0x08 /* SERR# level otherwise edge */
#define ICE1712_SERR_ASSERT_SB 0x02 /* disabled SERR# assertion for SB irq otherwise enabled */
#define ICE1712_NATIVE 0x01 /* native mode otherwise SB */
#define ICE1712_REG_IRQMASK 0x01 /* byte */
#define ICE1712_IRQ_MPU1 0x80
#define ICE1712_IRQ_TIMER 0x40
#define ICE1712_IRQ_MPU2 0x20
#define ICE1712_IRQ_PROPCM 0x10
#define ICE1712_IRQ_MPU1 0x80 /* MIDI irq mask */
#define ICE1712_IRQ_TIMER 0x40 /* Timer mask */
#define ICE1712_IRQ_MPU2 0x20 /* Secondary MIDI irq mask */
#define ICE1712_IRQ_PROPCM 0x10 /* professional multi-track */
#define ICE1712_IRQ_FM 0x08 /* FM/MIDI - legacy */
#define ICE1712_IRQ_PBKDS 0x04 /* playback DS channels */
#define ICE1712_IRQ_CONCAP 0x02 /* consumer capture */