watchdog: dw_wdt: fix signedness bug in dw_wdt_top_in_seconds()
On 64bit platforms, "(1 << (16 + top)) / clk_get_rate(dw_wdt.clk)" is sign-extended to 64bit then converted to unsigned 64bit, finally divide the clk rate. If the top is the maximum TOP i.e 15, "(1 << (16 +15))" will be sign-extended to 0xffffffff80000000, then converted to unsigned 0xffffffff80000000, which is a huge number, thus the final result is wrong. We fix this issue by giving usigned value(1U in this case) at first. Let's assume clk rate is 25MHZ, Before the patch: dw_wdt_top_in_seconds(15) = -864612050 After the patch: dw_wdt_top_in_seconds(15) = 85 Signed-off-by: Jisheng Zhang <jszhang@marvell.com> Signed-off-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
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@ -81,7 +81,7 @@ static inline int dw_wdt_top_in_seconds(unsigned top)
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* There are 16 possible timeout values in 0..15 where the number of
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* cycles is 2 ^ (16 + i) and the watchdog counts down.
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*/
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return (1 << (16 + top)) / clk_get_rate(dw_wdt.clk);
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return (1U << (16 + top)) / clk_get_rate(dw_wdt.clk);
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}
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static int dw_wdt_get_top(void)
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