[PATCH] S2io: Errors found during review
Hi, This is a patch to incorporate comments from earlier 12 patches. It also fixes a few issues we found during this time. Following is a list of changes in this patch. Item 1 incorporates earlier comments. Issues addressed in items 2 to 4 were discovered recently. 1. wmb() call in s2io_xmit() replaced with mmiowb(). 2. The dtx_control register was earlier programmed incorrectly for Xframe II adapter. 3. As suggested by hardware team, after a reset, in case of Xframe II adapter, we clear certain spurious errors by clearing PCI-X ECC status register, "detected parity error" bit in PCI_STATUS register and PCI_STATUS bit in txpic_int register. 4. On IBM PPC platforms, we found that in the Rx buffer replenish function, two memory writes(one to the the descriptor length and another to the ownership) were getting reordered. This was causing the adapter to see the ownership transfered to it before the length was updated. One solution was to add a wmb() but since this would turnout expensive on some platforms if called for every descriptor, we set the ownership bit and other fields of '2' to 'N' Rx descriptors followed by a wmb() and then set the ownership of first descriptor ('1'). Here the value 'N' is configurable by making it a module loadable parameter (rxsync_frequency). (NOTE: This parameter is a power of 2). 5. Bumped up the driver version no. to 2.0.2.1 Signed-off-by: Ravinandan Arakali <ravinandan.arakali@neterion.com> Signed-off-by: Raghavendra Koushik <raghavendra.koushik@neterion.com> Signed-off-by: Jeff Garzik <jgarzik@pobox.com>
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@ -67,7 +67,7 @@
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/* S2io Driver name & version. */
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static char s2io_driver_name[] = "Neterion";
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static char s2io_driver_version[] = "Version 2.0.2.0";
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static char s2io_driver_version[] = "Version 2.0.2.1";
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static inline int RXD_IS_UP2DT(RxD_t *rxdp)
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{
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@ -301,6 +301,8 @@ static unsigned int bimodal = 0;
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#ifndef CONFIG_S2IO_NAPI
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static unsigned int indicate_max_pkts;
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#endif
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/* Frequency of Rx desc syncs expressed as power of 2 */
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static unsigned int rxsync_frequency = 3;
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/*
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* S2IO device table.
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@ -837,7 +839,7 @@ static int init_nic(struct s2io_nic *nic)
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*/
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if (nic->device_type & XFRAME_II_DEVICE) {
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while (herc_act_dtx_cfg[dtx_cnt] != END_SIGN) {
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SPECIAL_REG_WRITE(xena_dtx_cfg[dtx_cnt],
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SPECIAL_REG_WRITE(herc_act_dtx_cfg[dtx_cnt],
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&bar0->dtx_control, UF);
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if (dtx_cnt & 0x1)
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msleep(1); /* Necessary!! */
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@ -2083,6 +2085,7 @@ int fill_rx_buffers(struct s2io_nic *nic, int ring_no)
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#ifndef CONFIG_S2IO_NAPI
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unsigned long flags;
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#endif
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RxD_t *first_rxdp = NULL;
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mac_control = &nic->mac_control;
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config = &nic->config;
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@ -2202,6 +2205,10 @@ int fill_rx_buffers(struct s2io_nic *nic, int ring_no)
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if (!skb) {
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DBG_PRINT(ERR_DBG, "%s: Out of ", dev->name);
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DBG_PRINT(ERR_DBG, "memory to allocate SKBs\n");
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if (first_rxdp) {
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wmb();
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first_rxdp->Control_1 |= RXD_OWN_XENA;
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}
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return -ENOMEM;
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}
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#ifndef CONFIG_2BUFF_MODE
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@ -2212,7 +2219,8 @@ int fill_rx_buffers(struct s2io_nic *nic, int ring_no)
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rxdp->Control_2 &= (~MASK_BUFFER0_SIZE);
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rxdp->Control_2 |= SET_BUFFER0_SIZE(size);
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rxdp->Host_Control = (unsigned long) (skb);
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rxdp->Control_1 |= RXD_OWN_XENA;
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if (alloc_tab & ((1 << rxsync_frequency) - 1))
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rxdp->Control_1 |= RXD_OWN_XENA;
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off++;
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off %= (MAX_RXDS_PER_BLOCK + 1);
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mac_control->rings[ring_no].rx_curr_put_info.offset = off;
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@ -2239,17 +2247,34 @@ int fill_rx_buffers(struct s2io_nic *nic, int ring_no)
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rxdp->Control_2 |= SET_BUFFER1_SIZE(1); /* dummy. */
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rxdp->Control_2 |= BIT(0); /* Set Buffer_Empty bit. */
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rxdp->Host_Control = (u64) ((unsigned long) (skb));
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rxdp->Control_1 |= RXD_OWN_XENA;
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if (alloc_tab & ((1 << rxsync_frequency) - 1))
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rxdp->Control_1 |= RXD_OWN_XENA;
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off++;
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mac_control->rings[ring_no].rx_curr_put_info.offset = off;
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#endif
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rxdp->Control_2 |= SET_RXD_MARKER;
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if (!(alloc_tab & ((1 << rxsync_frequency) - 1))) {
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if (first_rxdp) {
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wmb();
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first_rxdp->Control_1 |= RXD_OWN_XENA;
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}
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first_rxdp = rxdp;
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}
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atomic_inc(&nic->rx_bufs_left[ring_no]);
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alloc_tab++;
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}
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end:
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/* Transfer ownership of first descriptor to adapter just before
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* exiting. Before that, use memory barrier so that ownership
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* and other fields are seen by adapter correctly.
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*/
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if (first_rxdp) {
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wmb();
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first_rxdp->Control_1 |= RXD_OWN_XENA;
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}
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return SUCCESS;
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}
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@ -2783,16 +2808,16 @@ void s2io_reset(nic_t * sp)
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s2io_set_swapper(sp);
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/* Clear certain PCI/PCI-X fields after reset */
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pci_read_config_word(sp->pdev, PCI_COMMAND, &pci_cmd);
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pci_cmd &= 0x7FFF; /* Clear parity err detect bit */
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pci_write_config_word(sp->pdev, PCI_COMMAND, pci_cmd);
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if (sp->device_type == XFRAME_II_DEVICE) {
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/* Clear parity err detect bit */
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pci_write_config_word(sp->pdev, PCI_STATUS, 0x8000);
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val64 = readq(&bar0->txpic_int_reg);
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val64 &= ~BIT(62); /* Clearing PCI_STATUS error reflected here */
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writeq(val64, &bar0->txpic_int_reg);
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/* Clearing PCIX Ecc status register */
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pci_write_config_dword(sp->pdev, 0x68, 0x7C);
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/* Clearing PCIX Ecc status register */
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pci_write_config_dword(sp->pdev, 0x68, 0);
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/* Clearing PCI_STATUS error reflected here */
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writeq(BIT(62), &bar0->txpic_int_reg);
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}
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/* Reset device statistics maintained by OS */
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memset(&sp->stats, 0, sizeof (struct net_device_stats));
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@ -3168,8 +3193,6 @@ int s2io_xmit(struct sk_buff *skb, struct net_device *dev)
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val64 = mac_control->fifos[queue].list_info[put_off].list_phy_addr;
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writeq(val64, &tx_fifo->TxDL_Pointer);
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wmb();
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val64 = (TX_FIFO_LAST_TXD_NUM(frg_cnt) | TX_FIFO_FIRST_LIST |
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TX_FIFO_LAST_LIST);
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@ -3179,6 +3202,8 @@ int s2io_xmit(struct sk_buff *skb, struct net_device *dev)
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#endif
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writeq(val64, &tx_fifo->List_Control);
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mmiowb();
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put_off++;
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put_off %= mac_control->fifos[queue].tx_curr_put_info.fifo_len + 1;
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mac_control->fifos[queue].tx_curr_put_info.offset = put_off;
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@ -5172,6 +5197,7 @@ module_param(bimodal, bool, 0);
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#ifndef CONFIG_S2IO_NAPI
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module_param(indicate_max_pkts, int, 0);
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#endif
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module_param(rxsync_frequency, int, 0);
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/**
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* s2io_init_nic - Initialization of the adapter .
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@ -13,11 +13,6 @@
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#ifndef _S2IO_H
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#define _S2IO_H
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/* Enable 2 buffer mode by default for SGI system */
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#ifdef CONFIG_IA64_SGI_SN2
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#define CONFIG_2BUFF_MODE
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#endif
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#define TBD 0
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#define BIT(loc) (0x8000000000000000ULL >> (loc))
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#define vBIT(val, loc, sz) (((u64)val) << (64-loc-sz))
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