sparc32: remove sun4c traps
We used to runtime patch the trap table for srmmu. With the removal of sun4c support this is no longer required. With the sun4c trap removed we can remove all the referenced trap handling which is sun4c specific. This also allows us to get rid of the nosun4c.c file that contained only dummy functions/data. Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Sam Ravnborg
David S. Miller
parent
e7eaf5b8ab
commit
306f123162
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@ -18,9 +18,7 @@
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#define TRAP_ENTRY(type, label) \
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rd %psr, %l0; b label; rd %wim, %l3; nop;
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/* Data/text faults. Defaults to sun4c version at boot time. */
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#define SPARC_TFAULT rd %psr, %l0; rd %wim, %l3; b sun4c_fault; mov 1, %l7;
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#define SPARC_DFAULT rd %psr, %l0; rd %wim, %l3; b sun4c_fault; mov 0, %l7;
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/* Data/text faults */
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#define SRMMU_TFAULT rd %psr, %l0; rd %wim, %l3; b srmmu_fault; mov 1, %l7;
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#define SRMMU_DFAULT rd %psr, %l0; rd %wim, %l3; b srmmu_fault; mov 0, %l7;
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@ -1,51 +0,0 @@
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#ifndef _SPARC_MEMREG_H
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#define _SPARC_MEMREG_H
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/* memreg.h: Definitions of the values found in the synchronous
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* and asynchronous memory error registers when a fault
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* occurs on the sun4c.
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*
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* Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
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*/
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/* First the synchronous error codes, these are usually just
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* normal page faults.
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*/
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#define SUN4C_SYNC_WDRESET 0x0001 /* watchdog reset */
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#define SUN4C_SYNC_SIZE 0x0002 /* bad access size? whuz this? */
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#define SUN4C_SYNC_PARITY 0x0008 /* bad ram chips caused a parity error */
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#define SUN4C_SYNC_SBUS 0x0010 /* the SBUS had some problems... */
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#define SUN4C_SYNC_NOMEM 0x0020 /* translation to non-existent ram */
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#define SUN4C_SYNC_PROT 0x0040 /* access violated pte protections */
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#define SUN4C_SYNC_NPRESENT 0x0080 /* pte said that page was not present */
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#define SUN4C_SYNC_BADWRITE 0x8000 /* while writing something went bogus */
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#define SUN4C_SYNC_BOLIXED \
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(SUN4C_SYNC_WDRESET | SUN4C_SYNC_SIZE | SUN4C_SYNC_SBUS | \
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SUN4C_SYNC_NOMEM | SUN4C_SYNC_PARITY)
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/* Now the asynchronous error codes, these are almost always produced
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* by the cache writing things back to memory and getting a bad translation.
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* Bad DVMA transactions can cause these faults too.
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*/
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#define SUN4C_ASYNC_BADDVMA 0x0010 /* error during DVMA access */
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#define SUN4C_ASYNC_NOMEM 0x0020 /* write back pointed to bad phys addr */
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#define SUN4C_ASYNC_BADWB 0x0080 /* write back points to non-present page */
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/* Memory parity error register with associated bit constants. */
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#ifndef __ASSEMBLY__
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extern __volatile__ unsigned long __iomem *sun4c_memerr_reg;
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#endif
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#define SUN4C_MPE_ERROR 0x80 /* Parity error detected. (ro) */
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#define SUN4C_MPE_MULTI 0x40 /* Multiple parity errors detected. (ro) */
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#define SUN4C_MPE_TEST 0x20 /* Write inverse parity. (rw) */
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#define SUN4C_MPE_CHECK 0x10 /* Enable parity checking. (rw) */
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#define SUN4C_MPE_ERR00 0x08 /* Parity error in bits 0-7. (ro) */
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#define SUN4C_MPE_ERR08 0x04 /* Parity error in bits 8-15. (ro) */
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#define SUN4C_MPE_ERR16 0x02 /* Parity error in bits 16-23. (ro) */
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#define SUN4C_MPE_ERR24 0x01 /* Parity error in bits 24-31. (ro) */
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#define SUN4C_MPE_ERRS 0x0F /* Bit mask for the error bits. (ro) */
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#endif /* !(_SPARC_MEMREG_H) */
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@ -21,7 +21,6 @@
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#include <asm/cpu_type.h>
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extern void clock_stop_probe(void); /* tadpole.c */
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extern void sun4c_probe_memerr_reg(void);
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static char *cpu_mid_prop(void)
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{
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@ -139,7 +138,4 @@ void __init device_scan(void)
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auxio_power_probe();
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}
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clock_stop_probe();
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if (ARCH_SUN4C)
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sun4c_probe_memerr_reg();
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}
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@ -17,7 +17,6 @@
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#include <asm/asm-offsets.h>
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#include <asm/psr.h>
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#include <asm/vaddrs.h>
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#include <asm/memreg.h>
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#include <asm/page.h>
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#include <asm/pgtable.h>
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#include <asm/pgtsun4c.h>
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@ -828,253 +827,6 @@ vac_hwflush_patch2_on: sta %g0, [%l3 + %l7] ASI_HWFLUSHSEG
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.globl vac_linesize_patch, vac_hwflush_patch1
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.globl vac_hwflush_patch2
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.align 4
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.globl sun4c_fault
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! %l0 = %psr
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! %l1 = %pc
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! %l2 = %npc
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! %l3 = %wim
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! %l7 = 1 for textfault
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! We want error in %l5, vaddr in %l6
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sun4c_fault:
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sethi %hi(AC_SYNC_ERR), %l4
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add %l4, 0x4, %l6 ! AC_SYNC_VA in %l6
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lda [%l6] ASI_CONTROL, %l5 ! Address
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lda [%l4] ASI_CONTROL, %l6 ! Error, retained for a bit
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andn %l5, 0xfff, %l5 ! Encode all info into l7
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srl %l6, 14, %l4
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and %l4, 2, %l4
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or %l5, %l4, %l4
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or %l4, %l7, %l7 ! l7 = [addr,write,txtfault]
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andcc %l0, PSR_PS, %g0
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be sun4c_fault_fromuser
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andcc %l7, 1, %g0 ! Text fault?
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be 1f
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sethi %hi(KERNBASE), %l4
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mov %l1, %l5 ! PC
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1:
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cmp %l5, %l4
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blu sun4c_fault_fromuser
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sethi %hi(~((1 << SUN4C_REAL_PGDIR_SHIFT) - 1)), %l4
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/* If the kernel references a bum kernel pointer, or a pte which
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* points to a non existent page in ram, we will run this code
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* _forever_ and lock up the machine!!!!! So we must check for
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* this condition, the AC_SYNC_ERR bits are what we must examine.
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* Also a parity error would make this happen as well. So we just
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* check that we are in fact servicing a tlb miss and not some
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* other type of fault for the kernel.
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*/
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andcc %l6, 0x80, %g0
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be sun4c_fault_fromuser
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and %l5, %l4, %l5
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/* Test for NULL pte_t * in vmalloc area. */
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sethi %hi(VMALLOC_START), %l4
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cmp %l5, %l4
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blu,a invalid_segment_patch1
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lduXa [%l5] ASI_SEGMAP, %l4
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sethi %hi(swapper_pg_dir), %l4
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srl %l5, SUN4C_PGDIR_SHIFT, %l6
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or %l4, %lo(swapper_pg_dir), %l4
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sll %l6, 2, %l6
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ld [%l4 + %l6], %l4
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andcc %l4, PAGE_MASK, %g0
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be sun4c_fault_fromuser
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lduXa [%l5] ASI_SEGMAP, %l4
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invalid_segment_patch1:
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cmp %l4, 0x7f
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bne 1f
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sethi %hi(sun4c_kfree_ring), %l4
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or %l4, %lo(sun4c_kfree_ring), %l4
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ld [%l4 + 0x18], %l3
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deccc %l3 ! do we have a free entry?
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bcs,a 2f ! no, unmap one.
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sethi %hi(sun4c_kernel_ring), %l4
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st %l3, [%l4 + 0x18] ! sun4c_kfree_ring.num_entries--
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ld [%l4 + 0x00], %l6 ! entry = sun4c_kfree_ring.ringhd.next
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st %l5, [%l6 + 0x08] ! entry->vaddr = address
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ld [%l6 + 0x00], %l3 ! next = entry->next
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ld [%l6 + 0x04], %l7 ! entry->prev
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st %l7, [%l3 + 0x04] ! next->prev = entry->prev
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st %l3, [%l7 + 0x00] ! entry->prev->next = next
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sethi %hi(sun4c_kernel_ring), %l4
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or %l4, %lo(sun4c_kernel_ring), %l4
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! head = &sun4c_kernel_ring.ringhd
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ld [%l4 + 0x00], %l7 ! head->next
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st %l4, [%l6 + 0x04] ! entry->prev = head
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st %l7, [%l6 + 0x00] ! entry->next = head->next
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st %l6, [%l7 + 0x04] ! head->next->prev = entry
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st %l6, [%l4 + 0x00] ! head->next = entry
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ld [%l4 + 0x18], %l3
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inc %l3 ! sun4c_kernel_ring.num_entries++
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st %l3, [%l4 + 0x18]
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b 4f
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ld [%l6 + 0x08], %l5
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2:
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or %l4, %lo(sun4c_kernel_ring), %l4
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! head = &sun4c_kernel_ring.ringhd
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ld [%l4 + 0x04], %l6 ! entry = head->prev
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ld [%l6 + 0x08], %l3 ! tmp = entry->vaddr
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! Flush segment from the cache.
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sethi %hi((64 * 1024)), %l7
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9:
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vac_hwflush_patch1:
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vac_linesize_patch:
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subcc %l7, 16, %l7
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bne 9b
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vac_hwflush_patch2:
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sta %g0, [%l3 + %l7] ASI_FLUSHSEG
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st %l5, [%l6 + 0x08] ! entry->vaddr = address
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ld [%l6 + 0x00], %l5 ! next = entry->next
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ld [%l6 + 0x04], %l7 ! entry->prev
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st %l7, [%l5 + 0x04] ! next->prev = entry->prev
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st %l5, [%l7 + 0x00] ! entry->prev->next = next
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st %l4, [%l6 + 0x04] ! entry->prev = head
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ld [%l4 + 0x00], %l7 ! head->next
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st %l7, [%l6 + 0x00] ! entry->next = head->next
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st %l6, [%l7 + 0x04] ! head->next->prev = entry
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st %l6, [%l4 + 0x00] ! head->next = entry
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mov %l3, %l5 ! address = tmp
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4:
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num_context_patch1:
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mov 0x08, %l7
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ld [%l6 + 0x08], %l4
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ldub [%l6 + 0x0c], %l3
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or %l4, %l3, %l4 ! encode new vaddr/pseg into l4
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sethi %hi(AC_CONTEXT), %l3
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lduba [%l3] ASI_CONTROL, %l6
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/* Invalidate old mapping, instantiate new mapping,
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* for each context. Registers l6/l7 are live across
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* this loop.
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*/
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3: deccc %l7
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sethi %hi(AC_CONTEXT), %l3
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stba %l7, [%l3] ASI_CONTROL
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invalid_segment_patch2:
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mov 0x7f, %l3
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stXa %l3, [%l5] ASI_SEGMAP
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andn %l4, 0x1ff, %l3
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bne 3b
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stXa %l4, [%l3] ASI_SEGMAP
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sethi %hi(AC_CONTEXT), %l3
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stba %l6, [%l3] ASI_CONTROL
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andn %l4, 0x1ff, %l5
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1:
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sethi %hi(VMALLOC_START), %l4
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cmp %l5, %l4
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bgeu 1f
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mov 1 << (SUN4C_REAL_PGDIR_SHIFT - PAGE_SHIFT), %l7
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sethi %hi(KERNBASE), %l6
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sub %l5, %l6, %l4
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srl %l4, PAGE_SHIFT, %l4
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sethi %hi((SUN4C_PAGE_KERNEL & 0xf4000000)), %l3
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or %l3, %l4, %l3
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sethi %hi(PAGE_SIZE), %l4
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2:
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sta %l3, [%l5] ASI_PTE
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deccc %l7
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inc %l3
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bne 2b
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add %l5, %l4, %l5
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b 7f
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sethi %hi(sun4c_kernel_faults), %l4
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1:
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srl %l5, SUN4C_PGDIR_SHIFT, %l3
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sethi %hi(swapper_pg_dir), %l4
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or %l4, %lo(swapper_pg_dir), %l4
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sll %l3, 2, %l3
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ld [%l4 + %l3], %l4
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and %l4, PAGE_MASK, %l4
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srl %l5, (PAGE_SHIFT - 2), %l6
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and %l6, ((SUN4C_PTRS_PER_PTE - 1) << 2), %l6
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add %l6, %l4, %l6
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sethi %hi(PAGE_SIZE), %l4
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2:
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ld [%l6], %l3
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deccc %l7
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sta %l3, [%l5] ASI_PTE
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add %l6, 0x4, %l6
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bne 2b
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add %l5, %l4, %l5
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sethi %hi(sun4c_kernel_faults), %l4
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7:
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ld [%l4 + %lo(sun4c_kernel_faults)], %l3
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inc %l3
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st %l3, [%l4 + %lo(sun4c_kernel_faults)]
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/* Restore condition codes */
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wr %l0, 0x0, %psr
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WRITE_PAUSE
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jmp %l1
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rett %l2
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sun4c_fault_fromuser:
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SAVE_ALL
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nop
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mov %l7, %o1 ! Decode the info from %l7
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mov %l7, %o2
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and %o1, 1, %o1 ! arg2 = text_faultp
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mov %l7, %o3
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and %o2, 2, %o2 ! arg3 = writep
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andn %o3, 0xfff, %o3 ! arg4 = faulting address
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wr %l0, PSR_ET, %psr
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WRITE_PAUSE
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call do_sun4c_fault
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add %sp, STACKFRAME_SZ, %o0 ! arg1 = pt_regs ptr
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RESTORE_ALL
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.align 4
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.globl srmmu_fault
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srmmu_fault:
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@ -84,7 +84,7 @@ trapbase_cpu0:
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#endif
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/* We get control passed to us here at t_zero. */
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t_zero: b gokernel; nop; nop; nop;
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t_tflt: SPARC_TFAULT /* Inst. Access Exception */
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t_tflt: SRMMU_TFAULT /* Inst. Access Exception */
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t_bins: TRAP_ENTRY(0x2, bad_instruction) /* Illegal Instruction */
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t_pins: TRAP_ENTRY(0x3, priv_instruction) /* Privileged Instruction */
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t_fpd: TRAP_ENTRY(0x4, fpd_trap_handler) /* Floating Point Disabled */
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@ -92,7 +92,7 @@ t_wovf: WINDOW_SPILL /* Window Overflow */
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t_wunf: WINDOW_FILL /* Window Underflow */
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t_mna: TRAP_ENTRY(0x7, mna_handler) /* Memory Address Not Aligned */
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t_fpe: TRAP_ENTRY(0x8, fpe_trap_handler) /* Floating Point Exception */
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t_dflt: SPARC_DFAULT /* Data Miss Exception */
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t_dflt: SRMMU_DFAULT /* Data Miss Exception */
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t_tio: TRAP_ENTRY(0xa, do_tag_overflow) /* Tagged Instruction Ovrflw */
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t_wpt: TRAP_ENTRY(0xb, do_watchpoint) /* Watchpoint Detected */
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t_badc: BAD_TRAP(0xc) BAD_TRAP(0xd) BAD_TRAP(0xe) BAD_TRAP(0xf) BAD_TRAP(0x10)
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@ -120,7 +120,7 @@ t_cpdis:TRAP_ENTRY(0x24, do_cp_disabled) /* Co-Processor Disabled */
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t_uflsh:SKIP_TRAP(0x25, unimp_flush) /* Unimplemented FLUSH inst. */
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t_bad26:BAD_TRAP(0x26) BAD_TRAP(0x27)
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t_cpexc:TRAP_ENTRY(0x28, do_cp_exception) /* Co-Processor Exception */
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t_dacce:SPARC_DFAULT /* Data Access Error */
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t_dacce:SRMMU_DFAULT /* Data Access Error */
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t_hwdz: TRAP_ENTRY(0x2a, do_hw_divzero) /* Division by zero, you lose... */
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t_dserr:BAD_TRAP(0x2b) /* Data Store Error */
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t_daccm:BAD_TRAP(0x2c) /* Data Access MMU-Miss */
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@ -182,13 +182,6 @@ static void __init boot_flags_init(char *commands)
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}
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}
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/* This routine will in the future do all the nasty prom stuff
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* to probe for the mmu type and its parameters, etc. This will
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* also be where SMP things happen.
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*/
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extern void sun4c_probe_vac(void);
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extern unsigned short root_flags;
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extern unsigned short root_dev;
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extern unsigned short ram_flags;
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@ -275,8 +268,6 @@ void __init setup_arch(char **cmdline_p)
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#endif
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idprom_init();
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if (ARCH_SUN4C)
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sun4c_probe_vac();
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load_mmu();
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phys_base = 0xffffffffUL;
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@ -17,5 +17,3 @@ obj-$(CONFIG_HUGETLB_PAGE) += hugetlbpage.o
|
|||
|
||||
# Only used by sparc32
|
||||
obj-$(CONFIG_HIGHMEM) += highmem.o
|
||||
|
||||
obj-$(CONFIG_SPARC32) += nosun4c.o
|
||||
|
|
|
|||
|
|
@ -24,7 +24,6 @@
|
|||
|
||||
#include <asm/page.h>
|
||||
#include <asm/pgtable.h>
|
||||
#include <asm/memreg.h>
|
||||
#include <asm/openprom.h>
|
||||
#include <asm/oplib.h>
|
||||
#include <asm/smp.h>
|
||||
|
|
@ -70,8 +69,6 @@ asmlinkage void sparc_lvl15_nmi(struct pt_regs *regs, unsigned long serr,
|
|||
printk(" Synchronous Vaddr %08lx\n", svaddr);
|
||||
printk(" Asynchronous Error %08lx\n", aerr);
|
||||
printk(" Asynchronous Vaddr %08lx\n", avaddr);
|
||||
if (sun4c_memerr_reg)
|
||||
printk(" Memory Parity Error %08lx\n", *sun4c_memerr_reg);
|
||||
printk("REGISTER DUMP:\n");
|
||||
show_regs(regs);
|
||||
prom_halt();
|
||||
|
|
@ -422,92 +419,6 @@ vmalloc_fault:
|
|||
}
|
||||
}
|
||||
|
||||
asmlinkage void do_sun4c_fault(struct pt_regs *regs, int text_fault, int write,
|
||||
unsigned long address)
|
||||
{
|
||||
extern void sun4c_update_mmu_cache(struct vm_area_struct *,
|
||||
unsigned long,pte_t *);
|
||||
extern pte_t *sun4c_pte_offset_kernel(pmd_t *,unsigned long);
|
||||
struct task_struct *tsk = current;
|
||||
struct mm_struct *mm = tsk->mm;
|
||||
pgd_t *pgdp;
|
||||
pte_t *ptep;
|
||||
|
||||
if (text_fault) {
|
||||
address = regs->pc;
|
||||
} else if (!write &&
|
||||
!(regs->psr & PSR_PS)) {
|
||||
unsigned int insn, __user *ip;
|
||||
|
||||
ip = (unsigned int __user *)regs->pc;
|
||||
if (!get_user(insn, ip)) {
|
||||
if ((insn & 0xc1680000) == 0xc0680000)
|
||||
write = 1;
|
||||
}
|
||||
}
|
||||
|
||||
if (!mm) {
|
||||
/* We are oopsing. */
|
||||
do_sparc_fault(regs, text_fault, write, address);
|
||||
BUG(); /* P3 Oops already, you bitch */
|
||||
}
|
||||
|
||||
pgdp = pgd_offset(mm, address);
|
||||
ptep = sun4c_pte_offset_kernel((pmd_t *) pgdp, address);
|
||||
|
||||
if (pgd_val(*pgdp)) {
|
||||
if (write) {
|
||||
if ((pte_val(*ptep) & (_SUN4C_PAGE_WRITE|_SUN4C_PAGE_PRESENT))
|
||||
== (_SUN4C_PAGE_WRITE|_SUN4C_PAGE_PRESENT)) {
|
||||
unsigned long flags;
|
||||
|
||||
*ptep = __pte(pte_val(*ptep) | _SUN4C_PAGE_ACCESSED |
|
||||
_SUN4C_PAGE_MODIFIED |
|
||||
_SUN4C_PAGE_VALID |
|
||||
_SUN4C_PAGE_DIRTY);
|
||||
|
||||
local_irq_save(flags);
|
||||
if (sun4c_get_segmap(address) != invalid_segment) {
|
||||
sun4c_put_pte(address, pte_val(*ptep));
|
||||
local_irq_restore(flags);
|
||||
return;
|
||||
}
|
||||
local_irq_restore(flags);
|
||||
}
|
||||
} else {
|
||||
if ((pte_val(*ptep) & (_SUN4C_PAGE_READ|_SUN4C_PAGE_PRESENT))
|
||||
== (_SUN4C_PAGE_READ|_SUN4C_PAGE_PRESENT)) {
|
||||
unsigned long flags;
|
||||
|
||||
*ptep = __pte(pte_val(*ptep) | _SUN4C_PAGE_ACCESSED |
|
||||
_SUN4C_PAGE_VALID);
|
||||
|
||||
local_irq_save(flags);
|
||||
if (sun4c_get_segmap(address) != invalid_segment) {
|
||||
sun4c_put_pte(address, pte_val(*ptep));
|
||||
local_irq_restore(flags);
|
||||
return;
|
||||
}
|
||||
local_irq_restore(flags);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/* This conditional is 'interesting'. */
|
||||
if (pgd_val(*pgdp) && !(write && !(pte_val(*ptep) & _SUN4C_PAGE_WRITE))
|
||||
&& (pte_val(*ptep) & _SUN4C_PAGE_VALID))
|
||||
/* Note: It is safe to not grab the MMAP semaphore here because
|
||||
* we know that update_mmu_cache() will not sleep for
|
||||
* any reason (at least not in the current implementation)
|
||||
* and therefore there is no danger of another thread getting
|
||||
* on the CPU and doing a shrink_mmap() on this vma.
|
||||
*/
|
||||
sun4c_update_mmu_cache (find_vma(current->mm, address), address,
|
||||
ptep);
|
||||
else
|
||||
do_sparc_fault(regs, text_fault, write, address);
|
||||
}
|
||||
|
||||
/* This always deals with user addresses. */
|
||||
static void force_user_fault(unsigned long address, int write)
|
||||
{
|
||||
|
|
|
|||
|
|
@ -1,54 +0,0 @@
|
|||
/*
|
||||
* nosun4c.c: This file is a bunch of dummies for SMP compiles,
|
||||
* so that it does not need sun4c and avoid ifdefs.
|
||||
*
|
||||
* Copyright (C) 1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
|
||||
*/
|
||||
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/mm.h>
|
||||
#include <linux/init.h>
|
||||
#include <asm/pgtable.h>
|
||||
|
||||
static char shouldnothappen[] __initdata = "32bit SMP kernel only supports sun4m and sun4d\n";
|
||||
|
||||
/* Dummies */
|
||||
struct sun4c_mmu_ring {
|
||||
unsigned long xxx1[3];
|
||||
unsigned char xxx2[2];
|
||||
int xxx3;
|
||||
};
|
||||
struct sun4c_mmu_ring sun4c_kernel_ring;
|
||||
struct sun4c_mmu_ring sun4c_kfree_ring;
|
||||
unsigned long sun4c_kernel_faults;
|
||||
unsigned long *sun4c_memerr_reg;
|
||||
|
||||
static void __init should_not_happen(void)
|
||||
{
|
||||
prom_printf(shouldnothappen);
|
||||
prom_halt();
|
||||
}
|
||||
|
||||
pte_t *sun4c_pte_offset(pmd_t * dir, unsigned long address)
|
||||
{
|
||||
return NULL;
|
||||
}
|
||||
|
||||
pte_t *sun4c_pte_offset_kernel(pmd_t *dir, unsigned long address)
|
||||
{
|
||||
return NULL;
|
||||
}
|
||||
|
||||
void sun4c_update_mmu_cache(struct vm_area_struct *vma, unsigned long address, pte_t *ptep)
|
||||
{
|
||||
}
|
||||
|
||||
void __init sun4c_probe_vac(void)
|
||||
{
|
||||
should_not_happen();
|
||||
}
|
||||
|
||||
void __init sun4c_probe_memerr_reg(void)
|
||||
{
|
||||
should_not_happen();
|
||||
}
|
||||
|
|
@ -2134,8 +2134,6 @@ extern unsigned long spwin_mmu_patchme, fwin_mmu_patchme,
|
|||
extern unsigned long spwin_srmmu_stackchk, srmmu_fwin_stackchk,
|
||||
tsetup_srmmu_stackchk, srmmu_rett_stackchk;
|
||||
|
||||
extern unsigned long srmmu_fault;
|
||||
|
||||
#define PATCH_BRANCH(insn, dest) do { \
|
||||
iaddr = &(insn); \
|
||||
daddr = &(dest); \
|
||||
|
|
@ -2150,9 +2148,6 @@ static void __init patch_window_trap_handlers(void)
|
|||
PATCH_BRANCH(fwin_mmu_patchme, srmmu_fwin_stackchk);
|
||||
PATCH_BRANCH(tsetup_mmu_patchme, tsetup_srmmu_stackchk);
|
||||
PATCH_BRANCH(rtrap_mmu_patchme, srmmu_rett_stackchk);
|
||||
PATCH_BRANCH(sparc_ttable[SP_TRAP_TFLT].inst_three, srmmu_fault);
|
||||
PATCH_BRANCH(sparc_ttable[SP_TRAP_DFLT].inst_three, srmmu_fault);
|
||||
PATCH_BRANCH(sparc_ttable[SP_TRAP_DACC].inst_three, srmmu_fault);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_SMP
|
||||
|
|
|
|||
Loading…
Reference in a new issue