[PATCH] tpm: Fix concerns with TPM driver -- use enums
Convert #defines to named enums where that preference has been indicated by other kernel developers. Signed-off-by: Kylene Hall <kjhall@us.ibm.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
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@ -28,19 +28,35 @@
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#include <linux/spinlock.h>
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#include "tpm.h"
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#define TPM_MINOR 224 /* officially assigned */
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enum tpm_const {
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TPM_MINOR = 224, /* officially assigned */
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TPM_BUFSIZE = 2048,
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TPM_NUM_DEVICES = 256,
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TPM_NUM_MASK_ENTRIES = TPM_NUM_DEVICES / (8 * sizeof(int))
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};
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#define TPM_BUFSIZE 2048
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/* PCI configuration addresses */
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enum tpm_pci_config_addr {
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PCI_GEN_PMCON_1 = 0xA0,
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PCI_GEN1_DEC = 0xE4,
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PCI_LPC_EN = 0xE6,
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PCI_GEN2_DEC = 0xEC
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};
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enum tpm_config {
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TPM_LOCK_REG = 0x0D,
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TPM_INTERUPT_REG = 0x0A,
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TPM_BASE_ADDR_LO = 0x08,
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TPM_BASE_ADDR_HI = 0x09,
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TPM_UNLOCK_VALUE = 0x55,
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TPM_LOCK_VALUE = 0xAA,
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TPM_DISABLE_INTERUPT_VALUE = 0x00
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};
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/* PCI configuration addresses */
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#define PCI_GEN_PMCON_1 0xA0
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#define PCI_GEN1_DEC 0xE4
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#define PCI_LPC_EN 0xE6
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#define PCI_GEN2_DEC 0xEC
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static LIST_HEAD(tpm_chip_list);
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static DEFINE_SPINLOCK(driver_lock);
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static int dev_mask[32];
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static int dev_mask[TPM_NUM_MASK_ENTRIES];
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static void user_reader_timeout(unsigned long ptr)
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{
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@ -102,17 +118,18 @@ int tpm_lpc_bus_init(struct pci_dev *pci_dev, u16 base)
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pci_write_config_dword(pci_dev, PCI_GEN_PMCON_1,
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tmp);
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}
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tpm_write_index(0x0D, 0x55); /* unlock 4F */
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tpm_write_index(0x0A, 0x00); /* int disable */
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tpm_write_index(0x08, base); /* base addr lo */
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tpm_write_index(0x09, (base & 0xFF00) >> 8); /* base addr hi */
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tpm_write_index(0x0D, 0xAA); /* lock 4F */
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break;
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case PCI_VENDOR_ID_AMD:
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/* nothing yet */
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break;
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}
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tpm_write_index(TPM_LOCK_REG, TPM_UNLOCK_VALUE);
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tpm_write_index(TPM_INTERUPT_REG, TPM_DISABLE_INTERUPT_VALUE);
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tpm_write_index(TPM_BASE_ADDR_LO, base);
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tpm_write_index(TPM_BASE_ADDR_HI, (base & 0xFF00) >> 8);
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tpm_write_index(TPM_LOCK_REG, TPM_LOCK_VALUE);
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return 0;
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}
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@ -527,7 +544,7 @@ void __devexit tpm_remove(struct pci_dev *pci_dev)
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pci_disable_device(pci_dev);
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dev_mask[chip->dev_num / 32] &= !(1 << (chip->dev_num % 32));
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dev_mask[chip->dev_num / TPM_NUM_MASK_ENTRIES ] &= !(1 << (chip->dev_num % TPM_NUM_MASK_ENTRIES));
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kfree(chip);
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@ -608,10 +625,11 @@ int tpm_register_hardware(struct pci_dev *pci_dev,
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chip->dev_num = -1;
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for (i = 0; i < 32; i++)
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for (j = 0; j < 8; j++)
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for (i = 0; i < TPM_NUM_MASK_ENTRIES; i++)
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for (j = 0; j < 8 * sizeof(int); j++)
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if ((dev_mask[i] & (1 << j)) == 0) {
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chip->dev_num = i * 32 + j;
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chip->dev_num =
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i * TPM_NUM_MASK_ENTRIES + j;
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dev_mask[i] |= 1 << j;
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goto dev_num_search_complete;
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}
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@ -25,11 +25,16 @@
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#include <linux/fs.h>
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#include <linux/miscdevice.h>
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#define TPM_TIMEOUT 5 /* msecs */
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enum tpm_timeout {
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TPM_TIMEOUT = 5, /* msecs */
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};
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/* TPM addresses */
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#define TPM_ADDR 0x4E
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#define TPM_DATA 0x4F
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enum tpm_addr {
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TPM_ADDR = 0x4E,
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TPM_DATA = 0x4F
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};
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struct tpm_chip;
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@ -22,17 +22,22 @@
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#include "tpm.h"
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/* Atmel definitions */
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#define TPM_ATML_BASE 0x400
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enum tpm_atmel_addr{
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TPM_ATML_BASE = 0x400
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};
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/* write status bits */
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#define ATML_STATUS_ABORT 0x01
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#define ATML_STATUS_LASTBYTE 0x04
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enum tpm_atmel_write_status {
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ATML_STATUS_ABORT = 0x01,
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ATML_STATUS_LASTBYTE = 0x04
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};
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/* read status bits */
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#define ATML_STATUS_BUSY 0x01
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#define ATML_STATUS_DATA_AVAIL 0x02
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#define ATML_STATUS_REWRITE 0x04
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enum tpm_atmel_read_status {
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ATML_STATUS_BUSY = 0x01,
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ATML_STATUS_DATA_AVAIL = 0x02,
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ATML_STATUS_REWRITE = 0x04,
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ATML_STATUS_READY = 0x08
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};
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static int tpm_atml_recv(struct tpm_chip *chip, u8 * buf, size_t count)
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{
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@ -22,34 +22,42 @@
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#include "tpm.h"
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/* National definitions */
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#define TPM_NSC_BASE 0x360
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#define TPM_NSC_IRQ 0x07
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enum tpm_nsc_addr {
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TPM_NSC_BASE = 0x360,
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TPM_NSC_IRQ = 0x07
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};
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#define NSC_LDN_INDEX 0x07
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#define NSC_SID_INDEX 0x20
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#define NSC_LDC_INDEX 0x30
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#define NSC_DIO_INDEX 0x60
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#define NSC_CIO_INDEX 0x62
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#define NSC_IRQ_INDEX 0x70
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#define NSC_ITS_INDEX 0x71
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enum tpm_nsc_index {
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NSC_LDN_INDEX = 0x07,
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NSC_SID_INDEX = 0x20,
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NSC_LDC_INDEX = 0x30,
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NSC_DIO_INDEX = 0x60,
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NSC_CIO_INDEX = 0x62,
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NSC_IRQ_INDEX = 0x70,
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NSC_ITS_INDEX = 0x71
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};
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#define NSC_STATUS 0x01
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#define NSC_COMMAND 0x01
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#define NSC_DATA 0x00
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enum tpm_nsc_status_loc {
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NSC_STATUS = 0x01,
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NSC_COMMAND = 0x01,
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NSC_DATA = 0x00
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};
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/* status bits */
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#define NSC_STATUS_OBF 0x01 /* output buffer full */
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#define NSC_STATUS_IBF 0x02 /* input buffer full */
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#define NSC_STATUS_F0 0x04 /* F0 */
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#define NSC_STATUS_A2 0x08 /* A2 */
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#define NSC_STATUS_RDY 0x10 /* ready to receive command */
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#define NSC_STATUS_IBR 0x20 /* ready to receive data */
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enum tpm_nsc_status{
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NSC_STATUS_OBF = 0x01, /* output buffer full */
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NSC_STATUS_IBF = 0x02, /* input buffer full */
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NSC_STATUS_F0 = 0x04, /* F0 */
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NSC_STATUS_A2 = 0x08, /* A2 */
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NSC_STATUS_RDY = 0x10, /* ready to receive command */
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NSC_STATUS_IBR = 0x20 /* ready to receive data */
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};
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/* command bits */
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#define NSC_COMMAND_NORMAL 0x01 /* normal mode */
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#define NSC_COMMAND_EOC 0x03
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#define NSC_COMMAND_CANCEL 0x22
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enum tpm_nsc_cmd_mode {
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NSC_COMMAND_NORMAL = 0x01, /* normal mode */
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NSC_COMMAND_EOC = 0x03,
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NSC_COMMAND_CANCEL = 0x22
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};
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/*
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* Wait for a certain status to appear
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*/
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