[TG3]: Setup proper GPIO settings
Setup proper GPIO settings in tp->grc_local_ctrl before calling tg3_set_power() state in tg3_get_invariants() and after chip reset. Signed-off-by: Michael Chan <mchan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -5336,10 +5336,23 @@ static int tg3_reset_hw(struct tg3 *tp)
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tw32_f(MAC_MODE, tp->mac_mode | MAC_MODE_RXSTAT_CLEAR | MAC_MODE_TXSTAT_CLEAR);
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tw32_f(MAC_MODE, tp->mac_mode | MAC_MODE_RXSTAT_CLEAR | MAC_MODE_TXSTAT_CLEAR);
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udelay(40);
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udelay(40);
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tp->grc_local_ctrl = GRC_LCLCTRL_INT_ON_ATTN | GRC_LCLCTRL_AUTO_SEEPROM;
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/* tp->grc_local_ctrl is partially set up during tg3_get_invariants().
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if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5700)
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* If TG3_FLAG_EEPROM_WRITE_PROT is set, we should read the
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* register to preserve the GPIO settings for LOMs. The GPIOs,
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* whether used as inputs or outputs, are set by boot code after
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* reset.
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*/
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if (tp->tg3_flags & TG3_FLAG_EEPROM_WRITE_PROT) {
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u32 gpio_mask;
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gpio_mask = GRC_LCLCTRL_GPIO_OE0 | GRC_LCLCTRL_GPIO_OE2 |
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GRC_LCLCTRL_GPIO_OUTPUT0 | GRC_LCLCTRL_GPIO_OUTPUT2;
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tp->grc_local_ctrl |= tr32(GRC_LOCAL_CTRL) & gpio_mask;
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/* GPIO1 must be driven high for eeprom write protect */
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tp->grc_local_ctrl |= (GRC_LCLCTRL_GPIO_OE1 |
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tp->grc_local_ctrl |= (GRC_LCLCTRL_GPIO_OE1 |
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GRC_LCLCTRL_GPIO_OUTPUT1);
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GRC_LCLCTRL_GPIO_OUTPUT1);
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}
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tw32_f(GRC_LOCAL_CTRL, tp->grc_local_ctrl);
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tw32_f(GRC_LOCAL_CTRL, tp->grc_local_ctrl);
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udelay(100);
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udelay(100);
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@ -7430,8 +7443,8 @@ static int tg3_nvram_write_block(struct tg3 *tp, u32 offset, u32 len, u8 *buf)
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}
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}
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if (tp->tg3_flags & TG3_FLAG_EEPROM_WRITE_PROT) {
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if (tp->tg3_flags & TG3_FLAG_EEPROM_WRITE_PROT) {
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tw32_f(GRC_LOCAL_CTRL, tp->grc_local_ctrl |
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tw32_f(GRC_LOCAL_CTRL, tp->grc_local_ctrl &
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GRC_LCLCTRL_GPIO_OE1);
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~GRC_LCLCTRL_GPIO_OUTPUT1);
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udelay(40);
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udelay(40);
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}
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}
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@ -7477,8 +7490,7 @@ static int tg3_nvram_write_block(struct tg3 *tp, u32 offset, u32 len, u8 *buf)
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}
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}
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if (tp->tg3_flags & TG3_FLAG_EEPROM_WRITE_PROT) {
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if (tp->tg3_flags & TG3_FLAG_EEPROM_WRITE_PROT) {
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tw32_f(GRC_LOCAL_CTRL, tp->grc_local_ctrl |
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tw32_f(GRC_LOCAL_CTRL, tp->grc_local_ctrl);
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GRC_LCLCTRL_GPIO_OE1 | GRC_LCLCTRL_GPIO_OUTPUT1);
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udelay(40);
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udelay(40);
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}
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}
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@ -8045,6 +8057,16 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
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*/
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*/
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tg3_get_eeprom_hw_cfg(tp);
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tg3_get_eeprom_hw_cfg(tp);
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/* Set up tp->grc_local_ctrl before calling tg3_set_power_state().
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* GPIO1 driven high will bring 5700's external PHY out of reset.
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* It is also used as eeprom write protect on LOMs.
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*/
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tp->grc_local_ctrl = GRC_LCLCTRL_INT_ON_ATTN | GRC_LCLCTRL_AUTO_SEEPROM;
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if ((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5700) ||
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(tp->tg3_flags & TG3_FLAG_EEPROM_WRITE_PROT))
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tp->grc_local_ctrl |= (GRC_LCLCTRL_GPIO_OE1 |
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GRC_LCLCTRL_GPIO_OUTPUT1);
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/* Force the chip into D0. */
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/* Force the chip into D0. */
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err = tg3_set_power_state(tp, 0);
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err = tg3_set_power_state(tp, 0);
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if (err) {
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if (err) {
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