libata: reimplement reset sequencing
libata previously depended upon waits in prereset to get resets after hotplug right for both spin up and device ready wait. This was necessary both for reliablity and speed as reset was likely to fail if initiated too early and each try usually took more than 30secs to fail. Previous patches fixed the reliability part by fixing status and SCR handling in resets. This patch remedies the speed part by improving reset sequencing. Prereset waiting timeout is adjusted to 10s because spinup wait is replaced by reset sequencing and !BSY wait is not as important as before. During boot or module loading where the drive is already fully spun up, !BSY wait succeeds immediately, so 10s should be enough in most cases. It matters after hotplugging or other error conditions, but in those cases, !BSY wait in prereset simply can't be relied upon due to the varied and weird behaviors ATA controllers and devices show. Reset is now driven by ata_eh_reset_timeouts[] table which contains timeouts for each reset try. The first reset can be softreset but the following ones are always hardreset if available. Each timeout defines deadline for the reset try. If a reset try fails, reset is retried with the next timeout till the end of the timeout table is reached. If a reset try fails before the timeout with error, libata waits till the deadline of the failed try before retrying. IOW, the timeout table defines timetable of reset tries such that the n'th try always begins at least after the sum of all previous timeouts has passed. The current timetable defines 4 tries and takes around 1 minute. @0 : First try. This should succeed most of the time during boot. @10 : 10s is enough to spin up most consumer harddrives. Give it another shot. @20 : 20s should spin up > 99% of working drives. This has 30s timeout for retarded devices needing long idleness post reset. @55 : Final try with 5s timeout just in case. The above timetable is trade off between not annoying the device too much with frequent resets and taking reasonable amount of time in most cases. Some controllers may do better with shorter timeouts while others may fare better with longer but we just can't rely upon LLD writers to test each controller with wide variety of devices using various scenarios. We need default behavior which reasonably fits most cases. I've tested the above timetable on a dozen SATA controllers and a few PATA controllers with about a dozen different drives from all major vendors and 4 different ODDs from three different vendors for both boot and hotplug (if available) cases. Boot probing is not affected unless the device is broken in which cases new code gives up on the port after a minute rather than five or nine minutes. When hotplugging, most devices get detected on the first or second try. Multi-platter drives with long spin up time which sometimes took > 40 secs with the original code, now usually comes up during the second try and at least right after the third try @20. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
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@ -3304,35 +3304,6 @@ int sata_phy_resume(struct ata_port *ap, const unsigned long *params,
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return sata_phy_debounce(ap, params, deadline);
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}
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static void ata_wait_spinup(struct ata_port *ap, unsigned long deadline)
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{
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struct ata_eh_context *ehc = &ap->eh_context;
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unsigned long end, secs;
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int rc;
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/* first, debounce phy if SATA */
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if (ap->cbl == ATA_CBL_SATA) {
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rc = sata_phy_debounce(ap, sata_deb_timing_hotplug, deadline);
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/* if debounced successfully and offline, no need to wait */
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if ((rc == 0 || rc == -EOPNOTSUPP) && ata_port_offline(ap))
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return;
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}
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/* okay, let's give the drive time to spin up */
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end = ehc->i.hotplug_timestamp + ATA_SPINUP_WAIT * HZ / 1000;
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secs = ((end - jiffies) + HZ - 1) / HZ;
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if (time_after(jiffies, end))
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return;
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if (secs > 5)
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ata_port_printk(ap, KERN_INFO, "waiting for device to spin up "
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"(%lu secs)\n", secs);
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schedule_timeout_uninterruptible(end - jiffies);
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}
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/**
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* ata_std_prereset - prepare for reset
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* @ap: ATA port to be reset
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@ -3356,15 +3327,11 @@ int ata_std_prereset(struct ata_port *ap, unsigned long deadline)
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const unsigned long *timing = sata_ehc_deb_timing(ehc);
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int rc;
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/* handle link resume & hotplug spinup */
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/* handle link resume */
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if ((ehc->i.flags & ATA_EHI_RESUME_LINK) &&
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(ap->flags & ATA_FLAG_HRST_TO_RESUME))
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ehc->i.action |= ATA_EH_HARDRESET;
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if ((ehc->i.flags & ATA_EHI_HOTPLUGGED) &&
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(ap->flags & ATA_FLAG_SKIP_D2H_BSY))
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ata_wait_spinup(ap, deadline);
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/* if we're about to do hardreset, nothing more to do */
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if (ehc->i.action & ATA_EH_HARDRESET)
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return 0;
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@ -50,6 +50,28 @@ enum {
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ATA_EH_SPDN_FALLBACK_TO_PIO = (1 << 2),
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};
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/* Waiting in ->prereset can never be reliable. It's sometimes nice
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* to wait there but it can't be depended upon; otherwise, we wouldn't
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* be resetting. Just give it enough time for most drives to spin up.
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*/
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enum {
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ATA_EH_PRERESET_TIMEOUT = 10 * HZ,
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};
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/* The following table determines how we sequence resets. Each entry
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* represents timeout for that try. The first try can be soft or
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* hardreset. All others are hardreset if available. In most cases
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* the first reset w/ 10sec timeout should succeed. Following entries
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* are mostly for error handling, hotplug and retarded devices.
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*/
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static const unsigned long ata_eh_reset_timeouts[] = {
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10 * HZ, /* most drives spin up by 10sec */
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10 * HZ, /* > 99% working drives spin up before 20sec */
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35 * HZ, /* give > 30 secs of idleness for retarded devices */
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5 * HZ, /* and sweet one last chance */
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/* > 1 min has elapsed, give up */
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};
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static void __ata_port_freeze(struct ata_port *ap);
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static void ata_eh_finish(struct ata_port *ap);
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#ifdef CONFIG_PM
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@ -1603,8 +1625,9 @@ static int ata_eh_reset(struct ata_port *ap, int classify,
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{
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struct ata_eh_context *ehc = &ap->eh_context;
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unsigned int *classes = ehc->classes;
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int tries = ATA_EH_RESET_TRIES;
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int verbose = !(ehc->i.flags & ATA_EHI_QUIET);
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int try = 0;
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unsigned long deadline;
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unsigned int action;
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ata_reset_fn_t reset;
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int i, did_followup_srst, rc;
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@ -1624,7 +1647,7 @@ static int ata_eh_reset(struct ata_port *ap, int classify,
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ehc->i.action |= ATA_EH_HARDRESET;
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if (prereset) {
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rc = prereset(ap, jiffies + 40 * HZ);
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rc = prereset(ap, jiffies + ATA_EH_PRERESET_TIMEOUT);
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if (rc) {
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if (rc == -ENOENT) {
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ata_port_printk(ap, KERN_DEBUG,
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@ -1665,6 +1688,8 @@ static int ata_eh_reset(struct ata_port *ap, int classify,
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}
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retry:
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deadline = jiffies + ata_eh_reset_timeouts[try++];
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/* shut up during boot probing */
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if (verbose)
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ata_port_printk(ap, KERN_INFO, "%s resetting port\n",
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@ -1676,7 +1701,7 @@ static int ata_eh_reset(struct ata_port *ap, int classify,
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else
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ehc->i.flags |= ATA_EHI_DID_SOFTRESET;
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rc = ata_do_reset(ap, reset, classes, jiffies + 40 * HZ);
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rc = ata_do_reset(ap, reset, classes, deadline);
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did_followup_srst = 0;
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if (reset == hardreset &&
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@ -1693,7 +1718,7 @@ static int ata_eh_reset(struct ata_port *ap, int classify,
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}
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ata_eh_about_to_do(ap, NULL, ATA_EH_RESET_MASK);
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rc = ata_do_reset(ap, reset, classes, jiffies + 40 * HZ);
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rc = ata_do_reset(ap, reset, classes, deadline);
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if (rc == 0 && classify &&
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classes[0] == ATA_DEV_UNKNOWN) {
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@ -1703,22 +1728,21 @@ static int ata_eh_reset(struct ata_port *ap, int classify,
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}
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}
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if (rc && --tries) {
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const char *type;
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if (rc && try < ARRAY_SIZE(ata_eh_reset_timeouts)) {
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unsigned long now = jiffies;
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if (reset == softreset) {
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if (did_followup_srst)
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type = "follow-up soft";
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else
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type = "soft";
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} else
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type = "hard";
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if (time_before(now, deadline)) {
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unsigned long delta = deadline - jiffies;
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ata_port_printk(ap, KERN_WARNING,
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"%sreset failed, retrying in 5 secs\n", type);
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ssleep(5);
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ata_port_printk(ap, KERN_WARNING, "reset failed "
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"(errno=%d), retrying in %u secs\n",
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rc, (jiffies_to_msecs(delta) + 999) / 1000);
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if (reset == hardreset)
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schedule_timeout_uninterruptible(delta);
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}
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if (reset == hardreset &&
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try == ARRAY_SIZE(ata_eh_reset_timeouts) - 1)
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sata_down_spd_limit(ap);
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if (hardreset)
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reset = hardreset;
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@ -296,18 +296,8 @@ enum {
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/* how hard are we gonna try to probe/recover devices */
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ATA_PROBE_MAX_TRIES = 3,
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ATA_EH_RESET_TRIES = 3,
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ATA_EH_DEV_TRIES = 3,
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/* Drive spinup time (time from power-on to the first D2H FIS)
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* in msecs - 8s currently. Failing to get ready in this time
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* isn't critical. It will result in reset failure for
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* controllers which can't wait for the first D2H FIS. libata
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* will retry, so it just has to be long enough to spin up
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* most devices.
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*/
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ATA_SPINUP_WAIT = 8000,
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/* Horkage types. May be set by libata or controller on drives
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(some horkage may be drive/controller pair dependant */
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@ -495,7 +485,6 @@ struct ata_eh_info {
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unsigned int dev_action[ATA_MAX_DEVICES]; /* dev EH action */
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unsigned int flags; /* ATA_EHI_* flags */
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unsigned long hotplug_timestamp;
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unsigned int probe_mask;
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char desc[ATA_EH_DESC_LEN];
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@ -925,12 +914,7 @@ extern void ata_do_eh(struct ata_port *ap, ata_prereset_fn_t prereset,
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static inline void __ata_ehi_hotplugged(struct ata_eh_info *ehi)
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{
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if (ehi->flags & ATA_EHI_HOTPLUGGED)
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return;
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ehi->flags |= ATA_EHI_HOTPLUGGED | ATA_EHI_RESUME_LINK;
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ehi->hotplug_timestamp = jiffies;
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ehi->action |= ATA_EH_SOFTRESET;
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ehi->probe_mask |= (1 << ATA_MAX_DEVICES) - 1;
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}
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