IB/hfi1: Move structure and MACRO definitions in user_sdma.c to user_sdma.h
Clean up user_sdma.c by moving the structure and MACRO definitions into the header file user_sdma.h Reviewed-by: Dennis Dalessandro <dennis.dalessandro@intel.com> Signed-off-by: Harish Chegondi <harish.chegondi@intel.com> Signed-off-by: Dennis Dalessandro <dennis.dalessandro@intel.com> Signed-off-by: Doug Ledford <dledford@redhat.com>zero-colors
Harish Chegondi
Doug Ledford
parent
637f4600a8
commit
32500f2763
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@ -74,176 +74,8 @@ static uint hfi1_sdma_comp_ring_size = 128;
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module_param_named(sdma_comp_size, hfi1_sdma_comp_ring_size, uint, S_IRUGO);
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MODULE_PARM_DESC(sdma_comp_size, "Size of User SDMA completion ring. Default: 128");
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/* The maximum number of Data io vectors per message/request */
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#define MAX_VECTORS_PER_REQ 8
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/*
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* Maximum number of packet to send from each message/request
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* before moving to the next one.
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*/
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#define MAX_PKTS_PER_QUEUE 16
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#define num_pages(x) (1 + ((((x) - 1) & PAGE_MASK) >> PAGE_SHIFT))
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#define req_opcode(x) \
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(((x) >> HFI1_SDMA_REQ_OPCODE_SHIFT) & HFI1_SDMA_REQ_OPCODE_MASK)
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#define req_version(x) \
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(((x) >> HFI1_SDMA_REQ_VERSION_SHIFT) & HFI1_SDMA_REQ_OPCODE_MASK)
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#define req_iovcnt(x) \
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(((x) >> HFI1_SDMA_REQ_IOVCNT_SHIFT) & HFI1_SDMA_REQ_IOVCNT_MASK)
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/* Number of BTH.PSN bits used for sequence number in expected rcvs */
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#define BTH_SEQ_MASK 0x7ffull
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#define AHG_KDETH_INTR_SHIFT 12
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#define AHG_KDETH_SH_SHIFT 13
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#define AHG_KDETH_ARRAY_SIZE 9
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#define PBC2LRH(x) ((((x) & 0xfff) << 2) - 4)
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#define LRH2PBC(x) ((((x) >> 2) + 1) & 0xfff)
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#define AHG_HEADER_SET(arr, idx, dw, bit, width, value) \
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do { \
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if ((idx) < ARRAY_SIZE((arr))) \
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(arr)[(idx++)] = sdma_build_ahg_descriptor( \
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(__force u16)(value), (dw), (bit), \
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(width)); \
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else \
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return -ERANGE; \
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} while (0)
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/* Tx request flag bits */
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#define TXREQ_FLAGS_REQ_ACK BIT(0) /* Set the ACK bit in the header */
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#define TXREQ_FLAGS_REQ_DISABLE_SH BIT(1) /* Disable header suppression */
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#define SDMA_PKT_Q_INACTIVE BIT(0)
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#define SDMA_PKT_Q_ACTIVE BIT(1)
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#define SDMA_PKT_Q_DEFERRED BIT(2)
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/*
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* Maximum retry attempts to submit a TX request
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* before putting the process to sleep.
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*/
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#define MAX_DEFER_RETRY_COUNT 1
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static unsigned initial_pkt_count = 8;
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#define SDMA_IOWAIT_TIMEOUT 1000 /* in milliseconds */
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struct sdma_mmu_node;
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struct user_sdma_iovec {
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struct list_head list;
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struct iovec iov;
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/* number of pages in this vector */
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unsigned npages;
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/* array of pinned pages for this vector */
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struct page **pages;
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/*
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* offset into the virtual address space of the vector at
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* which we last left off.
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*/
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u64 offset;
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struct sdma_mmu_node *node;
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};
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struct sdma_mmu_node {
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struct mmu_rb_node rb;
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struct hfi1_user_sdma_pkt_q *pq;
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atomic_t refcount;
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struct page **pages;
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unsigned npages;
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};
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/* evict operation argument */
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struct evict_data {
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u32 cleared; /* count evicted so far */
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u32 target; /* target count to evict */
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};
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struct user_sdma_request {
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/* This is the original header from user space */
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struct hfi1_pkt_header hdr;
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/* Read mostly fields */
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struct hfi1_user_sdma_pkt_q *pq ____cacheline_aligned_in_smp;
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struct hfi1_user_sdma_comp_q *cq;
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/*
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* Pointer to the SDMA engine for this request.
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* Since different request could be on different VLs,
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* each request will need it's own engine pointer.
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*/
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struct sdma_engine *sde;
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struct sdma_req_info info;
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/* TID array values copied from the tid_iov vector */
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u32 *tids;
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/* total length of the data in the request */
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u32 data_len;
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/* number of elements copied to the tids array */
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u16 n_tids;
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/*
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* We copy the iovs for this request (based on
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* info.iovcnt). These are only the data vectors
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*/
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u8 data_iovs;
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s8 ahg_idx;
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/* Writeable fields shared with interrupt */
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u64 seqcomp ____cacheline_aligned_in_smp;
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u64 seqsubmitted;
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/* status of the last txreq completed */
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int status;
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/* Send side fields */
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struct list_head txps ____cacheline_aligned_in_smp;
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u64 seqnum;
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/*
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* KDETH.OFFSET (TID) field
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* The offset can cover multiple packets, depending on the
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* size of the TID entry.
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*/
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u32 tidoffset;
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/*
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* KDETH.Offset (Eager) field
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* We need to remember the initial value so the headers
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* can be updated properly.
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*/
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u32 koffset;
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u32 sent;
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/* TID index copied from the tid_iov vector */
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u16 tididx;
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/* progress index moving along the iovs array */
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u8 iov_idx;
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u8 done;
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u8 has_error;
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struct user_sdma_iovec iovs[MAX_VECTORS_PER_REQ];
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} ____cacheline_aligned_in_smp;
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/*
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* A single txreq could span up to 3 physical pages when the MTU
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* is sufficiently large (> 4K). Each of the IOV pointers also
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* needs it's own set of flags so the vector has been handled
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* independently of each other.
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*/
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struct user_sdma_txreq {
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/* Packet header for the txreq */
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struct hfi1_pkt_header hdr;
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struct sdma_txreq txreq;
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struct list_head list;
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struct user_sdma_request *req;
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u16 flags;
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unsigned busycount;
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u64 seqnum;
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};
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#define SDMA_DBG(req, fmt, ...) \
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hfi1_cdbg(SDMA, "[%u:%u:%u:%u] " fmt, (req)->pq->dd->unit, \
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(req)->pq->ctxt, (req)->pq->subctxt, (req)->info.comp_idx, \
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##__VA_ARGS__)
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#define SDMA_Q_DBG(pq, fmt, ...) \
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hfi1_cdbg(SDMA, "[%u:%u:%u] " fmt, (pq)->dd->unit, (pq)->ctxt, \
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(pq)->subctxt, ##__VA_ARGS__)
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static int user_sdma_send_pkts(struct user_sdma_request *req,
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unsigned maxpkts);
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static void user_sdma_txreq_cb(struct sdma_txreq *txreq, int status);
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@ -53,6 +53,67 @@
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#include "iowait.h"
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#include "user_exp_rcv.h"
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/* The maximum number of Data io vectors per message/request */
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#define MAX_VECTORS_PER_REQ 8
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/*
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* Maximum number of packet to send from each message/request
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* before moving to the next one.
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*/
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#define MAX_PKTS_PER_QUEUE 16
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#define num_pages(x) (1 + ((((x) - 1) & PAGE_MASK) >> PAGE_SHIFT))
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#define req_opcode(x) \
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(((x) >> HFI1_SDMA_REQ_OPCODE_SHIFT) & HFI1_SDMA_REQ_OPCODE_MASK)
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#define req_version(x) \
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(((x) >> HFI1_SDMA_REQ_VERSION_SHIFT) & HFI1_SDMA_REQ_OPCODE_MASK)
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#define req_iovcnt(x) \
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(((x) >> HFI1_SDMA_REQ_IOVCNT_SHIFT) & HFI1_SDMA_REQ_IOVCNT_MASK)
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/* Number of BTH.PSN bits used for sequence number in expected rcvs */
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#define BTH_SEQ_MASK 0x7ffull
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#define AHG_KDETH_INTR_SHIFT 12
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#define AHG_KDETH_SH_SHIFT 13
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#define AHG_KDETH_ARRAY_SIZE 9
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#define PBC2LRH(x) ((((x) & 0xfff) << 2) - 4)
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#define LRH2PBC(x) ((((x) >> 2) + 1) & 0xfff)
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#define AHG_HEADER_SET(arr, idx, dw, bit, width, value) \
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do { \
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if ((idx) < ARRAY_SIZE((arr))) \
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(arr)[(idx++)] = sdma_build_ahg_descriptor( \
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(__force u16)(value), (dw), (bit), \
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(width)); \
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else \
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return -ERANGE; \
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} while (0)
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/* Tx request flag bits */
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#define TXREQ_FLAGS_REQ_ACK BIT(0) /* Set the ACK bit in the header */
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#define TXREQ_FLAGS_REQ_DISABLE_SH BIT(1) /* Disable header suppression */
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#define SDMA_PKT_Q_INACTIVE BIT(0)
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#define SDMA_PKT_Q_ACTIVE BIT(1)
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#define SDMA_PKT_Q_DEFERRED BIT(2)
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/*
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* Maximum retry attempts to submit a TX request
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* before putting the process to sleep.
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*/
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#define MAX_DEFER_RETRY_COUNT 1
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#define SDMA_IOWAIT_TIMEOUT 1000 /* in milliseconds */
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#define SDMA_DBG(req, fmt, ...) \
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hfi1_cdbg(SDMA, "[%u:%u:%u:%u] " fmt, (req)->pq->dd->unit, \
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(req)->pq->ctxt, (req)->pq->subctxt, (req)->info.comp_idx, \
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##__VA_ARGS__)
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#define SDMA_Q_DBG(pq, fmt, ...) \
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hfi1_cdbg(SDMA, "[%u:%u:%u] " fmt, (pq)->dd->unit, (pq)->ctxt, \
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(pq)->subctxt, ##__VA_ARGS__)
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extern uint extended_psn;
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struct hfi1_user_sdma_pkt_q {
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@ -79,6 +140,111 @@ struct hfi1_user_sdma_comp_q {
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struct hfi1_sdma_comp_entry *comps;
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};
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struct sdma_mmu_node {
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struct mmu_rb_node rb;
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struct hfi1_user_sdma_pkt_q *pq;
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atomic_t refcount;
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struct page **pages;
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unsigned int npages;
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};
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struct user_sdma_iovec {
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struct list_head list;
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struct iovec iov;
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/* number of pages in this vector */
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unsigned int npages;
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/* array of pinned pages for this vector */
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struct page **pages;
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/*
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* offset into the virtual address space of the vector at
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* which we last left off.
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*/
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u64 offset;
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struct sdma_mmu_node *node;
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};
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/* evict operation argument */
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struct evict_data {
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u32 cleared; /* count evicted so far */
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u32 target; /* target count to evict */
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};
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struct user_sdma_request {
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/* This is the original header from user space */
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struct hfi1_pkt_header hdr;
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/* Read mostly fields */
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struct hfi1_user_sdma_pkt_q *pq ____cacheline_aligned_in_smp;
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struct hfi1_user_sdma_comp_q *cq;
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/*
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* Pointer to the SDMA engine for this request.
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* Since different request could be on different VLs,
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* each request will need it's own engine pointer.
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*/
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struct sdma_engine *sde;
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struct sdma_req_info info;
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/* TID array values copied from the tid_iov vector */
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u32 *tids;
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/* total length of the data in the request */
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u32 data_len;
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/* number of elements copied to the tids array */
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u16 n_tids;
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/*
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* We copy the iovs for this request (based on
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* info.iovcnt). These are only the data vectors
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*/
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u8 data_iovs;
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s8 ahg_idx;
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/* Writeable fields shared with interrupt */
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u64 seqcomp ____cacheline_aligned_in_smp;
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u64 seqsubmitted;
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/* status of the last txreq completed */
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int status;
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/* Send side fields */
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struct list_head txps ____cacheline_aligned_in_smp;
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u64 seqnum;
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/*
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* KDETH.OFFSET (TID) field
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* The offset can cover multiple packets, depending on the
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* size of the TID entry.
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*/
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u32 tidoffset;
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/*
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* KDETH.Offset (Eager) field
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* We need to remember the initial value so the headers
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* can be updated properly.
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*/
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u32 koffset;
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u32 sent;
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/* TID index copied from the tid_iov vector */
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u16 tididx;
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/* progress index moving along the iovs array */
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u8 iov_idx;
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u8 done;
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u8 has_error;
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struct user_sdma_iovec iovs[MAX_VECTORS_PER_REQ];
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} ____cacheline_aligned_in_smp;
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/*
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* A single txreq could span up to 3 physical pages when the MTU
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* is sufficiently large (> 4K). Each of the IOV pointers also
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* needs it's own set of flags so the vector has been handled
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* independently of each other.
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*/
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struct user_sdma_txreq {
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/* Packet header for the txreq */
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struct hfi1_pkt_header hdr;
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struct sdma_txreq txreq;
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struct list_head list;
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struct user_sdma_request *req;
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u16 flags;
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unsigned int busycount;
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u64 seqnum;
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};
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int hfi1_user_sdma_alloc_queues(struct hfi1_ctxtdata *uctxt,
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struct hfi1_filedata *fd);
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int hfi1_user_sdma_free_queues(struct hfi1_filedata *fd,
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