Merge branch 'mlx5-fixes'
Saeed Mahameed says: ==================== Mellanox 100G mlx5 fixes 2016-12-04 Some bug fixes for mlx5 core and mlx5e driver. v1->v2: - replace "uint" with "unsigned int" ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
commit
32f16e142d
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@ -268,11 +268,6 @@ static void dump_buf(void *buf, int size, int data_only, int offset)
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pr_debug("\n");
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}
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enum {
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MLX5_DRIVER_STATUS_ABORTED = 0xfe,
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MLX5_DRIVER_SYND = 0xbadd00de,
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};
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static int mlx5_internal_err_ret_value(struct mlx5_core_dev *dev, u16 op,
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u32 *synd, u8 *status)
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{
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@ -241,7 +241,7 @@ struct mlx5e_tstamp {
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};
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enum {
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MLX5E_RQ_STATE_FLUSH,
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MLX5E_RQ_STATE_ENABLED,
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MLX5E_RQ_STATE_UMR_WQE_IN_PROGRESS,
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MLX5E_RQ_STATE_AM,
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};
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@ -394,7 +394,7 @@ struct mlx5e_sq_dma {
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};
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enum {
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MLX5E_SQ_STATE_FLUSH,
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MLX5E_SQ_STATE_ENABLED,
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MLX5E_SQ_STATE_BF_ENABLE,
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};
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@ -759,6 +759,7 @@ static int mlx5e_open_rq(struct mlx5e_channel *c,
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if (err)
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goto err_destroy_rq;
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set_bit(MLX5E_RQ_STATE_ENABLED, &rq->state);
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err = mlx5e_modify_rq_state(rq, MLX5_RQC_STATE_RST, MLX5_RQC_STATE_RDY);
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if (err)
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goto err_disable_rq;
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@ -773,6 +774,7 @@ static int mlx5e_open_rq(struct mlx5e_channel *c,
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return 0;
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err_disable_rq:
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clear_bit(MLX5E_RQ_STATE_ENABLED, &rq->state);
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mlx5e_disable_rq(rq);
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err_destroy_rq:
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mlx5e_destroy_rq(rq);
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@ -782,7 +784,7 @@ err_destroy_rq:
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static void mlx5e_close_rq(struct mlx5e_rq *rq)
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{
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set_bit(MLX5E_RQ_STATE_FLUSH, &rq->state);
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clear_bit(MLX5E_RQ_STATE_ENABLED, &rq->state);
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napi_synchronize(&rq->channel->napi); /* prevent mlx5e_post_rx_wqes */
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cancel_work_sync(&rq->am.work);
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@ -1006,7 +1008,6 @@ static int mlx5e_enable_sq(struct mlx5e_sq *sq, struct mlx5e_sq_param *param)
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MLX5_SET(sqc, sqc, min_wqe_inline_mode, sq->min_inline_mode);
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MLX5_SET(sqc, sqc, state, MLX5_SQC_STATE_RST);
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MLX5_SET(sqc, sqc, tis_lst_sz, param->type == MLX5E_SQ_ICO ? 0 : 1);
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MLX5_SET(sqc, sqc, flush_in_error_en, 1);
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MLX5_SET(wq, wq, wq_type, MLX5_WQ_TYPE_CYCLIC);
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MLX5_SET(wq, wq, uar_page, sq->uar.index);
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@ -1083,6 +1084,7 @@ static int mlx5e_open_sq(struct mlx5e_channel *c,
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if (err)
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goto err_destroy_sq;
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set_bit(MLX5E_SQ_STATE_ENABLED, &sq->state);
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err = mlx5e_modify_sq(sq, MLX5_SQC_STATE_RST, MLX5_SQC_STATE_RDY,
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false, 0);
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if (err)
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@ -1096,6 +1098,7 @@ static int mlx5e_open_sq(struct mlx5e_channel *c,
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return 0;
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err_disable_sq:
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clear_bit(MLX5E_SQ_STATE_ENABLED, &sq->state);
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mlx5e_disable_sq(sq);
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err_destroy_sq:
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mlx5e_destroy_sq(sq);
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@ -1112,7 +1115,7 @@ static inline void netif_tx_disable_queue(struct netdev_queue *txq)
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static void mlx5e_close_sq(struct mlx5e_sq *sq)
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{
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set_bit(MLX5E_SQ_STATE_FLUSH, &sq->state);
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clear_bit(MLX5E_SQ_STATE_ENABLED, &sq->state);
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/* prevent netif_tx_wake_queue */
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napi_synchronize(&sq->channel->napi);
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@ -3092,7 +3095,7 @@ static void mlx5e_tx_timeout(struct net_device *dev)
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if (!netif_xmit_stopped(netdev_get_tx_queue(dev, i)))
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continue;
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sched_work = true;
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set_bit(MLX5E_SQ_STATE_FLUSH, &sq->state);
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clear_bit(MLX5E_SQ_STATE_ENABLED, &sq->state);
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netdev_err(dev, "TX timeout on queue: %d, SQ: 0x%x, CQ: 0x%x, SQ Cons: 0x%x SQ Prod: 0x%x\n",
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i, sq->sqn, sq->cq.mcq.cqn, sq->cc, sq->pc);
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}
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@ -3147,13 +3150,13 @@ static int mlx5e_xdp_set(struct net_device *netdev, struct bpf_prog *prog)
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for (i = 0; i < priv->params.num_channels; i++) {
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struct mlx5e_channel *c = priv->channel[i];
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set_bit(MLX5E_RQ_STATE_FLUSH, &c->rq.state);
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clear_bit(MLX5E_RQ_STATE_ENABLED, &c->rq.state);
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napi_synchronize(&c->napi);
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/* prevent mlx5e_poll_rx_cq from accessing rq->xdp_prog */
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old_prog = xchg(&c->rq.xdp_prog, prog);
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clear_bit(MLX5E_RQ_STATE_FLUSH, &c->rq.state);
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set_bit(MLX5E_RQ_STATE_ENABLED, &c->rq.state);
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/* napi_schedule in case we have missed anything */
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set_bit(MLX5E_CHANNEL_NAPI_SCHED, &c->flags);
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napi_schedule(&c->napi);
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@ -340,7 +340,7 @@ static inline void mlx5e_post_umr_wqe(struct mlx5e_rq *rq, u16 ix)
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while ((pi = (sq->pc & wq->sz_m1)) > sq->edge) {
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sq->db.ico_wqe[pi].opcode = MLX5_OPCODE_NOP;
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sq->db.ico_wqe[pi].num_wqebbs = 1;
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mlx5e_send_nop(sq, true);
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mlx5e_send_nop(sq, false);
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}
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wqe = mlx5_wq_cyc_get_wqe(wq, pi);
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@ -412,7 +412,7 @@ void mlx5e_post_rx_mpwqe(struct mlx5e_rq *rq)
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clear_bit(MLX5E_RQ_STATE_UMR_WQE_IN_PROGRESS, &rq->state);
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if (unlikely(test_bit(MLX5E_RQ_STATE_FLUSH, &rq->state))) {
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if (unlikely(!test_bit(MLX5E_RQ_STATE_ENABLED, &rq->state))) {
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mlx5e_free_rx_mpwqe(rq, &rq->mpwqe.info[wq->head]);
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return;
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}
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@ -445,7 +445,7 @@ void mlx5e_dealloc_rx_mpwqe(struct mlx5e_rq *rq, u16 ix)
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}
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#define RQ_CANNOT_POST(rq) \
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(test_bit(MLX5E_RQ_STATE_FLUSH, &rq->state) || \
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(!test_bit(MLX5E_RQ_STATE_ENABLED, &rq->state) || \
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test_bit(MLX5E_RQ_STATE_UMR_WQE_IN_PROGRESS, &rq->state))
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bool mlx5e_post_rx_wqes(struct mlx5e_rq *rq)
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@ -924,7 +924,7 @@ int mlx5e_poll_rx_cq(struct mlx5e_cq *cq, int budget)
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struct mlx5e_sq *xdp_sq = &rq->channel->xdp_sq;
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int work_done = 0;
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if (unlikely(test_bit(MLX5E_RQ_STATE_FLUSH, &rq->state)))
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if (unlikely(!test_bit(MLX5E_RQ_STATE_ENABLED, &rq->state)))
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return 0;
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if (cq->decmprs_left)
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@ -409,7 +409,7 @@ bool mlx5e_poll_tx_cq(struct mlx5e_cq *cq, int napi_budget)
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sq = container_of(cq, struct mlx5e_sq, cq);
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if (unlikely(test_bit(MLX5E_SQ_STATE_FLUSH, &sq->state)))
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if (unlikely(!test_bit(MLX5E_SQ_STATE_ENABLED, &sq->state)))
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return false;
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npkts = 0;
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@ -56,7 +56,7 @@ static void mlx5e_poll_ico_cq(struct mlx5e_cq *cq)
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struct mlx5_cqe64 *cqe;
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u16 sqcc;
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if (unlikely(test_bit(MLX5E_SQ_STATE_FLUSH, &sq->state)))
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if (unlikely(!test_bit(MLX5E_SQ_STATE_ENABLED, &sq->state)))
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return;
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cqe = mlx5e_get_cqe(cq);
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@ -113,7 +113,7 @@ static inline bool mlx5e_poll_xdp_tx_cq(struct mlx5e_cq *cq)
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sq = container_of(cq, struct mlx5e_sq, cq);
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if (unlikely(test_bit(MLX5E_SQ_STATE_FLUSH, &sq->state)))
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if (unlikely(!test_bit(MLX5E_SQ_STATE_ENABLED, &sq->state)))
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return false;
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/* sq->cc must be updated only after mlx5_cqwq_update_db_record(),
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@ -62,13 +62,13 @@ MODULE_DESCRIPTION("Mellanox Connect-IB, ConnectX-4 core driver");
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MODULE_LICENSE("Dual BSD/GPL");
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MODULE_VERSION(DRIVER_VERSION);
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int mlx5_core_debug_mask;
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module_param_named(debug_mask, mlx5_core_debug_mask, int, 0644);
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unsigned int mlx5_core_debug_mask;
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module_param_named(debug_mask, mlx5_core_debug_mask, uint, 0644);
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MODULE_PARM_DESC(debug_mask, "debug mask: 1 = dump cmd data, 2 = dump cmd exec time, 3 = both. Default=0");
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#define MLX5_DEFAULT_PROF 2
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static int prof_sel = MLX5_DEFAULT_PROF;
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module_param_named(prof_sel, prof_sel, int, 0444);
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static unsigned int prof_sel = MLX5_DEFAULT_PROF;
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module_param_named(prof_sel, prof_sel, uint, 0444);
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MODULE_PARM_DESC(prof_sel, "profile selector. Valid range 0 - 2");
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enum {
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@ -732,13 +732,15 @@ static int mlx5_core_set_issi(struct mlx5_core_dev *dev)
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u8 status;
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mlx5_cmd_mbox_status(query_out, &status, &syndrome);
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if (status == MLX5_CMD_STAT_BAD_OP_ERR) {
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pr_debug("Only ISSI 0 is supported\n");
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return 0;
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if (!status || syndrome == MLX5_DRIVER_SYND) {
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mlx5_core_err(dev, "Failed to query ISSI err(%d) status(%d) synd(%d)\n",
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err, status, syndrome);
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return err;
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}
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pr_err("failed to query ISSI err(%d)\n", err);
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return err;
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mlx5_core_warn(dev, "Query ISSI is not supported by FW, ISSI is 0\n");
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dev->issi = 0;
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return 0;
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}
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sup_issi = MLX5_GET(query_issi_out, query_out, supported_issi_dw0);
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@ -752,7 +754,8 @@ static int mlx5_core_set_issi(struct mlx5_core_dev *dev)
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err = mlx5_cmd_exec(dev, set_in, sizeof(set_in),
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set_out, sizeof(set_out));
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if (err) {
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pr_err("failed to set ISSI=1 err(%d)\n", err);
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mlx5_core_err(dev, "Failed to set ISSI to 1 err(%d)\n",
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err);
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return err;
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}
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@ -1227,13 +1230,6 @@ static int init_one(struct pci_dev *pdev,
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dev->pdev = pdev;
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dev->event = mlx5_core_event;
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if (prof_sel < 0 || prof_sel >= ARRAY_SIZE(profile)) {
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mlx5_core_warn(dev,
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"selected profile out of range, selecting default (%d)\n",
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MLX5_DEFAULT_PROF);
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prof_sel = MLX5_DEFAULT_PROF;
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}
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dev->profile = &profile[prof_sel];
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INIT_LIST_HEAD(&priv->ctx_list);
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@ -1450,10 +1446,22 @@ static struct pci_driver mlx5_core_driver = {
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.sriov_configure = mlx5_core_sriov_configure,
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};
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static void mlx5_core_verify_params(void)
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{
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if (prof_sel >= ARRAY_SIZE(profile)) {
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pr_warn("mlx5_core: WARNING: Invalid module parameter prof_sel %d, valid range 0-%zu, changing back to default(%d)\n",
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prof_sel,
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ARRAY_SIZE(profile) - 1,
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MLX5_DEFAULT_PROF);
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prof_sel = MLX5_DEFAULT_PROF;
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}
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}
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static int __init init(void)
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{
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int err;
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mlx5_core_verify_params();
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mlx5_register_debugfs();
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err = pci_register_driver(&mlx5_core_driver);
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@ -44,11 +44,11 @@
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#define MLX5_TOTAL_VPORTS(mdev) (1 + pci_sriov_get_totalvfs(mdev->pdev))
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extern int mlx5_core_debug_mask;
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extern uint mlx5_core_debug_mask;
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#define mlx5_core_dbg(__dev, format, ...) \
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dev_dbg(&(__dev)->pdev->dev, "%s:%s:%d:(pid %d): " format, \
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(__dev)->priv.name, __func__, __LINE__, current->pid, \
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dev_dbg(&(__dev)->pdev->dev, "%s:%d:(pid %d): " format, \
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__func__, __LINE__, current->pid, \
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##__VA_ARGS__)
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#define mlx5_core_dbg_mask(__dev, mask, format, ...) \
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@ -63,8 +63,8 @@ do { \
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##__VA_ARGS__)
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#define mlx5_core_warn(__dev, format, ...) \
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dev_warn(&(__dev)->pdev->dev, "%s:%s:%d:(pid %d): " format, \
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(__dev)->priv.name, __func__, __LINE__, current->pid, \
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dev_warn(&(__dev)->pdev->dev, "%s:%d:(pid %d): " format, \
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__func__, __LINE__, current->pid, \
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##__VA_ARGS__)
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#define mlx5_core_info(__dev, format, ...) \
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@ -75,6 +75,11 @@ enum {
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MLX5_CMD_TIME, /* print command execution time */
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};
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enum {
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MLX5_DRIVER_STATUS_ABORTED = 0xfe,
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MLX5_DRIVER_SYND = 0xbadd00de,
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};
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int mlx5_query_hca_caps(struct mlx5_core_dev *dev);
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int mlx5_query_board_id(struct mlx5_core_dev *dev);
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int mlx5_cmd_init_hca(struct mlx5_core_dev *dev);
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