PCI: pci-bridge-emul: Extend pci_bridge_emul_init() with flags
Depending on the capabilities of the PCI controller/platform, the
PCI-to-PCI bridge emulation behavior might need to be different. For
example, on platforms that use the pci-mvebu code, we currently don't
support prefetchable memory BARs, so the corresponding fields in the
PCI-to-PCI bridge configuration space should be read-only.
To implement this, extend pci_bridge_emul_init() to take a "flags"
argument, with currently one flag supported:
PCI_BRIDGE_EMUL_NO_PREFETCHABLE_BAR
that will make the prefetchable memory base and limit registers
read-only.
The pci-mvebu and pci-aardvark drivers are updated accordingly.
Fixes: 1f08673eef
("PCI: mvebu: Convert to PCI emulated bridge config space")
Reported-by: Luís Mendes <luis.p.mendes@gmail.com>
Reported-by: Leigh Brown <leigh@solinno.co.uk>
Tested-by: Leigh Brown <leigh@solinno.co.uk>
Tested-by: Luis Mendes <luis.p.mendes@gmail.com>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: stable@vger.kernel.org
Cc: Luís Mendes <luis.p.mendes@gmail.com>
Cc: Leigh Brown <leigh@solinno.co.uk>
This commit is contained in:
parent
59f81c35e0
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@ -499,7 +499,7 @@ static void advk_sw_pci_bridge_init(struct advk_pcie *pcie)
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bridge->data = pcie;
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bridge->ops = &advk_pci_bridge_emul_ops;
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pci_bridge_emul_init(bridge);
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pci_bridge_emul_init(bridge, 0);
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}
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@ -583,7 +583,7 @@ static void mvebu_pci_bridge_emul_init(struct mvebu_pcie_port *port)
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bridge->data = port;
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bridge->ops = &mvebu_pci_bridge_emul_ops;
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pci_bridge_emul_init(bridge);
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pci_bridge_emul_init(bridge, PCI_BRIDGE_EMUL_NO_PREFETCHABLE_BAR);
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}
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static inline struct mvebu_pcie *sys_to_pcie(struct pci_sys_data *sys)
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@ -267,7 +267,8 @@ const static struct pci_bridge_reg_behavior pcie_cap_regs_behavior[] = {
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* (typically at least vendor, device, revision), the ->ops pointer,
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* and optionally ->data and ->has_pcie.
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*/
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int pci_bridge_emul_init(struct pci_bridge_emul *bridge)
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int pci_bridge_emul_init(struct pci_bridge_emul *bridge,
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unsigned int flags)
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{
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bridge->conf.class_revision |= PCI_CLASS_BRIDGE_PCI << 16;
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bridge->conf.header_type = PCI_HEADER_TYPE_BRIDGE;
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@ -295,6 +296,11 @@ int pci_bridge_emul_init(struct pci_bridge_emul *bridge)
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}
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}
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if (flags & PCI_BRIDGE_EMUL_NO_PREFETCHABLE_BAR) {
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bridge->pci_regs_behavior[PCI_PREF_MEMORY_BASE / 4].ro = ~0;
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bridge->pci_regs_behavior[PCI_PREF_MEMORY_BASE / 4].rw = 0;
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}
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return 0;
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}
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@ -119,7 +119,12 @@ struct pci_bridge_emul {
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bool has_pcie;
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};
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int pci_bridge_emul_init(struct pci_bridge_emul *bridge);
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enum {
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PCI_BRIDGE_EMUL_NO_PREFETCHABLE_BAR = BIT(0),
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};
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int pci_bridge_emul_init(struct pci_bridge_emul *bridge,
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unsigned int flags);
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void pci_bridge_emul_cleanup(struct pci_bridge_emul *bridge);
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int pci_bridge_emul_conf_read(struct pci_bridge_emul *bridge, int where,
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