powerpc: Add support for the optimised lockref implementation
This commit adds the architecture support required to enable the optimised implementation of lockrefs. That's as simple as defining arch_spin_value_unlocked() and selecting the Kconfig option. We also define cmpxchg64_relaxed(), because the lockref code does not need the cmpxchg to have barrier semantics. Using Linus' test case[1] on one system I see a 4x improvement for the basic enablement, and a further 1.3x for cmpxchg64_relaxed(), for a total of 5.3x vs the baseline. On another system I see more like 2x improvement. [1]: http://marc.info/?l=linux-fsdevel&m=137782380714721&w=4 Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
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@ -139,6 +139,7 @@ config PPC
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select OLD_SIGACTION if PPC32
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select HAVE_DEBUG_STACKOVERFLOW
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select HAVE_IRQ_EXIT_ON_IRQ_STACK
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select ARCH_USE_CMPXCHG_LOCKREF if PPC64
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config GENERIC_CSUM
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def_bool CPU_LITTLE_ENDIAN
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@ -300,6 +300,7 @@ __cmpxchg_local(volatile void *ptr, unsigned long old, unsigned long new,
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BUILD_BUG_ON(sizeof(*(ptr)) != 8); \
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cmpxchg_local((ptr), (o), (n)); \
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})
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#define cmpxchg64_relaxed cmpxchg64_local
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#else
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#include <asm-generic/cmpxchg-local.h>
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#define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n))
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@ -54,6 +54,11 @@
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#define SYNC_IO
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#endif
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static __always_inline int arch_spin_value_unlocked(arch_spinlock_t lock)
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{
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return lock.slock == 0;
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}
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/*
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* This returns the old value in the lock, so we succeeded
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* in getting the lock if the return value is 0.
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